INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY (IJEET)

Size: px
Start display at page:

Download "INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY (IJEET)"

Transcription

1 INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY (IJEET) Proceedings of the 2 nd International Conference on Current Trends in Engineering and Management ICCTEM ISSN (Print) ISSN (Online) Volume 5, Issue 8, August (2014), pp IAEME: Journal Impact Factor (2014): (Calculated by GISI) IJEET I A E M E PWM CONTROL STRATEGIES FOR MULTILEVEL INVERTERS BASED ON CARRIER REDISTRIBUTION TECHNIQUE S. Nagaraja Rao 1, D.V. Ashok Kumar 2, Ch.Sai Babu 3 1 Research Scholar, JNTUK,Kakinada (A.P), India 2 Professor, Dept.of EEE, SDIT, Nandyal (A.P), India 3 Professor, Dept.of EEE, JNTUK, Kakinada (A.P), India ABSTRACT This paper proposes three Pulse width modulated (PWM) methods based on Carrier Redistribution Techniques that utilize the (CFD) control freedom degree of vertical offsets among carriers. They are named as Alternate Phase Opposition Disposition (APOD), Phase Opposition Disposition (POD) and Phase Disposition (PD). Ingeneral Pulse width modulated (PWM) techniques of a voltage source inverter need a reference signal and carrier signal to generate the required modulating signals for the desired output. Modifications in Modulating techniques can be considered in two ways, namely Modified reference and Modified carrier. The existing multilevel carrier-based pulse width modulation strategies have no special provisions to offer quality output, besides lower order harmonics are introduced in the spectrum, especially at low switching frequencies. This paper proposes a novel multilevel PWM strategy to corner the advantages of low frequency switching and reduced total harmonic distortion (THD) based on Carrier Redistribution Technique. This paper also presents the most relevant control and modulation methods by a new reference/carrier based PWM scheme for three phase Diode Clamped Multilevel Inverter and comparing the performance of the proposed scheme with that of the existing control schemes. Finally, the simulation results are included to verify the effectiveness of the proposed multilevel inverter configuration using various PWM Techniques and validate the proposed theory. Keywords: Diode Clamped MLI, Pulse width modulation, APOD, POD, PD, Total Harmonic Distortion. I. INTRODUCTION The voltage source inverters produce an output voltage or current with levels either 0 or ±Vdc. They are known as the two-level inverter. To produce a quality output voltage or a current 119

2 wave form with less amount of ripple content, they require high switching frequency. In high- power and high-voltage applications these two level inverters, however, have some limitations in operating at high frequency mainly due to switching losses and constraints of device ratings. These limitations can be overcome using multilevel inverters. The multilevel inverters have drawn tremendous interest in power industry. It may be easier to produce a high-power, high-voltage inverter with multi level structure because of the way in which the voltage stresses are controlled in the structure. The unique structure of multilevel voltage source inverters allows them to reach high voltages with low harmonics without use of transformers or series connected synchronized-switching devices. As the number of voltage levels increases, the harmonic content of the output voltage wave form decreases significantly. In general multilevel inverter can be viewed as voltage synthesizers, in which the high output voltage is synthesized from many discrete smaller voltage levels. The main advantages of this approach are summarized as follows: They can generate output voltages with extremely low distortion and lower (dv/dt). They can operate with a lower switching frequency. Their efficiency is high (>98%) because of the minimum switching frequency. They are suitable for medium to high power applications. The selection of the best multilevel topology for each application is often not clear and is subject to various engineering tradeoffs. Multilevel inversion is a power conversion strategy in which the output voltage is obtained in steps thus bringing the output closer to a sine wave and reduces the total harmonic distortion (THD). In general MLI s are three types they are named as diode clamped, flying capacitor and cascaded inverters. In this paper diode clamped MLI is considered based on their own advantages [1]. This paper presents a PWM control strategies for a seven level inverter Diode Clamped inverter based on carrier redistribution technique. Simulation results are included to verify the operating principle of the proposed multilevel inverters. II. SYSTEM CONFIGURATION Fig.1: Multilevel concept for (a) two level (b) three level and (c) n- level Multilevel inverter structures have been developed to overcome shortcomings in solid-state switching device ratings so they can be applied to higher voltage systems. The multilevel voltage source inverters [2] unique structure allows them to reach high voltages with low harmonics without the use of transformers. The general function of the multilevel inverter is to synthesize a desired ac voltage from several levels of dc voltages as shown in Fig.1. Table.1 compares the power component requirement per phase leg among the three multilevel voltage source inverters mentioned above. The table shows that the number of main switches and main diodes needed by the inverters to achieve the number of voltage levels. 120

3 Table.1: Component requirements per phase of m-level multilevel inverters Devices Diode clamped Flying Capacitor Cascaded H- MLI MLI Bridge MLI Main switching Devices 2(m-1) 2(m-1) 2(m-1) Main diodes 2(m-1) 0 2(m-1) Clamping diodes (m-1)* (m-2) (m-1)*(m-2) 0 Dc Balancing Capacitors m-1 m-1 (m-1)/2 Balancing Capacitors 0 2(m-1) 0 III. 7-LEVEL DIODE CLAMPED INVERTER Fig. 2: Configuration of Three-phase Diode Clamped Seven Level Inverter (DC7LI) Fig. 2 shows a seven-level diode-clamped inverter in which the dc bus consists of six capacitors, C1, C2, C3, C 4, C 5 and C6. For dc-bus voltage V dc, the voltage across each capacitor is V dc and each device voltage stress will be limited to one capacitor voltage level through clamping diodes. To explain how the staircase voltage is synthesized, the neutral point n is considered as the output phase voltage reference point. There are seven switch combinations to synthesize seven level output as shown in Table2. Table.2: Switching sequence for single phase 7 level diode clamped inverter Output voltage S1 S2 S3 S4 S5 S6 S1 1 S2 1 S3 1 S4 1 S5 1 S Vdc Vdc Vdc Vdc vdc vdc

4 IV. PWM CONTROL TECHNIQUES FOR MLI s Pulse Width Modulation (PWM) techniques for two level inverters have been studied extensively during the past decades. Many different PWM methods have been developed to achieve the following aims; wide linear modulation range, reduced switching loss, lesser total harmonic distortion in the spectrum of switching waveform, easy implementation, less memory space and computation time on implementing in digital processors for the proposed work. A number of modulation strategies are used in multilevel power conversion applications. They can generally be classified into modulating signals and carrier redistribution signal. 4.1 Modulating Signal Modulating signals can be classified into Sinusoidal PWM (SPWM), Third Harmonic injection PWM (THPWM) and Modified Space Vector PWM (MSVPWM). These modulation techniques are extensively studied and compared for the performance parameters with seven level inverters Sinusoidal PWM Fig. 3: Sinusoidal modulating signal control technique Sinusoidal PWM is the most widely accepted PWM technique, where a triangular wave is compared with a sinusoidal reference known as the modulating signal, shown in Fig Third Harmonic injection PWM A method to improve the gain of the pulse width modulator in a multilevel inverter is to inject a third harmonic. This technique is derived from conventional sinusoidal PWM with the addition of a 17% third harmonic component to the sine reference waveform as shown in Fig.4. Fig. 4: Third Harmonic Injection modulating signal control technique Modified Space Vector PWM In the SPWM scheme for two-level inverters, each reference phase voltage is compared with the triangular carrier and the individual pole voltages are generated, independent of each other [5, 6]. To obtain the maximum possible peak amplitude of the fundamental phase voltage, in linear 122

5 modulation, a common mode voltage, Voffset1, is added to the reference phase voltages [9, 1], where the magnitude of Voffset1 is given by ( Vmax + V V min) offset 1 = Equation - (1) 2 In (1), Vmax is the maximum magnitude of the three sampled reference phase voltages, while Vmin is the minimum magnitude of the three sampled reference phase voltages, in a sampling interval. The addition of the common mode voltage, Voffset1, results in the active inverter switching vectors being centered in a sampling interval, making the SPWM technique equivalent to the modified reference PWM technique [9].The modulating signal of modified space vector is shown in fig. 5. Fig. 5: Modified Space vector modulating signal control technique 4.2 Multicarrier PWM Techniques The implementation of the various carrier PWM techniques is possible for multi-level inverters. This paper uses multi-level triangular waves generation as derived in [5]. It can be a useful solution for pulse generation for this topology. This technique in [13] is called carrier redistribution (CR) technique. This technique is derived from the triangular carrier and has individually the lowest switching frequency among the multi-level PWM methods [14] Alterative Phase Opposition Disposition (APOD) This technique requires each of the (m 1) carrier waveforms, for an m-level phase waveform, to be phase displaced from each other by alternately as shown in Figures 6,7, and 8 for various modulating signals. The most significant harmonics are centered as sidebands around the carrier frequency fc and therefore no harmonics occur at fc. Fig.6: Sinusoidal reference with triangular carriers for a 3-phase seven-level PWM scheme using APOD 123

6 Fig.7: Third Harmonic Injection reference with triangular carriers for a 3-phase seven-level PWM scheme using APOD Fig.8: Modified Space vector reference with triangular carriers for a 3-phase seven-level PWM scheme using APOD Phase Opposition Disposition (POD) The carrier waveforms are all in phase above and below the zero reference value however, there is phase shift between the ones above and below zero respectively as shown in Figures 9, 10 and 11 for various modulating signals. The significant harmonics, once again, are located around the carrier frequency fc for both the phase and line voltage waveforms. Fig.9: Sinusoidal reference with triangular carriers for a 3-phase seven-level PWM scheme using POD Fig.10: Third Harmonic Injection reference with triangular carriers for a 3-phase seven-level PWM scheme using POD 124

7 Fig.11: Modified Space vector reference with triangular carriers for a 3-phase seven-level PWM scheme using POD Phase Disposition (PD) In this technique all the carrier waveforms are in same phase. Fig.11, 12 and 13 demonstrates the various modulating signals for a seven-level inverter. Fig.12: Sinusoidal reference with triangular carriers for a 3-phase seven-level PWM scheme using PD Fig.13: Third Harmonic Injection reference with triangular carriers for a 3-phase seven-level PWM scheme using PD Fig.14: Modified Space vector reference with triangular carriers for a 3-phase seven-level PWM scheme using PD 125

8 V. SIMULATION RESULTS A detailed circuit simulation was conducted to verify the operating principles of the three phase seven level Diode clamped using SPWM, THPWM and Modified SVPWM strategies based on Carrier Redistribution Techniques. Seven Level Diode Clamped MLI for 3 Ф 5.1 Sinusoidal PWM Fig.15: Line voltage of 3 Ф seven level DC MLI using SPWM Fig.16: FFT analysis of line voltage of 3 Ф seven level DC MLI using APOD Fig.17: FFT analysis of line voltage of 3 Ф seven level DC MLI using POD Fig.18: FFT analysis of line voltage of 3 Ф seven level DC MLI using PD 126

9 5.2 Third Harmonic injection PWM Fig.19: Line voltage of 3 Ф seven level DC MLI using THPWM Fig.20: FFT analysis of line voltage of 3 Ф seven level DC MLI using APOD Fig.21: FFT analysis of line voltage of 3 Ф seven level DC MLI using POD Fig.22: FFT analysis of line voltage of 3 Ф seven level DC MLI using PD 127

10 5.3 Modified Space Vector PWM Fig.23: Line voltage of 3 Ф seven level DC MLI using Modified SVPWM Fig.24: FFT analysis of line voltage of 3 Ф seven level DC MLI using APOD Fig.25: FFT analysis of line voltage of 3 Ф seven level DC MLI using POD Fig.26: FFT analysis of line voltage of 3 Ф seven level DC MLI using PD 128

11 The simulated AC output voltage of the seven level Diode Clamped inverter using SPWM, THPWM and Modified SVPWM based on Carrier Redistribution Techniques for 3 Ф and its corresponding FFT analysis are shown in above figures. These waveforms confirm the principle of operation of 7-level Diode Clamped inverter using SPWM, THPWM and modified SVPWM with resistive load. VI. COMPARISON OF RESULTS Input Voltage = 400 Volts Switching Frequency = 10 KHz Modulation Index = Table.3: % THD for various PWM Techniques for Seven Level Diode Clamped Inverter PWM Modified SPWM THPWM Technique SVPWM APOD POD PD Table.4: Fundamental Output Voltage (V rms ) for various PWM Techniques for Seven Level Diode Clamped Inverter PWM Modified SPWM THPWM Technique SVPWM APOD POD PD Fig. 27: % Graphical representation of % THD for various PWM Techniques for Seven Level Diode Clamped Inverter The Diode Clamped Three Phase Seven Level Inverter is simulated for various PWM strategies based on carrier redistribution technique. The simulation results with harmonic spectrum are presented and the corresponding results are shown in table 3 and table 4. In addition to this graphical representation is also shown in fig. 26. In this presentation it is concluded that modified SVPWM scheme with PD carrier redistribution technique has given good harmonic spectrum with fundamental THD when compared with SPWM and THPWM techniques. 129

12 VII. CONCLUSION The diode clamped 3-phase seven level inverter is simulated for sinusoidal PWM, Third Harmonic PWM technique and modified space vector PWM technique with APOD, POD and PD PWM strategies. The simulation results with harmonic spectrum are presented, and in this paper it is concluded that modified reference SVPWM using PD technique has given good harmonic spectrum with fundamental (335.8) and THD (10.78%) when compared with other techniques. One application area in the low-power range ( 100 kw) for Diode clamped inverter is in permanent-magnet (PM) motor drives employing a PM motor of very low inductance. The DCMLI can utilize the fast-switching low-cost low voltage MOSFETs and the IGBT s in the single-phase bridges to dramatically reduce current and torque ripples and to improve motor efficiency by reducing the associated copper and iron losses resulting from the current ripple. These configurations may also be applied in distributed power generation involving fuel cells and photovoltaic cells. VIII. REFERENCES [1] Gui- jia su, senior member, IEEE, Multilevel DC-Link Inverter, IEEE Trans. on Indapplications, vol.41, issue 4, pp ,may/june [2]. Zhong Du, Member,IEEE, Leon M.Tolbert, senior member Fundamental Frequency Switching Strategies of a Seven level Hybride Cascaded H-Bridge Multilevel Inverter, IEEE Transactions on, vol.24, no.1, Jan 2009 [3]. J. Rodr ıguez, J. Lai, and F. Peng, Multilevel inverters:asurvey of topologies, controls and applications, IEEE Trans. Ind. Electron., vol. 49, no. 4, pp , Aug [4]. W. Yao, H. Hu, and Z. Lu, Comparisons of space-vector modulation and carrier-based modulation of multilevel inverter, IEEE Trans. Power Electron., vol. 23, no. 1, pp , Jan [5]. J. N. Chiasson, L. M. Tolbert, K. J.McKenzie, and Z.Du, A new approach to solving the harmonic elimination equations for a multilevel converter, in Proc. IEEE Ind. Appl. Soc. Annu. Meeting, Salt Lake City, UT, Oct , 2003, pp [6]. Z. Du, L. M. Tolbert, and J. N. Chiasson, Active harmonic elimination for multilevel converters, IEEE Trans. Power Electron., vol. 21, no. 2, pp , Mar [7]. V. Blasko, A novel method for selective harmonic elimination in power electronic equipment, IEEE Trans. Power Electron., vol. 22, no. 1, pp , Jan [8]. J. R. Wells, X. Geng, P. L. Chapman, P. T. Krein, and B. M. Nee, Modulation-based harmonic elimination, IEEE Trans. Power Electron., vol. 22, no. 1, pp , Jan [9]. S.Mariethoz, A.Rufer, Resolution and efficiency improvements for three-phase cascaded multilevel inverters, IEEE transaction,2004. [10]. K. Thorborg and A. Nystorm, Staircase PWM: an uncomplicated and efficient modulation technique for ac motor drives, IEEE Transactions on Power Electronics, Vol. PE3, No.4, 1988, pp [11]. J. C. Salmon, S. Olsen, and N. Durdle, A three-phase PWM strategy using a stepped 12 reference waveform, IEEE Transactions on Industry Applications, Vol. IA27, No. 5, 1991, pp [12]. M. H. Ohsato, G. Kimura, and M. Shioya, Five-stepped PWM inverter used in photovoltaic systems, IEEE Transactions on Industrial Electronics, Vol. 38, October, 1991, pp [13]. J. Rodriguez, J.-S. Lai, and F. Z. Peng, Multi-level inverter: a survey of topologies, controls, and applications, IEEE Trans.Ind. Electron, vol. 49, no. 4, pp , Aug

13 [14]. Gerardo Ceglia, Víctor Guzmán, Member,IEEE, Carlos Sánchez, Fernando Ibáñez, Julio Walter, and María I. Giménez, Member,IEEE, A New Simplified Multilevel Inverter Topology for DC AC Conversion, IEEE Transactions on Power Electronics, vol. 21, no. 5, Sep AUTHOR S DETAIL S.Nagaraja Rao was born in kadapa, India. He received the B.Tech (Electrical and Electronics Engineering) degree from the Jawaharlal Nehru Technological University, Hyderabad in 2006; M.Tech (Power Electronics) from the same university in He is currently pursuing his Ph.D under JNTUK, Kakinada. He has published several National and International Journals and Conferences. His area of interest power electronics and Electric Drives. Dr. D. V. Ashok Kumar, was born in Nandyal, India in He received the B.E (Electrical and Electronics Engineering) degree from Gulbarga University and the M.Tech (Electrical Power Systems) from J.N.T.U.C.E, Anantapur and Ph.D in Solar Energy from same University. Currently he is working as Pricipal in Syamaldevi Institute of Technology for women, Nandyal, He has published/presented technical research papers in national and international Journals/conferences. His field of interest includes Electrical Machines, Power electronics, Power systems and Solar Energy. Ch. Sai Babu received the B.E from Andhra University (Electrical & Electronics Engineering), M.Tech in Electrical Machines and Industrial Drives from REC, Warangal and Ph.D in Reliability Studies of HVDC Converters from JNTU, Hyderabad. Currently he is working as a Professor in Dept. of EEE in JNTUK, Kakinada. He has published several National and International Journals and Conferences. His area of interest is Power Electronics and Drives, Power System Reliability, HVDC Converter Reliability, Optimization of Electrical Systems and Real Time Energy Management. 131

COMPARATIVE STUDY ON CARRIER OVERLAPPING PWM STRATEGIES FOR THREE PHASE FIVE LEVEL DIODE CLAMPED AND CASCADED INVERTERS

COMPARATIVE STUDY ON CARRIER OVERLAPPING PWM STRATEGIES FOR THREE PHASE FIVE LEVEL DIODE CLAMPED AND CASCADED INVERTERS COMPARATIVE STUDY ON CARRIER OVERLAPPING PWM STRATEGIES FOR THREE PHASE FIVE LEVEL DIODE CLAMPED AND CASCADED INVERTERS S. NAGARAJA RAO, 2 A. SURESH KUMAR & 3 K.NAVATHA,2 Dept. of EEE, RGMCET, Nandyal,

More information

Comparison of 3-Phase Cascaded & Multi Level DC Link Inverter with PWM Control Methods

Comparison of 3-Phase Cascaded & Multi Level DC Link Inverter with PWM Control Methods International Journal of Engineering Research and Applications (IJERA) IN: 2248-9622 Comparison of 3-Phase Cascaded & Multi Level DC Link Inverter with PWM Control Methods Ch.Anil Kumar 1, K.Veeresham

More information

PERFORMANCE EVALUATION OF MULTILEVEL INVERTER BASED ON TOTAL HARMONIC DISTORTION (THD)

PERFORMANCE EVALUATION OF MULTILEVEL INVERTER BASED ON TOTAL HARMONIC DISTORTION (THD) PERFORMANCE EVALUATION OF MULTILEVEL INVERTER BASED ON TOTAL HARMONIC DISTORTION (THD) B.Urmila, R.Rohit 2 Asst professor, Dept. of EEE, GPREC College Kurnool, A.P, India,urmila93@gmail.com 2 M.tech student,

More information

A New Transistor Clamped 5-Level H-Bridge Multilevel Inverter with voltage Boosting Capacity

A New Transistor Clamped 5-Level H-Bridge Multilevel Inverter with voltage Boosting Capacity A New Transistor Clamped 5-Level H-Bridge Multilevel Inverter with voltage Boosting Capacity Prakash Singh, Dept. of Electrical & Electronics Engineering Oriental Institute of Science & Technology Bhopal,

More information

New Multi Level Inverter with LSPWM Technique G. Sai Baba 1 G. Durga Prasad 2. P. Ram Prasad 3

New Multi Level Inverter with LSPWM Technique G. Sai Baba 1 G. Durga Prasad 2. P. Ram Prasad 3 New Multi Level Inverter with LSPWM Technique G. Sai Baba 1 G. Durga Prasad 2. P. Ram Prasad 3 1,2,3 Department of Electrical & Electronics Engineering, Swarnandhra College of Engg & Technology, West Godavari

More information

Analysis of IM Fed by Multi-Carrier SPWM and Low Switching Frequency Mixed CMLI

Analysis of IM Fed by Multi-Carrier SPWM and Low Switching Frequency Mixed CMLI Analysis of IM Fed by Multi-Carrier SPWM and Low Switching Frequency Mixed CMLI Srinivas Reddy Chalamalla 1, S. Tara Kalyani 2 M.Tech, Department of EEE, JNTU, Hyderabad, Andhra Pradesh, India 1 Professor,

More information

COMPARATIVE STUDY OF DIFFERENT TOPOLOGIES OF FIVE LEVEL INVERTER FOR HARMONICS REDUCTION

COMPARATIVE STUDY OF DIFFERENT TOPOLOGIES OF FIVE LEVEL INVERTER FOR HARMONICS REDUCTION COMPARATIVE STUDY OF DIFFERENT TOPOLOGIES OF FIVE LEVEL INVERTER FOR HARMONICS REDUCTION Mahtab Alam 1, Mr. Jitendra Kumar Garg 2 1 Student, M.Tech, 2 Associate Prof., Department of Electrical & Electronics

More information

CARRIER BASED PWM TECHNIQUE FOR HARMONIC REDUCTION IN CASCADED MULTILEVEL INVERTERS

CARRIER BASED PWM TECHNIQUE FOR HARMONIC REDUCTION IN CASCADED MULTILEVEL INVERTERS CARRIER BASED PWM TECHNIQUE FOR HARMONIC REDUCTION IN CASCADED MULTILEVEL INVERTERS 1 S.LEELA, 2 S.S.DASH 1 Assistant Professor, Dept.of Electrical & Electronics Engg., Sastra University, Tamilnadu, India

More information

A Novel Cascaded Multilevel Inverter Using A Single DC Source

A Novel Cascaded Multilevel Inverter Using A Single DC Source A Novel Cascaded Multilevel Inverter Using A Single DC Source Nimmy Charles 1, Femy P.H 2 P.G. Student, Department of EEE, KMEA Engineering College, Cochin, Kerala, India 1 Associate Professor, Department

More information

Series Parallel Switched Multilevel DC Link Inverter Fed Induction Motor

Series Parallel Switched Multilevel DC Link Inverter Fed Induction Motor Advance in Electronic and Electric Engineering. ISSN 2231-1297, Volume 4, Number 4 (2014), pp. 327-332 Research India Publications http://www.ripublication.com/aeee.htm Series Parallel Switched Multilevel

More information

SIMULATION, DESIGN AND CONTROL OF A MODIFIED H-BRIDGE SINGLE PHASE SEVEN LEVEL INVERTER 1 Atulkumar Verma, 2 Prof. Mrs.

SIMULATION, DESIGN AND CONTROL OF A MODIFIED H-BRIDGE SINGLE PHASE SEVEN LEVEL INVERTER 1 Atulkumar Verma, 2 Prof. Mrs. SIMULATION, DESIGN AND CONTROL OF A MODIFIED H-BRIDGE SINGLE PHASE SEVEN LEVEL INVERTER Atulkumar Verma, Prof. Mrs. Preeti Khatri Assistant Professor pursuing M.E. Electrical Power Systems in PVG s College

More information

Speed Control of Induction Motor using Multilevel Inverter

Speed Control of Induction Motor using Multilevel Inverter Speed Control of Induction Motor using Multilevel Inverter 1 Arya Shibu, 2 Haritha S, 3 Renu Rajan 1, 2, 3 Amrita School of Engineering, EEE Department, Amritapuri, Kollam, India Abstract: Multilevel converters

More information

International Journal of Advance Engineering and Research Development

International Journal of Advance Engineering and Research Development Scientific Journal of Impact Factor(SJIF): 3.134 International Journal of Advance Engineering and Research Development Volume 2,Issue 5, May -2015 e-issn(o): 2348-4470 p-issn(p): 2348-6406 Simulation and

More information

COMPARATIVE STUDY OF PWM TECHNIQUES FOR DIODE- CLAMPED MULTILEVEL-INVERTER

COMPARATIVE STUDY OF PWM TECHNIQUES FOR DIODE- CLAMPED MULTILEVEL-INVERTER COMPARATIVE STUDY OF PWM TECHNIQUES FOR DIODE- CLAMPED MULTILEVEL-INVERTER 1 ANIL D. MATKAR, 2 PRASAD M. JOSHI 1 P. G. Scholar, Department of Electrical Engineering, Government College of Engineering,

More information

Performance Evaluation of Multi Carrier Based PWM Techniques for Single Phase Five Level H-Bridge Type FCMLI

Performance Evaluation of Multi Carrier Based PWM Techniques for Single Phase Five Level H-Bridge Type FCMLI IOSR Journal of Engineering (IOSRJEN) ISSN: 2250-3021 Volume 2, Issue 7(July 2012), PP 82-90 Performance Evaluation of Multi Carrier Based PWM Techniques for Single Phase Five Level H-Bridge Type FCMLI

More information

Asymmetrical 63 level Inverter with reduced switches and its switching scheme

Asymmetrical 63 level Inverter with reduced switches and its switching scheme Asymmetrical 63 level Inverter with reduced switches and its switching scheme Gauri Shankar, Praveen Bansal Abstract This paper deals with reduced number of switches in multilevel inverter. Asymmetrical

More information

CASCADED H-BRIDGE MULTILEVEL INVERTER FOR INDUCTION MOTOR DRIVES

CASCADED H-BRIDGE MULTILEVEL INVERTER FOR INDUCTION MOTOR DRIVES CASCADED H-BRIDGE MULTILEVEL INVERTER FOR INDUCTION MOTOR DRIVES A.Venkadesan 1, Priyatosh Panda 2, Priti Agrawal 3, Varun Puli 4 1 Asst Professor, Electrical and Electronics Engineering, SRM University,

More information

SINGLE PHASE THIRTY ONE LEVEL INVERTER USING EIGHT SWITCHES TOWARDS THD REDUCTION

SINGLE PHASE THIRTY ONE LEVEL INVERTER USING EIGHT SWITCHES TOWARDS THD REDUCTION SINGLE PHASE THIRTY ONE LEVEL INVERTER USING EIGHT SWITCHES TOWARDS THD REDUCTION T.Ramachandran 1, P. Ebby Darney 2 and T. Sreedhar 3 1 Assistant Professor, Dept of EEE, U.P, Subharti Institute of Technology

More information

Hybrid 5-level inverter fed induction motor drive

Hybrid 5-level inverter fed induction motor drive ISSN 1 746-7233, England, UK World Journal of Modelling and Simulation Vol. 10 (2014) No. 3, pp. 224-230 Hybrid 5-level inverter fed induction motor drive Dr. P.V.V. Rama Rao, P. Devi Kiran, A. Phani Kumar

More information

Keywords Cascaded Multilevel Inverter, Insulated Gate Bipolar Transistor, Pulse Width Modulation, Total Harmonic Distortion.

Keywords Cascaded Multilevel Inverter, Insulated Gate Bipolar Transistor, Pulse Width Modulation, Total Harmonic Distortion. A Simplified Topology for Seven Level Modified Multilevel Inverter with Reduced Switch Count Technique G.Arunkumar*, A.Prakash**, R.Subramanian*** *Department of Electrical and Electronics Engineering,

More information

Literature Survey: Multilevel Voltage Source Inverter With Optimized Convention Of Bidirectional Switches

Literature Survey: Multilevel Voltage Source Inverter With Optimized Convention Of Bidirectional Switches Literature Survey: Multilevel Voltage Source Inverter With Optimized Convention Of Bidirectional Switches P.Bhagya [1], M.Thangadurai [2], V.Mohamed Ibrahim [3] PG Scholar [1],, Assistant Professor [2],

More information

A Comparative Analysis of Multi Carrier SPWM Control Strategies using Fifteen Level Cascaded H bridge Multilevel Inverter

A Comparative Analysis of Multi Carrier SPWM Control Strategies using Fifteen Level Cascaded H bridge Multilevel Inverter A Comparative Analysis of Multi Carrier SPWM Control Strategies using Fifteen Level Cascaded H bridge Multilevel Inverter D.Mohan M.E, Lecturer in Dept of EEE, Anna university of Technology, Coimbatore,

More information

A comparative study of Total Harmonic Distortion in Multi level inverter topologies

A comparative study of Total Harmonic Distortion in Multi level inverter topologies A comparative study of Total Harmonic Distortion in Multi level inverter topologies T.Prathiba *, P.Renuga Electrical Engineering Department, Thiagarajar College of Engineering, Madurai 625 015, India.

More information

Multilevel Inverter Based Statcom For Power System Load Balancing System

Multilevel Inverter Based Statcom For Power System Load Balancing System IOSR Journal of Electronics and Communication Engineering (IOSR-JECE) e-issn: 2278-2834,p- ISSN: 2278-8735 PP 36-43 www.iosrjournals.org Multilevel Inverter Based Statcom For Power System Load Balancing

More information

Multilevel Inverter with Coupled Inductors with Sine PWM Techniques

Multilevel Inverter with Coupled Inductors with Sine PWM Techniques Multilevel Inverter with Coupled Inductors with Sine PWM Techniques S.Subalakshmi 1, A.Mangaiyarkarasi 2, T.Jothi 3, S.Rajeshwari 4 Assistant Professor-I, Dept. of EEE, Prathyusha Institute of Technology

More information

ADVANCED PWM SCHEMES FOR 3-PHASE CASCADED H-BRIDGE 5- LEVEL INVERTERS

ADVANCED PWM SCHEMES FOR 3-PHASE CASCADED H-BRIDGE 5- LEVEL INVERTERS Volume 120 No. 6 2018, 7795-7807 ISSN: 1314-3395 (on-line version) url: http://www.acadpubl.eu/hub/ http://www.acadpubl.eu/hub/ ADVANCED PWM SCHEMES FOR 3-PHASE CASCADED H-BRIDGE 5- LEVEL INVERTERS Devineni

More information

MULTICARRIER TRAPEZOIDAL PWM STRATEGIES FOR A SINGLE PHASE FIVE LEVEL CASCADED INVERTER

MULTICARRIER TRAPEZOIDAL PWM STRATEGIES FOR A SINGLE PHASE FIVE LEVEL CASCADED INVERTER Journal of Engineering Science and Technology Vol. 5, No. 4 (2010) 400-411 School of Engineering, Taylor s University MULTICARRIER TRAPEZOIDAL PWM STRATEGIES FOR A SINGLE PHASE FIVE LEVEL CASCADED INVERTER

More information

Keywords: Multilevel inverter, Cascaded H- Bridge multilevel inverter, Multicarrier pulse width modulation, Total harmonic distortion.

Keywords: Multilevel inverter, Cascaded H- Bridge multilevel inverter, Multicarrier pulse width modulation, Total harmonic distortion. Analysis Of Total Harmonic Distortion Using Multicarrier Pulse Width Modulation M.S.Sivagamasundari *, Dr.P.Melba Mary ** *(Assistant Professor, Department of EEE,V V College of Engineering,Tisaiyanvilai)

More information

A Single-Phase Carrier Phase-shifted PWM Multilevel Inverter for 9-level with Reduced Switching Devices

A Single-Phase Carrier Phase-shifted PWM Multilevel Inverter for 9-level with Reduced Switching Devices International Journal of Science, Engineering and Technology Research (IJSETR), Volume 3, Issue 5, May 4 A SinglePhase Carrier Phaseshifted PWM Multilevel Inverter for 9level with Reduced Switching Devices

More information

Analysis And Comparison Of Flying Capacitor And Modular Multilevel Converters Using SPWM

Analysis And Comparison Of Flying Capacitor And Modular Multilevel Converters Using SPWM Analysis And Comparison Of Flying Capacitor And Modular Multilevel Converters Using SPWM Akhila A M.Tech Student, Dept. Electrical and Electronics Engineering, Mar Baselios College of Engineering and Technology,

More information

Simulation of Three Phase Cascaded H Bridge Inverter for Power Conditioning Using Solar Photovoltaic System

Simulation of Three Phase Cascaded H Bridge Inverter for Power Conditioning Using Solar Photovoltaic System Simulation of Three Phase Cascaded H Bridge Inverter for Power Conditioning Using Solar Photovoltaic System 1 G.Balasundaram, 2 Dr.S.Arumugam, 3 C.Dinakaran 1 Research Scholar - Department of EEE, St.

More information

ISSN Vol.05,Issue.05, May-2017, Pages:

ISSN Vol.05,Issue.05, May-2017, Pages: WWW.IJITECH.ORG ISSN 2321-8665 Vol.05,Issue.05, May-2017, Pages:0777-0781 Implementation of A Multi-Level Inverter with Reduced Number of Switches Using Different PWM Techniques T. RANGA 1, P. JANARDHAN

More information

SIMULATION OF THREE PHASE MULTI- LEVEL INVERTER WITH LESS NUMBER OF POWER SWITCHES USING PWM METHODS

SIMULATION OF THREE PHASE MULTI- LEVEL INVERTER WITH LESS NUMBER OF POWER SWITCHES USING PWM METHODS SIMULATION OF THREE PHASE MULTI- LEVEL INVERTER WITH LESS NUMBER OF POWER SWITCHES USING PWM METHODS P.Sai Sampath Kumar 1, K.Rajasekhar 2, M.Jambulaiah 3 1 (Assistant professor in EEE Department, RGM

More information

Symmetrical Multilevel Inverter with Reduced Number of switches With Level Doubling Network

Symmetrical Multilevel Inverter with Reduced Number of switches With Level Doubling Network International Journal of Engineering Research and Development e-issn: 2278-067X, p-issn: 2278-800X, www.ijerd.com Volume 12, Issue 10 (October 2016), PP.70-74 Symmetrical Multilevel Inverter with Reduced

More information

Simulation & Implementation Of Three Phase Induction Motor On Single Phase By Using PWM Techniques

Simulation & Implementation Of Three Phase Induction Motor On Single Phase By Using PWM Techniques Simulation & Implementation Of Three Phase Induction Motor On Single Phase By Using PWM Techniques Ashwini Kadam 1,A.N.Shaikh 2 1 Student, Department of Electronics Engineering, BAMUniversity,akadam572@gmail.com,9960158714

More information

A Carrier Overlapping PWM Technique for Seven Level Asymmetrical Multilevel Inverter with various References

A Carrier Overlapping PWM Technique for Seven Level Asymmetrical Multilevel Inverter with various References A Carrier Overlapping PWM Technique for Seven Level Asymmetrical Multilevel Inverter with various References Johnson Uthayakumar R. 1, Natarajan S.P. 2, Bensraj R. 3 1 Research Scholar, Department of Electronics

More information

A NOVEL APPROACH TO ENHANCE THE POWER QUALITY USING CMLI BASED CUSTOM POWER DEVICES

A NOVEL APPROACH TO ENHANCE THE POWER QUALITY USING CMLI BASED CUSTOM POWER DEVICES A NOVEL APPROACH TO ENHANCE THE POWER QUALITY USING CMLI BASED CUSTOM POWER DEVICES 1 M. KAVITHA, 2 A. SREEKANTH REDDY & 3 D. MOHAN REDDY Department of Computational Engineering, RGUKT, RK Valley, Kadapa

More information

Study of five level inverter for harmonic elimination

Study of five level inverter for harmonic elimination Study of five level for harmonic elimination Farha Qureshi1, Surbhi Shrivastava 2 1 Student, Electrical Engineering Department, W.C.E.M, Maharashtra, India 2 Professor, Electrical Engineering Department,

More information

A NOVEL SWITCHING PATTERN OF CASCADED MULTILEVEL INVERTERS FED BLDC DRIVE USING DIFFERENT MODULATION SCHEMES

A NOVEL SWITCHING PATTERN OF CASCADED MULTILEVEL INVERTERS FED BLDC DRIVE USING DIFFERENT MODULATION SCHEMES International Journal of Electrical and Electronics Engineering Research (IJEEER) ISSN(P): 2250-155X; ISSN(E): 2278-943X Vol. 3, Issue 5, Dec 2013, 243-252 TJPRC Pvt. Ltd. A NOVEL SWITCHING PATTERN OF

More information

SEVEN LEVEL HYBRID ACTIVE NEUTRAL POINT CLAMPED FLYING CAPACITOR INVERTER

SEVEN LEVEL HYBRID ACTIVE NEUTRAL POINT CLAMPED FLYING CAPACITOR INVERTER SEVEN LEVEL HYBRID ACTIVE NEUTRAL POINT CLAMPED FLYING CAPACITOR INVERTER 1 GOVINDARAJULU.D, 2 NAGULU.SK 1,2 Dept. of EEE, Eluru college of Engineering & Technology, Eluru, India Abstract Multilevel converters

More information

SWITCHING FREQUENCY HARMONIC SELECTION FOR SINGLE PHASE MULTILEVEL CASCADED H-BRIDGE INVERTERS

SWITCHING FREQUENCY HARMONIC SELECTION FOR SINGLE PHASE MULTILEVEL CASCADED H-BRIDGE INVERTERS International Journal of Electrical and Electronics Engineering Research (IJEEER) ISSN 2250-155X Vol. 3, Issue 2, Jun 2013, 249-260 TJPRC Pvt. Ltd. SWITCHING FREQUENCY HARMONIC SELECTION FOR SINGLE PHASE

More information

NEW VARIABLE AMPLITUDE CARRIER OVERLAPPING PWM METHODS FOR THREE PHASE FIVE LEVEL CASCADED INVERTER

NEW VARIABLE AMPLITUDE CARRIER OVERLAPPING PWM METHODS FOR THREE PHASE FIVE LEVEL CASCADED INVERTER NEW VARIABLE AMPLITUDE CARRIER OVERLAPPING PWM METHODS FOR THREE PHASE FIVE LEVEL CASCADED INVERTER 1 C.R.BALAMURUGAN, 2 S.P.NATARAJAN. 3 M.ARUMUGAM 1 Arunai Engineering College, Department of EEE, Tiruvannamalai,

More information

Hardware Implementation of SPWM Based Diode Clamped Multilevel Invertr

Hardware Implementation of SPWM Based Diode Clamped Multilevel Invertr Hardware Implementation of SPWM Based Diode Clamped Multilevel Invertr Darshni M. Shukla Electrical Engineering Department Government Engineering College Valsad, India darshnishukla@yahoo.com Abstract:

More information

IJSRD - International Journal for Scientific Research & Development Vol. 4, Issue 04, 2016 ISSN (online):

IJSRD - International Journal for Scientific Research & Development Vol. 4, Issue 04, 2016 ISSN (online): IJSRD - International Journal for Scientific Research & Development Vol. 4, Issue 04, 2016 ISSN (online): 2321-0613 Total Harmonic Distortion Analysis of Diode Clamped Multilevel Inverter with Resistive

More information

Harmonic Reduction in Induction Motor: Multilevel Inverter

Harmonic Reduction in Induction Motor: Multilevel Inverter International Journal of Multidisciplinary and Current Research Research Article ISSN: 2321-3124 Available at: http://ijmcr.com Harmonic Reduction in Induction Motor: Multilevel Inverter D. Suganyadevi,

More information

Implementation of a Low Cost PWM Voltage Source Multilevel Inverter

Implementation of a Low Cost PWM Voltage Source Multilevel Inverter International Journal of Engineering and Technology Volume No., February, 01 Implementation of a Low Cost PWM Voltage Source Multilevel Inverter Neelashetty Kashappa 1, Ramesh Reddy K 1 EEE Department,

More information

Performance Evaluation of Single Phase H-Bridge Type Diode Clamped Five Level Inverter

Performance Evaluation of Single Phase H-Bridge Type Diode Clamped Five Level Inverter Vol., Issue.4, July-Aug pp-98-93 ISSN: 49-6645 Performance Evaluation of Single Phase H-Bridge Type Diode Clamped Five Level Inverter E.Sambath, S.P. Natarajan, C.R.Balamurugan 3, Department of EIE, Annamalai

More information

A New Multilevel Inverter Topology with Reduced Number of Power Switches

A New Multilevel Inverter Topology with Reduced Number of Power Switches A New Multilevel Inverter Topology with Reduced Number of Power Switches L. M. A.Beigi 1, N. A. Azli 2, F. Khosravi 3, E. Najafi 4, and A. Kaykhosravi 5 Faculty of Electrical Engineering, Universiti Teknologi

More information

Analysis of Asymmetrical Cascaded 7 Level and 9 Level Multilevel Inverter Design for Asynchronous Motor

Analysis of Asymmetrical Cascaded 7 Level and 9 Level Multilevel Inverter Design for Asynchronous Motor Analysis of Asymmetrical Cascaded 7 Level and 9 Level Multilevel Inverter Design for Asynchronous Motor Nayna Bhargava Dept. of Electrical Engineering SATI, Vidisha Madhya Pradesh, India Sanjeev Gupta

More information

International Journal of Advance Engineering and Research Development

International Journal of Advance Engineering and Research Development Scientific Journal of Impact Factor(SJIF): 3.134 e-issn(o): 2348-4470 p-issn(p): 2348-6406 International Journal of Advance Engineering and Research Development Volume 2,Issue 4, April -2015 Reduction

More information

Modified Transistor Clamped H-bridge-based Cascaded Multilevel inverter with high reliability.

Modified Transistor Clamped H-bridge-based Cascaded Multilevel inverter with high reliability. Modified Transistor Clamped H-bridge-based Cascaded Multilevel inverter with high reliability. Soujanya Kulkarni (PG Scholar) 1, Sanjeev Kumar R A (Asst.Professor) 2 Department of Electrical and Electronics

More information

Enhanced Performance of Multilevel Inverter Fed Induction Motor Drive

Enhanced Performance of Multilevel Inverter Fed Induction Motor Drive Enhanced Performance of Multilevel Inverter Fed Induction Motor Drive Venkata Anil Babu Polisetty 1, B.R.Narendra 2 PG Student [PE], Dept. of EEE, DVR. & Dr.H.S.MIC College of Technology, AP, India 1 Associate

More information

Simulation of Five-Level Inverter with Sinusoidal PWM Carrier Technique Using MATLAB/Simulink

Simulation of Five-Level Inverter with Sinusoidal PWM Carrier Technique Using MATLAB/Simulink International Journal of Electrical Engineering. ISSN 0974-2158 Volume 7, Number 3 (2014), pp. 367-376 International Research Publication House http://www.irphouse.com Simulation of Five-Level Inverter

More information

Analysis of New 7- Level an Asymmetrical Multilevel Inverter Topology with Reduced Switching Devices

Analysis of New 7- Level an Asymmetrical Multilevel Inverter Topology with Reduced Switching Devices lume 6, Issue 6, June 2017, ISSN: 2278-7798 Analysis of New 7- Level an Asymmetrical Multilevel Inverter Topology with Reduced Switching Devices Nikhil Agrawal, Praveen Bansal Abstract Inverter is a power

More information

Analysis of Cascaded Multilevel Inverters with Series Connection of H- Bridge in PV Grid

Analysis of Cascaded Multilevel Inverters with Series Connection of H- Bridge in PV Grid Analysis of Cascaded Multilevel Inverters with Series Connection of H- Bridge in PV Grid Mr.D.Santhosh Kumar Yadav, Mr.T.Manidhar, Mr.K.S.Mann ABSTRACT Multilevel inverter is recognized as an important

More information

Speed control of Induction Motor drive using five level Multilevel inverter

Speed control of Induction Motor drive using five level Multilevel inverter Speed control of Induction Motor drive using five level Multilevel inverter Siddayya hiremath 1, Dr. Basavaraj Amarapur 2 [1,2] Dept of Electrical & Electronics Engg,Poojya Doddappa Appa college of Engg,

More information

Simulation and Comparison of Twenty Five Level Diode Clamped & Cascaded H-Bridge Multilevel Inverter

Simulation and Comparison of Twenty Five Level Diode Clamped & Cascaded H-Bridge Multilevel Inverter Simulation and Comparison of Twenty Five Level Diode Clamped & Cascaded H-Bridge Multilevel Inverter S. R. Reddy*(C.A.), P. V. Prasad** and G. N. Srinivas*** Abstract: This paper presents the comparative

More information

Analysis and Simulation of Multilevel DC-link Inverter Topology using Series-Parallel Switches

Analysis and Simulation of Multilevel DC-link Inverter Topology using Series-Parallel Switches Analysis and Simulation of Multilevel DC-link Inverter Topology using Series-Parallel Switches Raj Kiran Pandey 1, Ashok Verma 2, S. S. Thakur 3 1 PG Student, Electrical Engineering Department, S.A.T.I.,

More information

29 Level H- Bridge VSC for HVDC Application

29 Level H- Bridge VSC for HVDC Application 29 Level H- Bridge VSC for HVDC Application Syamdev.C.S 1, Asha Anu Kurian 2 PG Scholar, SAINTGITS College of Engineering, Kottayam, Kerala, India 1 Assistant Professor, SAINTGITS College of Engineering,

More information

Study of Unsymmetrical Cascade H-bridge Multilevel Inverter Design for Induction Motor

Study of Unsymmetrical Cascade H-bridge Multilevel Inverter Design for Induction Motor Study of Unsymmetrical Cascade H-bridge Multilevel Inverter Design for Induction Motor Pinky Arathe 1, Prof. Sunil Kumar Bhatt 2 1Research scholar, Central India Institute of Technology, Indore, (M. P.),

More information

Comparison of carrier based PWM methods for Cascaded H-Bridge Multilevel Inverter

Comparison of carrier based PWM methods for Cascaded H-Bridge Multilevel Inverter IJSRD - International Journal for Scientific Research & Development Vol. 2, Issue 01, 2014 ISSN (online): 2321-0613 Comparison of carrier based PWM methods for Cascaded H-Bridge Multilevel Inverter Hardik

More information

Hybrid Modulation Technique for Cascaded Multilevel Inverter for High Power and High Quality Applications in Renewable Energy Systems

Hybrid Modulation Technique for Cascaded Multilevel Inverter for High Power and High Quality Applications in Renewable Energy Systems International Journal of Electronic and Electrical Engineering. ISSN 0974-2174 Volume 5, Number 1 (2012), pp. 59-68 International Research Publication House http://www.irphouse.com Hybrid Modulation Technique

More information

Performance Evaluation of a Cascaded Multilevel Inverter with a Single DC Source using ISCPWM

Performance Evaluation of a Cascaded Multilevel Inverter with a Single DC Source using ISCPWM International Journal of Electrical Engineering. ISSN 0974-2158 Volume 5, Number 1 (2012), pp. 49-60 International Research Publication House http://www.irphouse.com Performance Evaluation of a Cascaded

More information

Harmonic Evaluation of Multicarrier Pwm Techniques for Cascaded Multilevel Inverter

Harmonic Evaluation of Multicarrier Pwm Techniques for Cascaded Multilevel Inverter Middle-East Journal of Scientific Research 20 (7): 819-824, 2014 ISSN 1990-9233 IDOSI Publications, 2014 DOI: 10.5829/idosi.mejsr.2014.20.07.214 Harmonic Evaluation of Multicarrier Pwm Techniques for Cascaded

More information

Ripple Reduction Using Seven-Level Shunt Active Power Filter for High-Power Drives

Ripple Reduction Using Seven-Level Shunt Active Power Filter for High-Power Drives D. Prasad et. al. / International Journal of New Technologies in Science and Engineering Vol. 2, Issue 6,Dec 2015, ISSN 2349-0780 Ripple Reduction Using Seven-Level Shunt Active Power Filter for High-Power

More information

Five Level Output Generation for Hybrid Neutral Point Clamped Inverter using Sampled Amplitude Space Vector PWM

Five Level Output Generation for Hybrid Neutral Point Clamped Inverter using Sampled Amplitude Space Vector PWM Five Level Output Generation for Hybrid Neutral Point Clamped Inverter using Sampled Amplitude Space Vector PWM Honeymol Mathew PG Scholar, Dept of Electrical and Electronics Engg, St. Joseph College of

More information

Comparison of Multi Carrier PWM Techniques applied to Five Level CHB Inverter

Comparison of Multi Carrier PWM Techniques applied to Five Level CHB Inverter Volume 114 No. 7 2017, 77-87 ISSN: 1311-8080 (printed version); ISSN: 1314-3395 (on-line version) url: http://www.ijpam.eu ijpam.eu Comparison of Multi Carrier PWM Techniques applied to Five Level CHB

More information

Performance Study of Multiphase Multilevel Inverter Rajshree Bansod*, Prof. S. C. Rangari**

Performance Study of Multiphase Multilevel Inverter Rajshree Bansod*, Prof. S. C. Rangari** International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 International Conference on Industrial Automation and Computing (ICIAC- 12-13 th April 214) RESEARCH ARTICLE OPEN

More information

Switching of Three Phase Cascade Multilevel Inverter Fed Induction Motor Drive

Switching of Three Phase Cascade Multilevel Inverter Fed Induction Motor Drive pp 36 40 Krishi Sanskriti Publications http://www.krishisanskriti.org/areee.html Switching of Three Phase Cascade Multilevel Inverter Fed Induction Motor Drive Ms. Preeti 1, Prof. Ravi Gupta 2 1 Electrical

More information

Modified Multilevel Inverter Topology for Driving a Single Phase Induction Motor

Modified Multilevel Inverter Topology for Driving a Single Phase Induction Motor Modified Multilevel Inverter Topology for Driving a Single Phase Induction Motor Divya Subramanian 1, Rebiya Rasheed 2 M.Tech Student, Federal Institute of Science And Technology, Ernakulam, Kerala, India

More information

Reduction in Total Harmonic Distortion Using Multilevel Inverters

Reduction in Total Harmonic Distortion Using Multilevel Inverters Reduction in Total Harmonic Distortion Using Multilevel Inverters Apurva Tomar 1, Dr. Shailja Shukla 2 1 ME (Control System), Department of Electrical Engineering, Jabalpur Engineering College, Jabalpur,

More information

Design of Multi-Level Inverter and Its Application As Statcom to Compensate Voltage Sags Due to Faults

Design of Multi-Level Inverter and Its Application As Statcom to Compensate Voltage Sags Due to Faults International Journal of Engineering Research and Development e-issn: 2278-067X, p-issn: 2278-800X, www.ijerd.com Volume 3, Issue 6 (September 2012), PP. 20-25 Design of Multi-Level Inverter and Its Application

More information

PF and THD Measurement for Power Electronic Converter

PF and THD Measurement for Power Electronic Converter PF and THD Measurement for Power Electronic Converter Mr.V.M.Deshmukh, Ms.V.L.Jadhav Department name: E&TC, E&TC, And Position: Assistant Professor, Lecturer Email: deshvm123@yahoo.co.in, vandanajadhav19jan@gmail.com

More information

CHAPTER 2 CONTROL TECHNIQUES FOR MULTILEVEL VOLTAGE SOURCE INVERTERS

CHAPTER 2 CONTROL TECHNIQUES FOR MULTILEVEL VOLTAGE SOURCE INVERTERS 19 CHAPTER 2 CONTROL TECHNIQUES FOR MULTILEVEL VOLTAGE SOURCE INVERTERS 2.1 INTRODUCTION Pulse Width Modulation (PWM) techniques for two level inverters have been studied extensively during the past decades.

More information

Harmonic Analysis & Filter Design for a Novel Multilevel Inverter

Harmonic Analysis & Filter Design for a Novel Multilevel Inverter Harmonic Analysis & Filter Design for a Novel Multilevel Inverter Rashmy Deepak 1, Sandeep M P 2 RNS Institute of Technology, VTU, Bangalore, India rashmydeepak@gmail.com 1, sandeepmp44@gmail.com 2 Abstract

More information

Speed Control Of DC Motor Using Cascaded H-Bridge Multilevel Inverter

Speed Control Of DC Motor Using Cascaded H-Bridge Multilevel Inverter ISSN: 2278 0211 (Online) Speed Control Of DC Motor Using Cascaded H-Bridge Multilevel Inverter R.K Arvind Shriram Assistant Professor,Department of Electrical and Electronics, Meenakshi Sundararajan Engineering

More information

Comparative Evaluation of Three Phase Three Level Neutral Point Clamped Z-Source Inverters using Advanced PWM Control Strategies

Comparative Evaluation of Three Phase Three Level Neutral Point Clamped Z-Source Inverters using Advanced PWM Control Strategies International Journal of Electronic and Electrical Engineering. ISSN 0974-2174 Volume 5, Number 3 (2012), pp. 239-254 International Research Publication House http://www.irphouse.com Comparative Evaluation

More information

Development of Multilevel Inverters for Control Applications

Development of Multilevel Inverters for Control Applications International Research Journal of Engineering and Technology (IRJET) e-issn: 2395-56 Volume: 3 Issue: 1 Jan-216 www.irjet.net p-issn: 2395-72 Development of Multilevel Inverters for Control Applications

More information

Modelling and Simulation of New PV-Battery Based Hybrid Energy System for Z source Inverter using SVPWM fed Industrial Applications

Modelling and Simulation of New PV-Battery Based Hybrid Energy System for Z source Inverter using SVPWM fed Industrial Applications Modelling and Simulation of New PV-Battery Based Hybrid Energy System for Z source Inverter using SVPWM fed Industrial Applications VEERESH M-Tech Scholar Department of Electrical & Electronics Engineering,

More information

Simulation of Multilevel Inverter Using PSIM

Simulation of Multilevel Inverter Using PSIM Simulation of Multilevel Inverter Using PSIM Darshan.S.Patel M.Tech (Power Electronics & Drives) Assistant Professor Department of Electrical Engineering Sankalchand Patel College of Engineerig-Visnagar

More information

MODIFIED CASCADED MULTILEVEL INVERTER WITH GA TO REDUCE LINE TO LINE VOLTAGE THD

MODIFIED CASCADED MULTILEVEL INVERTER WITH GA TO REDUCE LINE TO LINE VOLTAGE THD INTERNATIONAL JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY (IJEET) Proceedings of the International Conference on Emerging Trends in Engineering and Management (ICETEM14) ISSN 0976 6545(Print) ISSN 0976

More information

Comparison between Conventional and Modified Cascaded H-Bridge Multilevel Inverter-Fed Drive

Comparison between Conventional and Modified Cascaded H-Bridge Multilevel Inverter-Fed Drive Comparison between Conventional and Modified Cascaded H-Bridge Multilevel Inverter-Fed Drive Gleena Varghese 1, Tissa Tom 2, Jithin K Sajeev 3 PG Student, Dept. of Electrical and Electronics Engg., St.Joseph

More information

II. WORKING PRINCIPLE The block diagram depicting the working principle of the proposed topology is as given below in Fig.2.

II. WORKING PRINCIPLE The block diagram depicting the working principle of the proposed topology is as given below in Fig.2. PIC Based Seven-Level Cascaded H-Bridge Multilevel Inverter R.M.Sekar, Baladhandapani.R Abstract- This paper presents a multilevel inverter topology in which a low switching frequency is made use taking

More information

A New Single-Phase Multilevel Inverter with Reduced Number of Switches for Solar Applications

A New Single-Phase Multilevel Inverter with Reduced Number of Switches for Solar Applications I J C T A, 9(15), 2016, pp. 6983-6992 International Science Press A New Single-Phase Multilevel Inverter with Reduced Number of Switches for Solar Applications M. Arun Noyal Doss*, K. Harsha**, K. Mohanraj*

More information

Australian Journal of Basic and Applied Sciences. Simulation and Analysis of Closed loop Control of Multilevel Inverter fed AC Drives

Australian Journal of Basic and Applied Sciences. Simulation and Analysis of Closed loop Control of Multilevel Inverter fed AC Drives AENSI Journals Australian Journal of Basic and Applied Sciences ISSN:1991-8178 Journal home page: www.ajbasweb.com Simulation and Analysis of Closed loop Control of Multilevel Inverter fed AC Drives 1

More information

SIMULATION AND IMPLEMENTATION OF MULTILEVEL INVERTER BASED INDUCTION MOTOR DRIVE BASED ON PWM TECHNIQUES

SIMULATION AND IMPLEMENTATION OF MULTILEVEL INVERTER BASED INDUCTION MOTOR DRIVE BASED ON PWM TECHNIQUES SIMULATION AND IMPLEMENTATION OF MULTILEVEL INVERTER BASED INDUCTION MOTOR DRIVE BASED ON PWM TECHNIQUES 1 CH.Manasa, 2 K.Uma, 3 D.Bhavana Students of B.Tech, Electrical and Electronics Department BRECW,

More information

Phase Shift Modulation of a Single Dc Source Cascaded H-Bridge Multilevel Inverter for Capacitor Voltage Regulation with Equal Power Distribution

Phase Shift Modulation of a Single Dc Source Cascaded H-Bridge Multilevel Inverter for Capacitor Voltage Regulation with Equal Power Distribution Phase Shift Modulation of a Single Dc Source Cascaded H-Bridge Multilevel Inverter for Capacitor Voltage Regulation with Equal Power Distribution K.Srilatha 1, Prof. V.Bugga Rao 2 M.Tech Student, Department

More information

Bhanutej Jawabu Naveez Assistant Professor, Vignana Bharathi Institute of Technology, Aushapur, Ghatkesar, Hyderabad.

Bhanutej Jawabu Naveez Assistant Professor, Vignana Bharathi Institute of Technology, Aushapur, Ghatkesar, Hyderabad. Performance Analysis of Three Phase Five-Level Inverters Using Multi-Carrier PWM Technique Bhanutej Jawabu Naveez Assistant Professor, Vignana Bharathi Institute of Technology, Aushapur, Ghatkesar, Hyderabad.

More information

A NEW TOPOLOGY OF CASCADED MULTILEVEL INVERTER WITH SINGLE DC SOURCE

A NEW TOPOLOGY OF CASCADED MULTILEVEL INVERTER WITH SINGLE DC SOURCE A NEW TOPOLOGY OF CASCADED MULTILEVEL INVERTER WITH SINGLE DC SOURCE G.Kumara Swamy 1, R.Pradeepa 2 1 Associate professor, Dept of EEE, Rajeev Gandhi Memorial College, Nandyal, A.P, India 2 PG Student

More information

Implementation of Novel Low Cost Multilevel DC-Link Inverter with Harmonic Profile Improvement

Implementation of Novel Low Cost Multilevel DC-Link Inverter with Harmonic Profile Improvement Implementation of Novel Low Cost Multilevel DC-Lin Inverter with Harmonic Profile Improvement R. Kavitha 1 P. Dhanalashmi 2 Rani Thottungal 3 Abstract Harmonics is one of the most important criteria that

More information

Performance and Analysis of Hybrid Multilevel Inverter fed Induction Motor Drive

Performance and Analysis of Hybrid Multilevel Inverter fed Induction Motor Drive Vol.2, Issue.2, Mar-Apr 2012 pp-346-353 ISSN: 2249-6645 Performance and Analysis of Hybrid Multilevel Inverter fed Induction Motor Drive CHEKKA G K AYYAPPA KUMAR 1, V. ANJANI BABU 1, K.R.N.V.SUBBA RAO

More information

Performance Improvement of Multilevel Inverter through Trapezoidal Triangular Carrier based PWM

Performance Improvement of Multilevel Inverter through Trapezoidal Triangular Carrier based PWM Performance Improvement of Multilevel Inverter through Trapezoidal Triangular Carrier based PWM Kishor Thakre Department of Electrical Engineering National Institute of Technology Rourkela, India 769008

More information

Keywords Asymmetric MLI, Fixed frequency phase shift PWM (FFPSPWM), variable frequency phase shift PWM (VFPSPWM), Total Harmonic Distortion (THD).

Keywords Asymmetric MLI, Fixed frequency phase shift PWM (FFPSPWM), variable frequency phase shift PWM (VFPSPWM), Total Harmonic Distortion (THD). Radha Sree. K, Sivapathi.K, 1 Vardhaman.V, Dr.R.Seyezhai / International Journal of Vol. 2, Issue4, July-August 212, pp.22-23 A Comparative Study of Fixed Frequency and Variable Frequency Phase Shift PWM

More information

A Hybrid Cascaded Multilevel Inverter for Interfacing with Renewable Energy Resources

A Hybrid Cascaded Multilevel Inverter for Interfacing with Renewable Energy Resources A Hybrid Cascaded Multilevel Inverter for Interfacing with Renewable Energy Resources P.Umapathi Reddy 1, S.Sivanaga Raju 2 Professor, Dept. of EEE, Sree Vidyanikethan Engineering College, Tirupati, A.P.

More information

Simulation and Experimental Results of 7-Level Inverter System

Simulation and Experimental Results of 7-Level Inverter System Research Journal of Applied Sciences, Engineering and Technology 3(): 88-95, 0 ISSN: 040-7467 Maxwell Scientific Organization, 0 Received: November 3, 00 Accepted: January 0, 0 Published: February 0, 0

More information

REDUCTION OF ZERO SEQUENCE VOLTAGE USING MULTILEVEL INVERTER FED OPEN-END WINDING INDUCTION MOTOR DRIVE

REDUCTION OF ZERO SEQUENCE VOLTAGE USING MULTILEVEL INVERTER FED OPEN-END WINDING INDUCTION MOTOR DRIVE 52 Acta Electrotechnica et Informatica, Vol. 16, No. 4, 2016, 52 60, DOI:10.15546/aeei-2016-0032 REDUCTION OF ZERO SEQUENCE VOLTAGE USING MULTILEVEL INVERTER FED OPEN-END WINDING INDUCTION MOTOR DRIVE

More information

A Comparative Modelling Study of PWM Control Techniques for Multilevel Cascaded Inverter

A Comparative Modelling Study of PWM Control Techniques for Multilevel Cascaded Inverter A Comparative Modelling Study of PWM Control Techniques for Multilevel Cascaded Inverter Applied Power Electronics Laboratory, Department of Electrotechnics, University of Sciences and Technology of Oran,

More information

ANALYSIS AND IMPLEMENTATION OF FPGA CONTROL OF ASYMMETRIC MULTILEVEL INVERTER FOR FUEL CELL APPLICATIONS

ANALYSIS AND IMPLEMENTATION OF FPGA CONTROL OF ASYMMETRIC MULTILEVEL INVERTER FOR FUEL CELL APPLICATIONS ANALYSIS AND IMPLEMENTATION OF FPGA CONTROL OF ASYMMETRIC MULTILEVEL INVERTER FOR FUEL CELL APPLICATIONS Abstract S Dharani * & Dr.R.Seyezhai ** Department of EEE, SSN College of Engineering, Chennai,

More information

Voltage Unbalance Elimination in Multilevel Inverter using Coupled Inductor and Feedback Control

Voltage Unbalance Elimination in Multilevel Inverter using Coupled Inductor and Feedback Control Voltage Unbalance Elimination in Multilevel Inverter using Coupled Inductor and Feedback Control Divya S 1, G.Umamaheswari 2 PG student [Power Electronics and Drives], Department of EEE, Paavai Engineering

More information

International Journal Of Engineering And Computer Science ISSN: Volume 2 Issue 12 December, 2013 Page No Abstract

International Journal Of Engineering And Computer Science ISSN: Volume 2 Issue 12 December, 2013 Page No Abstract www.ijecs.in International Journal Of Engineering And Computer Science ISSN:2319-7242 Volume 2 Issue 12 December, 2013 Page No. 3566-3571 Modelling & Simulation of Three-phase Induction Motor Fed by an

More information