LM2662/LM2663 Switched Capacitor Voltage Converter

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Switched Capacitor Voltage Converter General Description The LM2662/LM2663 CMOS charge-pump voltage converter inverts a positive voltage in the range of 1.5V to 5.

1 Switched Capacitor Voltage Converter General Description The LM2662/LM2663 CMOS charge-pump voltage converter inverts a positive voltage in the range of 1.5V to 5.5V to the corresponding negative voltage. The LM2662/LM2663 uses two low cost capacitors to provide 200 ma of output current without the cost, size, and EMI related to inductor based converters. With an operating current of only 300 μa and operating efficiency greater than 90% at most loads, the LM2662/ LM2663 provides ideal performance for battery powered systems. The LM2662/LM2663 may also be used as a positive voltage doubler. The oscillator frequency can be lowered by adding an external capacitor to the OSC pin. Also, the OSC pin may be used to drive the LM2662/LM2663 with an external clock. For LM2662, a frequency control (FC) pin selects the oscillator frequency of 20 khz or 150 khz. For LM2663, an external shutdown (SD) pin replaces the FC pin. The SD pin can be used to disable the device and reduce the quiescent current to 10 μa. The oscillator frequency for LM2663 is 150 khz. Basic Application Circuits Voltage Inverter Features Inverts or doubles input supply voltage Narrow SO-8 Package 3.5Ω typical output resistance 86% typical conversion efficiency at 200 ma (LM2662) selectable oscillator frequency: 20 khz/150 khz (LM2663) low current shutdown mode Applications Laptop computers Cellular phones Medical instruments Operational amplifier power supplies Interface power supplies Handheld instruments Positive Voltage Doubler June 9, 2008 LM2662/LM2663 Switched Capacitor Voltage Converter Splitting V IN in Half National Semiconductor Corporation

2 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V+ to GND, or GND to OUT) 6V LV (OUT 0.3V) to (GND + 3V) FC, OSC, SD The least negative of (OUT 0.3V) or (V+ 6V) to (V V) V+ and OUT Continuous Output Current 250 ma Output Short-Circuit Duration to GND (Note 2) 1 sec. Power Dissipation (T A = 25 C) (Note 3) 735 mw T J Max (Note 3) 150 C θ JA (Note 3) 170 C/ W Operating Ambient Temperature Range 40 C to +85 C Operating Junction Temperature Range 40 C to +105 C Storage Temperature Range 65 C to +150 C Lead Temperature (Soldering, 10 seconds) 300 C ESD Rating 2 kv Electrical Characteristics Limits in standard typeface are for T J = 25 C, and limits in boldface type apply over the full Operating Junction Temperature Range. Unless otherwise specified: V+ = 5V, FC = Open, C 1 = C 2 = 47 μf.(note 4) Symbol Parameter Condition Min Typ Max Units V+ Supply Voltage R L = 1k Inverter, LV = Open I Q Supply Current No Load FC = V+ (LM2662) I SD Shutdown Supply Current (LM2663) Inverter, LV = GND V Doubler, LV = OUT LV = Open SD = Ground (LM2663) FC = Open V SD Shutdown Pin Input Voltage Shutdown Mode 2.0 (Note 5) ma 10 μa (LM2663) Normal Operation 0.3 I L Output Current 200 ma R OUT Output Resistance (Note 6) I L = 200 ma Ω f OSC Oscillator Frequency (Note 7) OSC = Open FC = Open 7 20 FC = V f SW Switching Frequency (Note 8) OSC = Open FC = Open FC = V I OSC OSC Input Current FC = Open ±2 FC = V+ ±10 P EFF Power Efficiency R L (500) between V + and OUT % I L = 200 ma to GND 86 V OEFF Voltage Conversion Efficiency No Load % V khz khz μa Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device beyond its rated operating conditions. Note 2: OUT may be shorted to GND for one second without damage. However, shorting OUT to V+ may damage the device and should be avoided. Also, for temperatures above 85 C, OUT must not be shorted to GND or V+, or device may be damaged. Note 3: The maximum allowable power dissipation is calculated by using P DMax = (T JMax T A )/θ JA, where T JMax is the maximum junction temperature, T A is the ambient temperature, and θ JA is the junction-to-ambient thermal resistance of the specified package. Note 4: In the test circuit, capacitors C 1 and C 2 are 47 μf, 0.2Ω maximum ESR capacitors. Capacitors with higher ESR will increase output resistance, reduce output voltage and efficiency. Note 5: In doubling mode, when V out > 5V, minimum input high for shutdown equals V out 3V. Note 6: Specified output resistance includes internal switch resistance and capacitor ESR. Note 7: For LM2663, the oscillator frequency is 150 khz. Note 8: The output switches operate at one half of the oscillator frequency, f OSC = 2f SW. 2

3 Test Circuits LM2662/LM FIGURE 1. LM2662 and LM2663 Test Circuits Typical Performance Characteristics (Circuit of Figure 1) Supply Current vs Supply Voltage Supply Current vs Oscillator Frequency Output Source Resistance vs Supply Voltage Output Source Resistance vs Temperature

Output Source Resistance vs Temperature Efficiency vs Load Current 10000341 10000342 Output Voltage Drop vs Load Current Efficiency vs Oscillator

4 Output Source Resistance vs Temperature Efficiency vs Load Current Output Voltage Drop vs Load Current Efficiency vs Oscillator Frequency Output Voltage vs Oscillator Frequency Oscillator Frequency vs External Capacitance

5 Oscillator Frequency vs Supply Voltage Oscillator Frequency vs Supply Voltage LM2662/LM Oscillator Frequency vs Temperature Oscillator Frequency vs Temperature Shutdown Supply Current vs Temperature (LM2663 Only)

6 Connection Diagrams 8-Lead SO (M) Top View Order Number LM2662M, LM2663M See NS Package Number M08A Pin Descriptions Pin Name Function Voltage Inverter 1 FC Frequency control for internal oscillator: Same as inverter. (LM2662) FC = open, f OSC = 20 khz (typ); 1 SD (LM2663) FC = V+, f OSC = 150 khz (typ); FC has no effect when OSC pin is driven externally. Shutdown control pin, tie this pin to the ground in normal operation. 2 CAP+ Connect this pin to the positive terminal of charge-pump capacitor. Same as inverter. Same as inverter. Voltage Doubler 3 GND Power supply ground input. Power supply positive voltage input. 4 CAP Connect this pin to the negative terminal of chargepump capacitor. Same as inverter. 5 OUT Negative voltage output. Power supply ground input. 6 LV Low-voltage operation input. Tie LV to GND when input voltage is less than 3.5V. Above 3.5V, LV can be connected to GND or left open. When driving OSC with an external clock, LV must be connected to GND. 7 OSC Oscillator control input. OSC is connected to an internal 15 pf capacitor. An external capacitor can be connected to slow the oscillator. Also, an external clock can be used to drive OSC. LV must be tied to OUT. 8 V+ Power supply positive voltage input. Positive voltage output. Same as inverter except that OSC cannot be driven by an external clock. Circuit Description The LM2662/LM2663 contains four large CMOS switches which are switched in a sequence to invert the input supply voltage. Energy transfer and storage are provided by external capacitors. Figure 2 illustrates the voltage conversion scheme. When S 1 and S 3 are closed, C 1 charges to the supply voltage V+. During this time interval switches S 2 and S 4 are open. In the second time interval, S 1 and S 3 are open and S 2 and S 4 are closed, C 1 is charging C 2. After a number of cycles, the voltage across C 2 will be pumped to V+. Since the anode of C 2 is connected to ground, the output at the cathode of C 2 equals (V+) assuming no load on C 2, no loss in the switches, and no ESR in the capacitors. In reality, the charge transfer efficiency depends on the switching frequency, the on-resistance of the switches, and the ESR of the capacitors. 6

7 FIGURE 2. Voltage Inverting Principle Application Information SIMPLE NEGATIVE VOLTAGE CONVERTER The main application of LM2662/LM2663 is to generate a negative supply voltage. The voltage inverter circuit uses only two external capacitors as shown in the Basic Application Circuits. The range of the input supply voltage is 1.5V to 5.5V. For a supply voltage less than 3.5V, the LV pin must be connected to ground to bypass the internal regulator circuitry. This gives the best performance in low voltage applications. If the supply voltage is greater than 3.5V, LV may be connected to ground or left open. The choice of leaving LV open simplifies the direct substitution of the LM2662/LM2663 for the LMC7660 Switched Capacitor Voltage Converter. The output characteristics of this circuit can be approximated by an ideal voltage source in series with a resistor. The voltage source equals (V+). The output resistance R out is a function of the ON resistance of the internal MOS switches, the oscillator frequency, and the capacitance and ESR of C 1 and C 2. Since the switching current charging and discharging C 1 is approximately twice as the output current, the effect of the ESR of the pumping capacitor C 1 is multiplied by four in the output resistance. The output capacitor C 2 is charging and discharging at a current approximately equal to the output current, therefore, its ESR only counts once in the output resistance. A good approximation is: where R SW is the sum of the ON resistance of the internal MOS switches shown in Figure 2. High value, low ESR capacitors will reduce the output resistance. Instead of increasing the capacitance, the oscillator frequency can be increased to reduce the 2/(f osc C 1 ) term. Once this term is trivial compared with R SW and ESRs, further increasing in oscillator frequency and capacitance will become ineffective. The peak-to-peak output voltage ripple is determined by the oscillator frequency, and the capacitance and ESR of the output capacitor C 2 : the device. The input voltage is applied to the GND pin with an allowable voltage from 2.5V to 5.5V. The V+ pin is used as the output. The LV pin and OUT pin must be connected to ground. The OSC pin can not be driven by an external clock in this operation mode. The unloaded output voltage is twice of the input voltage and is not reduced by the diode D 1 's forward drop. The Schottky diode D 1 is only needed for start-up. The internal oscillator circuit uses the V+ pin and the LV pin (connected to ground in the voltage doubler circuit) as its power rails. Voltage across V+ and LV must be larger than 1.5V to insure the operation of the oscillator. During start-up, D 1 is used to charge up the voltage at V+ pin to start the oscillator; also, it protects the device from turning-on its own parasitic diode and potentially latching-up. Therefore, the Schottky diode D 1 should have enough current carrying capability to charge the output capacitor at start-up, as well as a low forward voltage to prevent the internal parasitic diode from turning-on. A Schottky diode like 1N5817 can be used for most applications. If the input voltage ramp is less than 10V/ms, a smaller Schottky diode like MBR0520LT1 can be used to reduce the circuit size. SPLIT V+ IN HALF Another interesting application shown in the Basic Application Circuits is using the LM2662/LM2663 as a precision voltage divider. Since the off-voltage across each switch equals V IN / 2, the input voltage can be raised to +11V. CHANGING OSCILLATOR FREQUENCY For the LM2662, the internal oscillator frequency can be selected using the Frequency Control (FC) pin. When FC is open, the oscillator frequency is 20 khz; when FC is connected to V+, the frequency increases to 150 khz. A higher oscillator frequency allows smaller capacitors to be used for equivalent output resistance and ripple, but increases the typical supply current from 0.3 ma to 1.3 ma. The oscillator frequency can be lowered by adding an external capacitor between OSC and GND (See typical performance characteristics). Also, in the inverter mode, an external clock that swings within 100 mv of V+ and GND can be used to drive OSC. Any CMOS logic gate is suitable for driving OSC. LV must be grounded when driving OSC. The maximum external clock frequency is limited to 150 khz. The switching frequency of the converter (also called the charge pump frequency) is half of the oscillator frequency. Note: OSC cannot be driven by an external clock in the voltage-doubling mode. TABLE 1. LM2662 Oscillator Frequency Selection FC OSC Oscillator Open Open 20 khz V+ Open 150 khz Open or V+ External Capacitor See Typical Performance Characteristics N/A External Clock External Clock (inverter mode only) Frequency LM2662/LM2663 Again, using a low ESR capacitor will result in lower ripple. POSITIVE VOLTAGE DOUBLER The LM2662/LM2663 can operate as a positive voltage doubler (as shown in the Basic Application Circuits). The doubling function is achieved by reversing some of the connections to 7

8 TABLE 2. LM2663 Oscillator Frequency Selection Open OSC External Capacitor External Clock (inverter mode only) 150 khz Oscillator See Typical Performance Characteristics External Clock Frequency SHUTDOWN MODE For the LM2663, a shutdown (SD) pin is available to disable the device and reduce the quiescent current to 10 μa. Applying a voltage greater than 2V to the SD pin will bring the device into shutdown mode. While in normal operating mode, the SD pin is connected to ground. CAPACITOR SELECTION As discussed in the Simple Negative Voltage Converter section, the output resistance and ripple voltage are dependent on the capacitance and ESR values of the external capacitors. The output voltage drop is the load current times the output resistance, and the power efficiency is Where I Q (V+) is the quiescent power loss of the IC device, and I L 2R OUT is the conversion loss associated with the switch on-resistance, the two external capacitors and their ESRs. Low ESR capacitors (Table 3) are recommended for both capacitors to maximize efficiency, reduce the output voltage drop and voltage ripple. For convenience, C 1 and C 2 are usually chosen to be the same. The output resistance varies with the oscillator frequency and the capacitors. In Figure 3, the output resistance vs. oscillator frequency curves are drawn for four difference capacitor values. At very low frequency range, capacitance plays the most important role in determining the output resistance. Once the frequency is increased to some point (such as 100 khz for the 47 μf capacitors), the output resistance is dominated by the ON resistance of the internal switches and the ESRs of the external capacitors. A low value, smaller size capacitor usually has a higher ESR compared with a bigger size capacitor of the same type. Ceramic capacitors can be chosen for their lower ESR. As shown in Figure 3, in higher frequency range, the output resistance using the 10 μf ceramic capacitors is close to these using higher value tantalum capacitors FIGURE 3. Output Source Resistance vs Oscillator Frequency TABLE 3. Low ESR Capacitor Manufacturers Manufacturer Phone Capacitor Type Nichicon Corp. (708) PL, PF series, through-hole aluminum electrolytic AVX Corp. (803) TPS series, surface-mount tantalum Sprague (207) D, 594D, 595D series, surface-mount tantalum Sanyo (619) OS-CON series, through-hole aluminum electrolytic Murata (800) Ceramic chip capacitors Taiyo Yuden (800) Ceramic chip capacitors Tokin (408) Ceramic chip capacitors 8

9 Other Applications PARALLELING DEVICES Any number of LM2662s (or LM2663s) can be paralleled to reduce the output resistance. Each device must have its own pumping capacitor C 1, while only one output capacitor C out is needed as shown in Figure 4. The composite output resistance is: LM2662/LM FIGURE 4. Lowering Output Resistance by Paralleling Devices CASCADING DEVICES Cascading the LM2662s (or LM2663s) is an easy way to produce a greater negative voltage (as shown in Figure 5). If n is the integer representing the number of devices cascaded, the unloaded output voltage V out is ( nv in ). The effective output resistance is equal to the weighted sum of each individual device: Cascading is also possible when devices are operating in doubling mode. In Figure 7, two devices are cascaded to generate 3V in. An example of using the circuit in Figure 6 or Figure 7 is generating +15V or 15V from a +5V input. Note that, the number of n is practically limited since the increasing of n significantly reduces the efficiency and increases the output resistance and output voltage ripple. A three-stage cascade circuit shown in Figure 6 generates 3V in, from V in FIGURE 5. Increasing Output Voltage by Cascading Devices 9

10 FIGURE 6. Generating 3V in from +V in FIGURE 7. Generating +3V in from +V in REGULATING V out It is possible to regulate the output of the LM2662/LM2663 by use of a low dropout regulator (such as LP2986). The whole converter is depicted in Figure 8. This converter can give a regulated output from 1.5V to 5.5V by choosing the proper resistor ratio: where, V ref = 1.23V The error flag on pin 7 of the LP2986 goes low when the regulated output at pin 5 drops by about 5% below nominal. The LP2986 can be shutdown by taking pin 8 low. The less than 1 μa quiescent current in the shutdown mode is favorable for battery powered applications. 10

11 FIGURE 8. Combining LM2662/LM2663 with LP2986 to Make a Negative Adjustable Regulator Also, as shown in Figure 9 by operating the LM2662/LM2663 in voltage doubling mode and adding a low dropout regulator (such as LP2986) at the output, we can get +5V output from an input as low as +3.3V FIGURE 9. Generating +5V from +3.3V Input Voltage 11

12 Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead SO (M) Order Number LM2662M or LM2663M NS Package Number M08A 12

13 Notes LM2662/LM

Switched Capacitor Voltage Converter Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Design Support Amplifiers www.

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LM2662/LM2663 Switched Capacitor Voltage Converter

LM2662/LM2663 Switched Capacitor Voltage Converter General Description The LM2662/LM2663 CMOS charge-pump voltage converter inverts a positive voltage in the range of 1.5V to 5.5V to the corresponding