ABSTRACT. KUMAR, MISHA. Control Implementations for High Bandwidth Shunt Active Filter. (Under the direction of Dr Subhashish Bhattacharya).

Transcription

1 ABSTRACT KUMAR, MISHA. Control Implmntations for High Bandwidth Shunt Activ Filtr. (Undr th dirction of Dr Subhashish Bhattacharya). Th prsnc of multipl harmonics in th powr lin du to various nonlinar consumr loads lik adjustabl spd drivs, computrs, tc incits th nd for a high frquncy activ filtr invrtr so as to rduc th harmonic contnt at th point of common coupling (PCC) to b typically lowr than 5% (for SCR<20) and 12%(for SCR=50-100) as spcifid by IEEE 519 harmonic standards. Th objctiv of this thsis is to implmnt and compar thr diffrnt activ filtr control tchniqus. Ths control tchniqus ar basd on Load Currnt, Supply Currnt and V f (Voltag at Point of Common Coupling) harmonic xtraction mthods. Basd on th analysis don in this work, it has bn found that th V f harmonic xtraction mthod provids bttr compnsation (THD=3.34%) as compard to th Load currnt (THD=3.82%) and Supply Currnt (THD=6.24%) harmonic xtraction mthods. A hardwar board for harmonic xtraction has also bn built in th lab and its opration has bn vrifid using thr diffrnt typs of nonlinar loads. To provid th compnsation for multipl harmonics in th powr lin, thr is a nd for th currnt controllr which provids multipl frquncy currnt tracking. Thrfor, in this work, a Prdictiv currnt controllr has bn implmntd on an analog board as a part of activ filtr control for providing currnt rgulation. In th prdictiv currnt rgulator, dad tim compnsation (3µsc) has also bn prformd in ordr to rmov th ffct of sampling and invrtr dad tim dlay on PWM pulss and hnc on th invrtr output. An Activ Filtr invrtr has bn drivn in opn loop using RL load at a switching frquncy of 20 khz by th six pulss from prdictiv currnt controllr gnrating th compnsating currnt. It has bn vrifid that th compnsating currnt xactly matchs with th rfrnc harmonic currnt. For switching th activ filtr invrtr at high frquncis for fast tracking of th rfrnc currnt, thr is a nd to rduc th controllr implmntation dlays. Th Fild Programmabl Analog Array (FPAA) basd analog controllr has bn usd to implmnt a Synchronous Rfrnc Fram (SRF)

2 controllr algorithm for harmonic currnt xtraction and th rsults ar compard with th convntional digital implmntation on Fild Programmabl Gat Array (FPGA). Th FPAA basd analog controllr implmntation(17.4µsc) provs to b fastr than th digital FPGA implmntation(30µsc) and can b a potntial controllr for SiC basd activ filtr invrtrs with high switching frquncis of khz (10-20us).

3 Copyright 2011 by Misha Kumar All Rights Rsrvd

4 Control Implmntations for High Bandwidth Shunt Activ Filtr by Misha Kumar A thsis submittd to th Graduat Faculty of North Carolina Stat Univrsity in partial fulfillmnt of th rquirmnts for th dgr of Mastr of Scinc Elctrical Enginring Raligh, North Carolina 2011 APPROVED BY: Dr. Msut E. Baran Dr. Srdjan M. Lukic Dr. Subhashish Bhattacharya Chair of Advisory Committ

5 DEDICATION To my parnts and my brothr. ii

6 BIOGRAPHY Misha Kumar was born Novmbr 10,1987 in Nw Dlhi, Dlhi, India to Vinta Kumar and Raksh Kumar. Sh livd in Nw Dlhi whr sh compltd hr high school from Hansraj Modl School, Punjabi Bagh, Nw Dlhi in May, 2005.Sh thn pursud hr undrgraduat studis rciving Bachlor of Tchnology (Powr-Elctrical Enginring) from National Powr Training Institut (Guru Gobind Singh Indraprastha Univrsity) in Jun, 2009.Sinc thn sh has bn pursuing graduat studis at North Carolina Stat Univrsity, whil working as a Taching Assistant for Powr Elctronics cours at North Carolina Stat Univrsity and Summr Rsarch Assistant at FREEDM systm cntr undr th guidanc of Dr Subhashish Bhattacharya. Hr Primary rsarch intrsts includ Powr Quality improvmnt, Powr Elctronics and Rnwabl Enrgy Systms. iii

7 ACKNOWLEDGMENTS This thsis has bn succssful du to th support of FREEDM systm cntr, North Carolina Stat Univrsity. I would lik to xprss my gratitud to my advisor, Dr Subhashish Bhattacharya whos valuabl guidanc and support has hlpd m to str through all th challngs I facd during my rsarch. I would lik to thank my committ mmbrs Dr Msut E Baran and Dr Srdjan Lukic for giving m xcllnt undrstanding of courss lik Powr Systms, Rnwabl Enrgy Systms and Elctric Motor Drivs. I would lik to thank my frinds and fllow collagus Arvind Govindaraj, Siddharth Ballal, Urvir Singh, Arun Kadavlugu, Vijay Shanmugasundaram, Kamalsh Hatua, Awnsh Tripathi, Ankan D, Mihir Shah, Shailsh Notani, Priyadarshini Asokan, Eric Grn, Ankita Uprti, Moyn Ul Haq, Hsam Mirza, Babak Parkhidh, Edward Van Brunt, Ryan Mitl, Aaron Curry, Shaunta D. Mason, Danny Frgosi and Dpshikha Gangal. This thsis would not hav bn possibl without th countlss numbr of discussions and knowldg sharing sssions with thm. I would lik to thank my parnts, my brothr and sistr in law for thir lov, support and ncouragmnt throughout my carr. Last but not last, this thsis would not hav bn possibl by th constant motional and mntal support from my bst frind Karan Kapoor. Thank you for your lov and a vry undrstanding natur. Many thanks to all thos who mad this possibl. iv

8 TABLE OF CONTENTS LIST OF TABLES... viii LIST OF FIGURES... ix CHAPTER 1. INTRODUCTION Background a IEEE 519 Harmonic Standards b Control of Harmonics and thir Impacts Thsis Objctiv Outlin Glossary of Trms... 6 CHAPTER 2. ACTIVE FILTERS Rviw of Activ Filtr Topologis a Shunt Activ Filtr b Sris Activ Filtr c Hybrid Paralll Activ Filtr CHAPTER 3.SHUNT ACTIVE FILTER CONTROLLER Harmonic Extraction a Synchronous Rfrnc Fram Harmonic Extraction DC Bus Voltag Control Currnt Controllr a Prdictiv Currnt Controllr with charg rror control b Spac Vctor PWM and its implmntation in Analog Domain c Implmntation issus and Dad Tim Compnsation Bandwidth of Activ Filtr Invrtr v

9 3.5 Activ Filtr Systm Spcifications Simulink/MATLAB Modl and Simulation Rsults a Simulation Rsults of Systm without Activ Filtr b Activ Filtr Compnsation using Supply Currnt Harmonic Extraction Mthod c Activ Filtr Compnsation using Load Currnt Harmonic Extraction mthod d Activ Filtr Compnsation using V f (Voltag at PCC) Harmonic Extraction mthod Comparison btwn th thr diffrnt harmonic xtraction mthods Summary CHAPTER 4. FPAA AND FPGA IMPLEMENTATION OF SRF CONTROLLER Fild Programmabl Analog Arrays Simulation Rsults of Positiv Squnc SRF Controllr Using Simulink/MATLAB Implmntation of SRF Controllr on FPAA Implmntation of SRF Controllr on FPGA Comparison of Analog FPAA and Digital FPGA Controllr Outputs CHAPTER 5.HARDWARE IMPLEMENTATION OF SHUNT ACTIVE FILTER SYSTEM Nonlinar Load Spcifications a Diod Rctifir with DC sid Inductor, and DC sid Capacitor systm b AC Supply Sid Lin Inductor and Diod Rctifir with DC sid Capacitor systm c AC Supply Sid Lin Inductor, Diod Rctifir with DC sid Inductor, and DC sid Capacitor systm Harmonic Extraction on an Analog Board a Implmntation dlay of Analog harmonic xtractor b.i Load Currnt Harmonic Extraction Rsults vi

10 5.2.b.ii Vf (Voltag at PCC) Harmonic Extraction Rsults b.iii Supply Currnt Harmonic Extraction Mthod Rsults Prdictiv Currnt Controllr Implmntation on Analog Board Activ Filtr Invrtr Systm Summary CHAPTER 6.CONCLUSION REFERENCES vii

11 LIST OF TABLES Tabl I Th Harmonic Currnt Limits for Nonlinar Loads at th PCC 2 Tabl II Effct of Chang in K v in Total Harmonic Distortion (THD) of supply currnt wavform...36 viii

12 LIST OF FIGURES Figur 1.A Passiv Filtr Systm... 3 Figur 2.A Shunt Activ Filtr Systm... 7 Figur 3. Sris Activ Filtr Systm[10]... 9 Figur 4.Hybrid Paralll Activ Filtr Systm Figur 5.Block Diagram rprsntation of Supply Currnt, Load Currnt and V f harmonic xtraction mthod Figur 6.Harmonic Equivalnt Circuit of Activ Filtr Figur 7.Lad plus Proportional Charactristic of Activ Filtr Controllr (Rproducd from [9]) Figur 8.Prdictiv Currnt Controllr with charg rror control (Rproducd from [14]) Figur 9. Block diagram of th Analog Implmntation of th Spac Vctor PWM Tchniqu Figur 10.Paralll Passiv Filtr systm usd in Simulation Figur 11.PLECS Modl of a systm having Non-Linar Load Figur 12.Supply Currnt wavform for th systm without activ filtr Figur 13.FFT Analysis of th Supply Currnt Wavform for th systm without Activ Filtr Figur14. V fa (l-n Voltag at PCC) of th systm without activ filtr Figur 15.Simulink Modl of an Activ Filtr Controllr using Supply Currnt Harmonic Extraction mthod Figur 16.Supply Currnt wavform aftr th activ filtr compnsation using supply currnt harmonic xtraction mthod Figur 17.FFT Analysis of Supply Currnt Wavform aftr compnsation Figur 18.Compnsation currnt matching with th Load Currnt Extractd Harmonics Figur 19.DC Bus Voltag controlld at 750V ix

13 Figur 20.Simulink Modl of th Activ Filtr Controllr using Load Currnt Harmonic Extraction Mthod Figur 21.PLECS Modl of th Systm with Activ Filtr Figur 22.Supply Currnt Wavform aftr th activ filtr compnsation using load currnt harmonic xtraction mthod Figur 23.FFT Analysis of Supply Currnt Wavform aftr compnsation Figur 24.DC Bus Voltag Controlld at 680V Figur 25. Simulink Modl of th systm with activ filtr controllr using V f harmonic xtraction mthod Figur 26.Supply Currnt Wavform aftr compnsation using Vf harmonic xtraction mthod Figur 27.FFT Analysis of Supply currnt wavform aftr harmonic compnsation using V f harmonic xtraction mthod Figur 28. Compnsating currnt, th harmonic currnt xtractd from load currnt and V fa Figur 29. DC Bus Voltag Controlld at 750 V Figur 30. FPAA Configuration Diagram [16], [17] Figur 31. Anadigm s AN231E04 FPAA Evaluation Board Figur 32. I La,I Lb,I Lc wavform input to th SRF Controllr Figur 33. I, I wavform obtaind aftr th Park Transformation Ld Lq Fig34. I Lq vs I Ld Figur 35. I, I s hd s hq wavforms Figur 36. I hd and I La wavform Figur 37. Implmntation of Positiv Squnc SRF Controllr using Anadigm Dsignr 2 softwar x

14 Figur 38. Laboratory Stup of svn FPAA boards to implmnt Positiv Squnc SRF Controllr algorithm Figur 39.Oscilloscop output showing wavforms for I Ld ( bottom), I Lq ( top) s s Figur 40.Oscilloscop output showing wavforms for Ihq ( top), Ihd ( bottom) Figur 41.Dlay in Implmntation on FPAA(17.4µsc) Figur 42.Plot of I Lq vs I Ld Figur 43. Positiv Squnc SRF Controllr Implmntation on NI C-RIO(FPGA) using LABVIEW softwar Figur 44.Oscilloscop output showing wavforms for I, I, I ha hb hc Figur 45.Dlay in Implmntation on C-RIO(30µsc) Figur 46.Hardwar Stup of Shunt Activ Filtr Controllr and th Nonlinar Load Figur 47. Diod Rctifir with DC sid Inductor, and DC sid Capacitor systm Figur 48. Oscilloscop wavform for Scald I sa,i sb, I sc Figur 49. Oscilloscop Wavform for Scald Thr phas voltag V fa,v fb,v fc Figur 50. Diod Rctifir with AC supply sid Inductor and DC sid Capacitor systm Figur 51. Oscilloscop wavform for Scald I sa,i sb, I sc Figur 52. Oscilloscop Wavform for Scald Thr phas voltag V fa,v fb,v fc Figur 53. AC Supply Sid Lin Inductor, Diod Rctifir with DC sid Inductor, and DC sid Capacitor systm Figur 54.Oscilloscop wavform for Scald I sa,i sb, I sc Figur 55.Oscilloscop Wavform for Scald Thr phas voltag V fa,v fb,v fc Figur 56.Fast Fourir Transform (FFT) of th I sa wavform on oscilloscop xi

15 Figur 57.Magnitud Bod Plot of th 5 th ordr Buttrworth Filtr (Gain Normalizd to th Cut off Frquncy)(Rproducd from MAX280 Datasht) Figur 58.Oscilloscop wavform for I La (yllow),i hds (blu) Figur 59.Zoomd Oscilloscop wavform for I La (yllow),i hds (blu) showing a dlay of 4.8µsc Figur 60.Oscilloscop wavform for i La (blu), i ( pink), i ( grn) for load typ xplaind in sction d 5.1.c Figur 61. Oscilloscop wavform for i La (blu), invrtd low pass filtrd i d (pink), invrtd low pass filtrd i q (grn) Figur 62.Oscilloscop wavform of Figur 63. s i hd (pink), q s i hq (grn) for load typ xplaind in sction 5.1.c.. 58 s i hd (pink),i fa (grn),i fa -i s hd (yllow) Figur 64.Oscilloscop wavform for i La (grn), i (blu), d i q (pink)for load typ xplaind in sction 5.1.b Figur 65.Oscilloscop wavform for i La (grn), invrtd low pass filtrd pass filtrd i d (blu), invrtd low i q (pink) Figur 66. Oscilloscop wavform of s i hd (blu), Figur 67. Oscilloscop wavform for i La (grn), i (blu), s i hq (pink) for load typ xplaind in sction 5.1.b d i q (pink)for load typ xplaind in sction 5.1.a Figur 68. Oscilloscop wavform for i La (grn), invrtd low pass filtrd pass filtrd i d (blu), invrtd low i q (pink) Figur 69. Oscilloscop wavform of s i hd (blu), s i hq (pink) for load typ xplaind in sction 5.1.a. 60 xii

16 Figur 70.Oscilloscop wavform for V fa (pink), Figur 71. Oscilloscop wavform for V fa (pink), invrtd and filtrd Figur 72. Oscilloscop wavform for V fa (blu), V d (grn), V q (blu) V d (blu), V q (grn) s s V d (pink), V q (grn) Figur 73. Oscilloscop wavform for V fa (blu), s i hd (grn), s i hq (pink)(for K v =10) Figur 74. Oscilloscop wavform for i sa (pink), isd ( grn), isq( blu) Figur 75. Oscilloscop wavform for i sa (pink), invrtd low pass filtrd i sd (grn), invrtd low pass filtrd i sq (blu) Figur 76.Oscilloscop wavform for i sa (pink), i sd (grn) aftr gain ( KT ) s G( s) 1 ( KT ) s, i sq (blu) aftr gain ( KT ) s G( s),k=5,t= ( KT ) s Figur 77.Oscilloscop wavform for i sa (pink), s i hd (grn), s i hq (blu) Figur 78. SV * invds (blu), * SV invqs (grn)(activ Filtr invrtr rfrnc voltags for SVPWM) Figur 79. V, V, V (Thr phas activ filtr invrtr rfrnc voltag for SVPWM) * invan * invbn * invcn Figur 80.Tripln xtraction for th SVPWM tchniqu Figur 81.V amod,v bmod,v cmod (Thr phas modulating voltags for comparing with triangular wavform) Figur 82.Sampl and Hold(S/H) Pulss; S/H at T sw (blu),s/h at T sw /2(grn) Figur 83.V amod aftr sampl and hold opration Figur 84.Dlayd triangular wavform(dlayd by 3µsc from th sampling puls for invrtr dad tim compnsation) xiii

17 Figur 85.Invrtr pulss for switchs S1(blu),S3(pink) and S5(grn) Figur 86.Invrtr pulss S1,S3,S5 nclosd in on anothr in ordr and showing th SVPWM opration Figur 87.Invrtr dad band givn to S1 and S2 pulss Figur 88. Schmatic of th activ filtr invrtr systm implmntd in lab Figur 89. Th xprimntal stup of th activ filtr invrtr systm Figur 90.Invrtr trminal voltags; V invan, V invbn at DC bus Voltag = 200V Figur 91.DC bus Voltag(at 250V)(brown),Voltag across load(l-l)(blu),ifa(pink) Figur 92.I fa (masurd activ filtr invrtr currnt)(pink),i hds (d axis harmonic rfrnc currnt)(grn) xiv

18 CHAPTER 1. INTRODUCTION 1.1 Background With th advancmnt in Powr Elctronic tchnology, ths days various consumr and industrial loads in th powr systm ar nonlinar loads such as Adjustabl Spd Drivs with diod rctifir front nd, Computrs, Fax Machins, PLC s, High Powr diod Rctifirs, Cycloconvrtrs tc. Ths Nonlinar loads draw nonsinusoidal currnts from utilitis du to thir opration thrby causing a poor powr quality at th utility sid. Th harmonics ar gnratd whn nonlinar quipmnt draws currnt in short pulss. Ths harmonics in load currnt can somtims rsult in ovrhatd transformrs, ovrhatd nutrals, blown fuss,trippd circuit brakrs,incrasd losss in th lins, dcrasd powr factor, and can caus rsonanc with th capacitors connctd in paralll with th systm[2,3]. Harmonic distortion also causs inaccuracis in many dvics which rly on th lin voltag for timing. 1.1.a IEEE 519 Harmonic Standards With th incrasd us of static powr convrtr that rquir harmonic currnts from powr systm, th Static Powr Convrtr Committ of Industry Applications Socity rcognizd th potntial problm and startd work on a standard that would giv guidlins to usrs and nginr-architcts in th applications of static powr convrtr drivs and othr uss on lctric powr systms that containd capacitors. Th rsult was IEEE , IEEE Guid for harmonic control and Ractiv Compnsation of Static Powr convrtrs [4]. Th IEEE 519 harmonic standard sts th limit on th Total Harmonic Distortion (THD) causd by th Non Linar Load at th Point of Common Coupling (PCC).Tabl I shows th harmonic currnt limits for Non Linar Loads at th Point of Common Coupling with othr loads. Tabl I: Th Harmonic Currnt Limits for Non Linar Loads at th PCC [4] 1

19 Maximum Harmonic Currnt Distortion in % of Fundamntal Harmonic Ordr (Odd Harmonics) I sc /I L (SCR) <11 11 h h h 35 h 35 THD < > Whr I sc =Maximum Short Circuit currnt at th Point of Common Coupling, IL = Maximum Load currnt (Fundamntal Frquncy) at th Point of Common Coupling. Tabl I suggsts that th limitation on th harmonic currnt is basd on th siz of th consumr who is injcting th harmonic currnt and also on th siz of th powr systm to which h is connctd. If th siz of consumr load is low with rspct to powr systm, th largr is th prcntag of harmonic currnt th consumr is allowd to injct into th powr systm. 1.1.b Control of Harmonics and thir Impacts Commonly mployd solutions for harmonic problms ar: 1. Modify th Systm Frquncy rspons to avoid th advrs intraction with harmonic currnts. This can b don by adding or rmoving capacitor banks, changing thir sizs, adding shunt filtrs, inductors to dtun th systm away from harmful rsonancs.[5] 2. By mploying shunt filtrs to rmov harmonic currnts from th systm. Two typs of Filtr can b usd for this: 2

20 a. Passiv Filtrs: A Passiv filtr consists of a Sris/Paralll combination of an inductor, a capacitor and a rsistor spcially tund to filtr a particular frquncy currnt. Th impdanc of L-C tund filtr is lowr than th sourc impdanc at a particular harmonic frquncy in ordr to absorb that harmonic currnt. Passiv filtr hav an advantag of low cost, ar lss complicatd and hav high fficincy. Howvr, thy suffr from a srious limitation that thir prformanc gts affctd significantly du to th variation in th filtr componnt valus, filtr componnt tolranc, sourc impdanc, and frquncy of ac sourc [6, 8]. Also, thy may caus sris and load rsonancs in th systm. In this scnario, harmonic currnts can gt amplifid on th sourc sid and caus srious distortion in th voltag[6].th passiv filtrs also tnd to gt ovrloadd in cas th load harmonics incras[8]. A stiff utility systm poss gratr difficulty for dsign of passiv filtr bcaus sharp tuning and high quality factor ar rquird to sink harmonic currnt [7]. A typical passiv filtr tund for 5 th and 7 th harmonic applid to powr systm is as shown in figur1. Figur 1.A Passiv Filtr Systm 3

21 b. Activ Filtr: An Activ Filtr involvs th us of on or mor activ componnts such as a Voltag Sourc Invrtr which can b controlld in such a way so as to provid th compnsating currnt or voltag to th nonlinar load. In this way, th nonlinar load dos not draw th nonsinusoidal componnts from th sourc and thus th sourc bcoms fr of harmonics. Figur 2 shows a shunt activ filtr systm usd for providing th harmonic compnsation so as to mt IEEE 519 Standard at th point of common coupling. Th concpt of shunt activ filtring was first introducd by Gyugyi and Strycula in 1976[10].Sinc thn svral Activ Filtr topologis hav bn proposd, som of thm ar: i) Shunt Activ Filtrs ii) Sris Activ Filtrs iii) Hybrid Paralll Activ Filtrs Ths topologis hav bn discussd in dtail in th following chaptrs. Major Advantag of Activ Filtr ovr Passiv Filtr is that it can b controlld to compnsat for harmonics in such a way that THD lowr than 5% at th Point of Common Coupling can ffctivly b achivd. Th shunt Activ Filtr can also b mad to act as a damping dvic in a paralll rsonanc circuit formd by th passiv filtr and th powr supply systm by adopting a lad function in its controllr [9].Thus it can prvnt harmonic propagation rsulting from harmonic rsonancs. Brifly, Activ Filtrs can b dsignd to achiv following thr goals: Harmonic Compnsation Harmonic Damping Harmonic Isolation 4

22 1.2 Thsis Objctiv Th main objctiv of this thsis is to dvlop a controllr for 5 KVA Shunt Activ Filtr systm. Th shunt activ filtr systm consists of a 5KVA Activ Filtr invrtr, a harmonic xtractor and a currnt rgulator. Th harmonic xtractor is implmntd using thr diffrnt algorithms for harmonic currnt xtraction for comparison. Ths ar basd on Load currnt, Supply currnt and Vf (Voltag at th Point of Common Coupling) harmonic xtraction. Th currnt rgulator is implmntd using prdictiv currnt control mthod. An Activ filtr invrtr is rquird to b switchd at highr switching frquncis (50-100Khz) so as to rduc th harmonic contnt at th point of common coupling to b typically lowr than 5% as spcifid by IEEE 519 harmonic standard. An attmpt has bn mad in this thsis to implmnt th harmonic xtraction algorithm on an Analog Board, by using Fild Programmabl Analog Array (FPAA) and Fild Programmabl Gat Array (FPGA) and thn comparing th dlays in th implmntation on ach of thm. Various advantags and disadvantags of ach of th mthods ar also analyzd. 1.3 Outlin Chaptr 2 givs a rviw of diffrnt activ filtr topologis lik shunt activ filtr, sris activ filtr, hybrid paralll activ filtr. All of ths topologis ar compard with ach othr basd on th typ of loads thy can b applid for, rquird activ filtr rating and thir control tchniqu. Chaptr 3 discusss about thr diffrnt typs of harmonic xtraction mthods and thir comparison basd on thir application and thir prformanc to rduc Total Harmonic Distortion (THD).This chaptr also covrs th prdictiv currnt control tchniqu and its implmntation issus. Thr harmonic xtraction mthods running in closd loop hav bn prsntd along with thir simulation rsults. 5

23 Chaptr 4 discusss th implmntation of Synchronous Rfrnc Fram Controllr using Fild Programmabl Analog Array (FPAA) and Fild Programmabl Gat Array(FPGA). It has bn found that FPAA provid lowr implmntation dlay as compard to FPGA and hnc can prov a potntial mthod for driving SiC basd invrtrs at highr switching frquncis. Chaptr 5 discusss th hardwar implmntation of Shunt Activ Filtr Systm. Thr typs of loads hav bn usd to validat th thr harmonic xtraction mthods. This chaptr also includs th xprimntal rsults from th prdictiv currnt controllr board which rcivs its rfrnc signal from th harmonic xtraction board. Chaptr 6 givs th summary and th conclusion of th whol thsis work. 1.4 Glossary of Trms PCC-Point of Common Coupling THD-Total Harmonic Distortion FPAA-Fild Programmabl Analog Array FPGA-Fild Programmabl Gat Array SRF-Synchronous Rfrnc Fram VSI-Voltag Sourc Invrtr PWM-Puls Width Modulation LPF-Low Pass Filtr HPF-High Pass Filtr IRP-Instantanous Ractiv Powr S/H-Sampl and Hold 6

24 CHAPTER 2. ACTIVE FILTERS 2.1 Rviw of Activ Filtr Topologis 2.1.a Shunt Activ Filtr A Shunt Activ Filtr consists of a controlld Voltag Sourc Invrtr (VSI) connctd in paralll to th nonlinar load. A Shunt Activ Filtr compnsats for th harmonic currnt rquird by th load so that th load only draws a fundamntal currnt from th grid. Figur 2.A Shunt Activ Filtr Systm Thrfor, for a Shunt Activ Filtr, according to th Kirchhoff s currnt law at PCC, w can writ th following quation: I s I I (1) c L Whr I s is th supply currnt, I c is th compnsation currnt and I L is th load currnt as shown in Figur 2.Th Load currnt, I L, is comprisd of a fundamntal componnt, I f, and th harmonic 7

25 componnt, I h.if th harmonic componnt is mad qual to th compnsation currnt, I c,thn only th fundamntal currnt rquird by th load will com from th supply. Th compnsating currnt is supplid by th Activ Filtr Invrtr which has a DC link capacitor. Th capacitor voltag is hld constant with th hlp of fundamntal currnt from th grid. In a practical implmntation, a shunt activ filtr is always installd in paralll with a passiv filtr. Th shunt passiv filtr, as shown in Figur 2, hlps to absorb highr ordr harmonics and switching rippl. This hlps th activ filtr to function with rlativly smallr capacity [9]. A Shunt Activ Filtr Controllr, whos dsign is discussd in dtail in th following chaptr, compriss of: Harmonic Extractor-A Harmonic Extractor is rquird to gnrat a rfrnc for th compnsation currnt. A Harmonic Extractor tlls us what harmonics w nd to compnsat for. Currnt Rgulator-A Currnt rgulator compars th masurd compnsation currnt with th rfrnc and producs th dsird pulss for th Activ Filtr Invrtr. A Shunt Activ Filtr is suitd for inductiv or currnt sourc typ load such as thyristor rctifir. If a Shunt Activ Filtr is usd for voltag sourc typ load thn th injctd currnt may b divrtd to load causing its ovrloading [13]. 2.1.b Sris Activ Filtr A sris Activ filtr compnsats for th voltag harmonics rquird at th load trminals du to th natur of nonlinar load. Thrfor, th voltag at th sourc trminals bcoms fr of harmonics and supplis only th fundamntal currnt rquird by th load. Figur 3 shows a sris activ filtr systm. 8

26 Figur 3. Sris Activ Filtr Systm [10] Th voltags on th currnt sourcs ar V sa, V sb, V sc. Th rlation btwn th sourc voltag, th load voltag and th activ filtr voltag is givn by: Vsa Va Vca V V V sb b cb V sc V c V cc (2) Th basic sris activ filtr voltags ar synthsizd by thr singl phas convrtrs with a common dc capacitor. Th rfrnc voltag for ths convrtrs is calculatd by th activ filtr controllr which has input signals as load voltags and currnts using dual p-q thory (as mntiond in [10]). 9

27 A Sris Activ Filtr is suitabl only for Capacitiv or Voltag sourc typ load such as condnsr input typ diod rctifir capacitiv load [13].In cas of sris activ filtr, it is rquird to install a low impdanc quipmnt such as LC filtr or shunt condnsr in paralll to th load is th load is of currnt sourc typ or inductiv [13]. 2.1.c Hybrid Paralll Activ Filtr Hybrid paralll activ has an activ filtr in sris with a particular frquncy harmonic tund passiv filtr.th main advantag of this Hybrid filtr is that it rducs th VA rating of th activ filtr that nds to b installd in sris with th passiv filtr. A practical activ filtr should hav a VA rating lowr than 5% of th load VA rating [11]. Hybrid Activ filtrs improv compnsation charactristics of th passiv filtrs, making possibl rduction in th activ filtr rating [11].This is don by making th activ filtr controllr to implmnt a dynamically varying-ithr ngativ or positiv activ inductanc. Th controllr producs th rfrnc activ filtr invrtr voltag which is thn compard with th sin triangl to gnrat dsird PWM pulss. Th activ inductor invrtr rfrnc voltag, V Lcmdn is givn by [12]: di inv VLcmdn Lcmdn (3) dt th n harmonic Whr L cmdn is th positiv or ngativ activ inductanc to b synthsizd at n th harmonic frquncy. It is th inductanc which tuns L n -C n passiv filtr at n th harmonic frquncy. Figur 4 shows th Paralll hybrid activ filtr diagram. 10

28 Figur 4.Hybrid Paralll Activ Filtr Systm Th dsird valu of L cmdn is dtrmind by taking an rror btwn th masurd valu of th n th frquncy componnt of filtr currnt, i fn, and its rfrnc i fn * and passing it through a PI controllr[as mntiond in [12]. Th variabl inductanc controllr basd paralll hybrid activ filtr systm with fifth and svnth passiv filtrs can ffctivly provid harmonic compnsation of th load and can b mad to prvnt passiv filtr ovrloading by currnt limiting in prsnc of ambint harmonic loads and supply voltag harmonics[12]. 11

29 CHAPTER 3.SHUNT ACTIVE FILTER CONTROLLER Th Activ Filtr controllr consists of a harmonic xtractor and a currnt rgulator. In this chaptr diffrnt mthods of harmonic xtraction hav bn discussd. Each mthod has its own advantags and is application basd. Prdictiv currnt control tchniqu has also bn discussd in this chaptr along with its implmntation issus and th dad tim compnsation. 3.1 Harmonic Extraction Th harmonic xtraction involvs th procss of dtrmining all th multipl frquncy componnts prsnt in th currnt or voltag. Th harmonics thus xtractd bcom th rfrnc for th currnt rgulator. Th currnt rgulator thus producs pulss in ordr to driv th activ filtr invrtr in such a way so as to gnrat th compnsating currnt which is sam as th rfrnc. Th most common mthod usd for harmonic xtraction is Synchronous Rfrnc (SRF) Fram mthod. 3.1.a Synchronous Rfrnc Fram Harmonic Extraction Th Synchronous Rfrnc Fram harmonic xtraction mthod involvs park transformation to convrt thr phas currnt or voltags into synchronously rotating d-q rfrnc fram. Th Park Transformation can b prformd as follows: i i d q Cos 2 Sin Cos( ) 3 2 Sin( ) Cos( ) 3 i 2 Sin( ) i 3 1 i 2 a b c (4) Th motivation of changing to synchronous rfrnc fram is that in synchronous rfrnc fram th fundamntal componnt bcoms a constant which can thn b low pass filtrd to lav bhind th high frquncy componnts which can asily b xtractd. Also, Low pass filtring of a DC 12

30 componnt dos not caus any phas rror in th signal which might b an issu if a High Pass filtr was usd [14]. Th Synchronous Rfrnc Fram mthod of harmonic xtraction can furthr b applid for load currnt, supply currnt and Vf (Voltag at PCC) harmonic xtraction. All of ths mthods hav bn rprsntd in th form of block diagram in Figur 5. Load Currnt Harmonic Extraction-Load currnt Harmonic Extraction mthod as shown in Figur 5 is th most straightforward mthod. Th harmonics xtractd from th load currnt ar providd as th rfrnc to th currnt rgulator which drivs th invrtr to compnsat for ths harmonics. In this way, load currnt harmonics ar supplid by th activ filtr invrtr and th fundamntal currnt coms from th sourc. In this mthod, th load currnt is first convrtd from thr phas to th d-q synchronous rfrnc fram. Th d-q componnts so obtaind ar low pass filtrd to obtain th DC componnt (or th fundamntal componnt in thr phas systm).this is thn subtractd from th original d-q componnts to prform 1-LPF (or HPF) opration to obtain th high frquncy componnts. Invrs park transformation is thn prformd to obtain thr phas harmonic signals [14]. 13

31 Figur 5.Block Diagram rprsntation of Supply Currnt, Load Currnt and V f harmonic xtraction mthod 14

32 Th Load currnt harmonic xtraction mthod is th fdforward mthod of compnsation. In a load currnt harmonic xtraction mthod, th THD cannot b improvd byond a crtain xtnt as thr is no controllr gain which can b varid to improv th THD. Supply Currnt Harmonic Extraction- Figur 6 shows th quivalnt circuit of an activ filtr. Th thr phas supply sid currnts ar first convrtd from thr phas to d-q componnts in synchronous rfrnc fram. Thy ar thn High Pass Filtrd as discussd abov to obtain high frquncy componnts. As drivd in [9], I c =G(s)*I sh (5) Whr I c =Compnsating Currnt, I sh =Harmonics prsnt in Supply Currnt, G(s)=Activ Filtr Control Function. Figur 6.Harmonic Equivalnt Circuit of Activ Filtr As mntiond in[9],a good absorption of harmonic currnts as wll as supprssion of amplification of harmonic currnts du to th anti-paralll rsonanc ar obtaind if activ filtr controllr has a lad plus proportional charactristics. 15

33 ( KT ) s G ( s) (6) ( T ) s 1 I c = ( KT ) s *I sh (7) ( T ) s 1 Also, V f =s(l s )*I sh (8) Substituting (8) in (7),w gt I c = Ls KT 1 Ls K *V (9) s Whr L s = Supply Sid Inductanc, T=Tim constant of Lad Function, K=Gain Constant of Activ Filtr Control Function, s=laplacian Oprator Equation (9) shows that an activ filtr bhavs as a sris circuit of a rsistanc of L s /KT and an inductor with inductanc of L s /K quivalntly. Figur 7 shows th lad plus proportional charactristics of an activ filtr controllr. This figur hlps us to choos th valu of K=5. I s /I h Figur 7.Lad plus Proportional Charactristic of Activ Filtr Controllr (Rproducd from [9]) 16

34 Th supply currnt harmonic xtraction mthod is a fdback mthod of compnsation and implmnts a gain which can b varid to improv th THD. Th supply currnt harmonic xtraction mthod provids th sourc to load harmonic isolation. V f Harmonic Extraction Mthod-Harmonic propagation is a srious phnomnon in powr distribution systms. This occurs du to th harmonic rsonanc btwn lin inductors and capacitors which ar installd for powr factor corrction. Also, it has bn pointd out by actual masurmnts that fifth harmonic voltag at th nd bus is magnifid by 3.5 tims as larg as that at th bginning bus in a 6.6kV, 17 km long powr distribution fdr having capacitors with a total capacity of 245kVA [10].Thrfor, installing activ filtr on th last bus maks it possibl for activ filtr to damp out harmonic propagation [10]. In th Vf harmonic xtraction mthod, G(s) =(KT)s. This provids lad charactristics to th activ filtr controllr [9]. Thus, I c =(KT)s*I sh (10) Substituting (8) in (10), w gt V f I c K v * V f (11) L s KT Equation (11) mans that activ filtr acts as a pur rsistor of L s /KT. In this way, an activ filtr can b mad to act as a harmonic dampr by providing low impdanc path to th harmonic frquncis. V f mthod also provids th harmonic isolation btwn th sourc and th load. V f mthod is th fdback mthod of harmonic compnsation. It has a gain K v which can b varid to improv th compnsation and mak th harmonic voltag at th PCC to go to zro. Th limitation of th V f mthod coms into pictur whn th supply voltag contains th harmonics. In this cas th V f harmonic xtraction mthod cannot provid th harmonic compnsation for th supply voltag 17

35 harmonics. Also, by making th harmonics at th point of common coupling zro, th V f mthod causs harmonic currnt to flow from sourc to th load. P-Q Thory (IRP Thory) Mthod-Th P-Q Thory or Instantanous Ractiv Powr Thory was first introducd in 1983 by Akagi, t al. In this mthod, A shunt activ filtr controllr snss th thr phas voltag at th point of common coupling ;V fa, V fb, V fc and th thr phas load currnts; i La, i Lb, i Lc. P-Q Thory first transforms snsd thr phas voltags and currnts into two phas orthogonal axs, αβ systm according to th following quations i L a i i L b i i L c V f a V f V f b V f V f c (12) (13) P-Q thory is basd on th instantanous powr calculation in αβ coordinat systm [10]. Th instantanous powr is furthr dividd into instantanous ral powr, P and instantanous imaginary powr, Q. Both of ths can b furthr dividd into thir ac and dc componnts as follows: P P P (14) ac dc Q Q Q (15) ac dc P dc and Q dc ar rfrrd to as th avrag componnts of ral and imaginary powrs and gnrally rprsnt th activ and th ractiv powr consumd by th load rspctivly. P ac and Q ac rprsnt th oscillating componnts of ral and imaginary powr (xplaind in [10]) which ar producd 18

36 bcaus of th prsnc of harmonics in th systm. Thy rprsnt an additional powr flow in th systm without ffctiv contribution to th nrgy transfr from sourc to load or from load to sourc [10]. Th instantanous valu of P,Q can thrfor b calculatd as follows[10],[15]: P V V i f f L Q Vf V f i L (16) il 1 Vf Vf P 2 2 i L V V f Vf f V f Q (17) Similarly, w gt [from 15]: ic 1 Vf Vf Pc 2 2 i c V V f Vf f V f Q c (18) Whr P c and Q c ar th instantanous ral and ractiv powr consumd by th compnsator (th activ filtr invrtr). For th compnsator to act as purly a harmonic compnsator P c = -P ac, Q c =-Q ac. It is found for th systm having diod rctifir front nds that Pac 0[15].Thus, th quation for th harmonic compnsator bcoms: ic 1 Vf Vf i c V V f Vf f V f Q c (19) Whr i cα,i cβ ar th α-β componnts of th compnsating currnt. 3.2 DC Bus Voltag Control Th Block Diagram rprsntation DC Bus Voltag controllr implmntd for an activ filtr invrtr is shown in Figur 5.Th DC bus voltag is masurd and its rror with th rfrnc DC bus voltag is passd through a PI controllr to gt th dsird currnt command. This currnt command is thn multiplid with th fundamntal componnt of th Voltag at PCC, V f. This is don in ordr to nsur that th DC Bus gts chargd through th ral powr. Th fundamntal currnt command is thn addd to th xtractd harmonic currnt in d-q synchronous rfrnc fram in ordr to gt th 19

37 rfrnc compnsating currnt, I c *.Th masurd DC bus voltag has to b low pass filtrd to attnuat ac componnts prsnt in V dc. Th dominant componnts of DC Bus voltag ar at multipls of 360 Hz. Ths ar prsnt on th DC sid bcaus of th prsnc of 5 th and 7 th harmonic componnts on th ac sid of th invrtr [14]. If ths harmonics in V dc ar not attnuatd, thy might gnrat harmonic rfrnc in ordr to liminat ths harmonics from V dc and in th procss thy will affct th actual harmonic rfrnc currnt. Furthr, in th prsnc of supply voltag distortion activ filtr trminal voltag harmonics will intract with th DC bus voltag controllr gnratd rfrnc harmonic currnts. This will rsult in a ral powr transfr btwn supply and dc bus. Thus, filtring nsurs that th powr transfr btwn th supply and dc bus only taks plac at th fundamntal frquncis [14]. 3.3 Currnt Controllr 3.3.a Prdictiv Currnt Controllr with charg rror control Prdictiv Currnt controllr with charg rror control has bn usd for non-sinusoidal currnt tracking. Th Currnt controllr should b dsignd for a multipl frquncy currnt tracking as opposd to a singl frquncy currnt tracking as may b in th cas of motor drivs. It should hav an ability to oprat with lowr activ filtr inductanc, L f. A lowr valu of L f allows bttr di/dt tracking and highr currnt bandwidth. It should hav lowr snsitivity to L f and V f stimation rror. It should provid a simpl and a cost ffctiv implmntation in analog domain [20]. In cas of multipl frquncy currnt tracking, th highr ordr harmonics incur a significant phas dlay ovr half a switching priod for a typical 20 khz switching frquncy. In othr words, th highr frquncy rfrnc changs significantly ovr half a switching priod. In addition to this, sampl and hold dlays and th invrtr dad tim dlays rprsnt a significant prcnt of th switching priod and thrfor rsult in vn larg prcntag changs in high frquncy rfrnc currnt [20]. 20

38 A prdictiv currnt controllr has bn proposd in [14] to addrss ths issus. Whil dsigning prdictiv currnt controllr, it has bn assumd that th rfrnc currnt rmains constant ovr th complt switching priod. Also, to liminat low frquncy rrors, high frquncy avraging has bn prformd pr switching priod such that th charg rror ovr on switching priod is qual to zro. It has bn shown that by using Spac Vctor PWM mthod, this high frquncy avraging can b applid. In this mthod, th activ spac vctors ar cntrd and hnc th zro vctors ar implicitly dfind. This placmnt of th spac vctor minimizs th harmonics pr switching priod [14]. Th schmatic diagram of th implmntation of prdictiv currnt control in analog domain has bn shown in Figur 8.As can b sn from this figur, th prdictiv currnt controllr with charg rror control has bn implmntd in Stationary rfrnc fram (or d s -q s fram).this achivs dcoupling of phass and allviats th concrns of phas intractions and limit cycls in th activ filtr currnt, i f. Dcoupling of phass also nsurs prdictabl pak to pak currnt rippl for a givn dc bus voltag, V dcbus, activ filtr trminal voltag,v f, and filtr inductor, L f [14]. 21

39 Figur 8.Prdictiv Currnt Controllr with charg rror control (Rproducd from [14]) Th quations that dscrib currnt controllr opration ar: i i i (20) fqs fqs * fqs i i i (21) fds fds * fds V xqds T L WT sw f ( i i fqdsdt) T fqds sw T (22) sw 0 2 V * invqds V xqds V fqds (23) 22

40 Whr, i fqs and * i fqs ar th q componnts of activ filtr compnsating currnt and its rfrnc currnt rspctivly; V is th rfrnc invrtr voltag in stationary rfrnc fram; V fqds is th * invqds activ filtr trminal voltag(or th voltag at PCC) in stationary rfrnc fram. As can b sn from Figur 8, th invrtr rfrnc voltag is producd by th sum of two paralll paths. In th first path th currnt rror, ΔI fqds, is sampld vry half switching priod to improv tracking of highr ordr harmonic currnt du to thir rfrnc chang within on switching priod. This sampld currnt is thn multiplid by L f /(T sw /2) and thn addd to th back mf V fqds to gnrat th rfrnc activ filtr invrtr voltag as in a convntional prdictiv currnt controllr. In th scond paralll path, th intgral of th currnt rror or th charg rror is dtrmind and rst vry switching priod T sw. This is achivd by an intgrator rst and a sampl and hold circuit. If an intgrator is allowd to run fr, it might accumulat low frquncy rrors and may caus intgrator saturation problms. Th wighting factor or WT as shown in th figur is to mak th high frquncy currnt avraging ovr a window gratr or lssr than on switching priod. A WT=2 mans th currnt avraging ovr half a switching priod [20]. Th charg rror is convrtd back to an quivalnt Δi chargqds by dividing it by T sw. This is thn addd to th sampld valu of Δi fqds and thir sum is multiplid by L f /(T sw /2) to produc th rfrnc voltag across th inductor L f. This is thn addd to th back mf V fdqs to produc th invrtr rfrnc voltag, V [20]. * invqds 3.3.b Spac Vctor PWM and its implmntation in Analog Domain Th Spac Vctor PWM gnration mthod is a mthod in which th rfrnc voltag which is mappd in stationary α-β rfrnc fram is dcomposd in th form of voltag switching vctors which ar ralizabl on th 6 puls invrtr [15]. A spac vctor PWM mthod computs th duty cycl of th switching stat vctors which ar in proximity to th rfrnc voltag. Choosing th 23

41 conscutiv switching vctors in proximity to th rfrnc hlps to rduc th numbr of switching oprations rquird and thrby hlps in th rduction of switching losss. Th spac vctor PWM gnration mthod is rgardd as th suprior PWM gnration tchniqu [15] as compard to Sin-PWM tchniqu which is implmntd by comparison of rfrnc with a sin triangl. Figur 9 shows th block diagram of th analog implmntation of th spac vctor PWM tchniqu. It has bn shown that on injcting triplns to th rfrnc wavform and thn comparing it with th triangular wavform producs th sam switching pattrn as is dos by spac vctor PWM tchniqu. Thrfor, th invrtr rfrnc voltag in stationary α-β rfrnc fram is transformd into th thr phas invrtr rfrnc voltags; V * * * invan, Vinvbn, Vinvcn.Th xtraction of triplns is achivd by passing thr phas invrtr rfrnc voltags through a diod bridg circuit. This circuit xtracts th maximum of th thr during positiv cycl and minimum of th thr during ngativ cycl thrby rsulting in th tripln xtraction. Th triplns ar thn addd to th rfrnc voltags. This rsulting spac vctor modulating wavform; V moda, V modb, V modc is rgularly sampld and synchronizd to th pak of th triangular wavform. This is thn compard with th carrir triangular wavform to produc th dsird spac vctor PWM pulss. 24

42 Figur 9. Block diagram of th Analog Implmntation of th Spac Vctor PWM Tchniqu 3.3.c Implmntation issus and Dad Tim Compnsation In a paralll activ filtr systm, considring th switching frquncy of 20kHz, thr is an implmntation dlay typically of around 3µsc of which sampl and hold causs a dlay of around 1.5µsc and rst is causd by invrtr dad tim of 1.5µsc.This dlay is quit significant sinc it constituts 10-15% of th 50µsc (20kHz) switching priod[20]. If this dlay is not compnsatd for, it might caus wrong PWM signals to b producd or PWM signals might b shiftd in tim which can affct th harmonic compnsation. Thrfor, th dad tim compnsation tchniqu is adoptd in which th triangular carrir wavform is dlayd by t dlay =Sampling dlay+ Invrtr dad tim with 25

43 rspct to th sampling puls, such that both th sampling and th switching tak plac at th sam instant. This mthod has bn implmntd in this work. Th othr mthod for th dad tim compnsation is th fd forward mthod in which th compnsation is providd by adding/subtracting th fd forward voltag dpnding upon th sign of th masurd invrtr currnt [20]. 3.4 Bandwidth of Activ Filtr Invrtr Th bandwidth of an activ filtr invrtr is th rang of frquncis which an invrtr can produc at its trminals. It is dcidd by th frquncy at which th invrtr is switchd and th invrtr DC bus voltag. An activ filtr is rquird to compnsat for multipl harmonics to achiv a THD which is typically lowr than 5% (for SCR<20).Not only this, th rmnant high frquncy/high slw rat componnt in th supply currnt which is prsnt vn aftr compnsation can lad to a vry high voltag inducd across th inductor. Thrfor, in ordr to compnsat for ths highr ordr harmonics, thr is a nd to switch activ filtr invrtrs at a vry high frquncy. In this work, th switching frquncy, f sw =20Khz. 3.5 Activ Filtr Systm Spcifications Th Activ Filtr Systm Spcifications takn for th purpos of dsigning th Simulink Modl ar: V s = Lin to Lin Supply Voltag = 460 V rms L s = Supply Sid Inductanc=22µH L dc =DC Load sid inductanc =340µH C dc =DC Load sid Capacitanc=30mF L f =Filtr Inductanc=75µH C dcbus =DC Bus Capacitanc=12.5mF V dcbus(rf) =Rfrnc DC Bus Voltag = V 26

44 Paralll Passiv Filtr Spcifications (for20khz switching frquncy) (takn from [14]) Paralll Passiv Filtr circuit usd in th simulation is as shown in Figur 10. Figur 10.Paralll Passiv Filtr systm usd in Simulation L T =21µH C T =3µF R T =50mΩ C=50µF R d =1.7Ω 3.6 Simulink/MATLAB Modl and Simulation Rsults 3.6.a Simulation Rsults of Systm without Activ Filtr Figur 11.PLECS Modl of a systm having Non-Linar Load 27

45 Figur 12.Supply Currnt wavform for th systm without activ filtr Figur 13.FFT Analysis of th Supply Currnt Wavform for th systm without Activ Filtr From th simulation rsults it can b sn that th Systm having Non-Linar load has : Total Harmonic Distortion=28.68% 5 th Harmonic Contnt=22.74% 7 th Harmonic Contnt =11.82% 28

46 11 th Harmonic Contnt=8.29% 13 th Harmonic Contnt =6.01% Figur14. V fa (l-n Voltag at PCC) of th systm without activ filtr 3.6.b Activ Filtr Compnsation using Supply Currnt Harmonic Extraction Mthod Figur 15.Simulink Modl of an Activ Filtr Controllr using Supply Currnt Harmonic Extraction mthod 29

47 Figur 16.Supply Currnt wavform aftr th activ filtr compnsation using supply currnt harmonic xtraction mthod Figur 17.FFT Analysis of Supply Currnt Wavform aftr compnsation Th FFT Analysis of supply Currnt wavform aftr th activ filtr compnsation shows that: Total Harmonic Distortion=6.24% 30

48 Figur 18.Compnsation currnt matching with th Load Currnt Extractd Harmonics Figur 19.DC Bus Voltag controlld at 750V. 31

49 3.6.c Activ Filtr Compnsation using Load Currnt Harmonic Extraction mthod Figur 20.Simulink Modl of th Activ Filtr Controllr using Load Currnt Harmonic Extraction Mthod Figur 21.PLECS Modl of th Systm with Activ Filtr 32

50 Figur 22.Supply Currnt Wavform aftr th activ filtr compnsation using load currnt harmonic xtraction mthod Figur 23.FFT Analysis of Supply Currnt Wavform aftr compnsation Th FFT Analysis of supply Currnt wavform aftr th activ filtr compnsation using load currnt harmonic xtraction mthod shows that: Total Harmonic Distortion=3.82% 33

51 Figur 24.DC Bus Voltag Controlld at 680V 3.6.d Activ Filtr Compnsation using V f (Voltag at PCC) Harmonic Extraction mthod Figur 25. Simulink Modl of th systm with activ filtr controllr using V f harmonic xtraction mthod 34

52 Figur 26.Supply Currnt Wavform aftr compnsation using Vf harmonic xtraction mthod Figur 27.FFT Analysis of Supply currnt wavform aftr harmonic compnsation using V f harmonic xtraction mthod 35

53 Th FFT Analysis of supply Currnt wavform aftr th activ filtr compnsation using V f (Voltag at PCC) harmonic xtraction mthod shows that: Total Harmonic Distortion=3.34% Th valu of Kv chosn for this simulation =140. Th Tabl blow shows th total harmonic distortion (THD) that w gt from th FFT Analysis of supply currnt wavform for diffrnt valus of K v. It is clar from this tabl that on incrasing th valu of K v, w achiv bttr THD. This is du to th fact that on incrasing th valu of K v, th rsistanc implmntd by activ filtr rducs and hnc it offrs a low impdanc path to th harmonic frquncis thrby rsulting in bttr THD. Tabl II. Effct of Chang in K v on Total Harmonic Distortion (THD) of supply currnt wavform K v Total Harmonic Distortion(THD) % % % % % % % 36

54 Figur 28. Compnsating currnt, th harmonic currnt xtractd from load currnt and V fa Figur 29. DC Bus Voltag Controlld at 750 V 3.7 Comparison btwn th thr diffrnt harmonic xtraction mthods Th supply currnt harmonic xtraction mthod is th fdback mthod of compnsation which provids lad plus proportional charactristics to th activ filtr controllr. Th valu of quivalnt 37

55 inductanc and rsistanc ralizd by th supply currnt harmonic xtraction mthod can b varid to gt low THD. Th supply currnt harmonic xtraction mthod is spcially important whn th sourc voltag has harmonics as this mthod dirctly aims to rduc th supply currnt harmonics to zro. Also, th supply currnt harmonic xtraction mthod can provid a good supprssion of amplification of harmonic currnts du to anti paralll rsonanc. Th V f harmonic xtraction mthod is a fdback mthod of compnsation which provids proportional charactristics to th activ filtr controllr. Th quivalnt rsistanc ralizd by th activ filtr controllr maks th activ filtr to act as harmonic dampr along with th harmonic compnsator. This mthod is aimd at rducing th harmonic voltag at th point of common coupling to zro so that only th fundamntal currnt is drawn from th supply. Th main drawback of this mthod is in cas whn th supply voltag has harmonics. In such a cas, rducing th harmonic voltag at th point of common coupling to zro can lad to an incras in th supply sid harmonic currnt. Th load currnt harmonic xtraction mthod is a fd forward mthod of compnsation. It is th most simpl and straightforward mthod of harmonic compnsation. Though, in this mthod, th THD cannot b improvd byond a crtain point as thr is no controllr gain which can b varid to improv THD. Th load currnt harmonic xtraction mthod can only mak an activ filtr act as a harmonic compnsator but not as a harmonic dampr. It can also not provid any compnsation in cas th supply voltag has harmonics. From th comparison btwn thr mthods, it has bn found that ach mthod has its own spcific us. All th mthods can provid a good harmonic compnsation but it dpnds upon th nd of th systm (in trms of rquirmnt of harmonic damping or compnsation of harmonics prsnt du to supply voltag) to b abl to choos which mthod to us. 38

56 3.8 Summary This chaptr discusss in dtail about th thr harmonic xtraction algorithms and th prdictiv currnt control tchniqu. Th simulation rsults hav bn prsntd to vrify th control algorithms and to mak comparisons btwn thm. All th thr harmonic xtraction mthod hav bn shown to giv a THD <12% (for L s =22µH,SCR=50-100) thrby conforming with IEEE 519 harmonic standards. From th simulation rsults, in trms of achiving low THD, it can b infrrd that V f (Voltag at PCC) harmonic xtraction mthod givs a bttr harmonic compnsation (THD=3.34%) as compard to th supply currnt (THD=6.24%) and load currnt (THD=3.82%) harmonic xtraction mthod. From th comparison btwn thr mthods, it has bn found that ach mthod has its own spcific us. All th mthods can provid a good harmonic compnsation, in trms of conforming to IEEE 519 harmonic standards, but it dpnds upon th nd of th systm (in trms of rquirmnt of harmonic damping or compnsation of harmonics prsnt du to supply voltag) to b abl to choos which mthod to us. This chaptr also discusss in dtail about th analog implmntation of th prdictiv currnt controllr, Spac Vctor PWM tchniqu, th implmntation issus and th dad tim compnsation (3µsc) of th prdictiv currnt rgulator. 39

57 CHAPTER 4. FPAA AND FPGA IMPLEMENTATION OF SRF CONTROLLER Th prsnc of multipl harmonics in th powr lin du to various non-linar loads lik adjustabl spd drivs, computrs, fax machin, PLC s, tc. rquirs high frquncy switching of an activ filtr invrtr so as to rduc th harmonic contnt at th point of common coupling (PCC) to b typically lowr than 5%(for SCR<20) as spcifid by IEEE 519 harmonic standards. In this work, th Fild Programmabl Analog Array (FPAA) basd analog controllr has bn usd to implmnt th SRF Controllr algorithm for harmonic currnt xtraction for Shunt Activ Filtr controllr and th rsults ar compard with th convntional digital implmntation on Fild Programmabl Gat Array (FPGA). Th FPAA basd analog controllr implmntation provs to b fastr than th digital FPGA implmntation and can b a potntial controllr for SiC basd activ filtr invrtrs with high switching frquncis of khz (10-20us). 4.1 Fild Programmabl Analog Arrays Fild Programmabl Analog Arrays (FPAA) ar intgratd circuits that can implmnt various analog oprations. FPAAs ar composd of Configurabl Analog Blocks (CABs) and an intrconncting routing ntwork. Each CAB can implmnt analog procssing functions including amplification, intgration, diffrntiation, addition, subtraction, multiplication, and division to nam a fw. Th intrconnction ntwork routs th signal btwn CABs and I/O blocks. Figur 30 shows th ovrall configuration diagram of FPAA. 40

58 Figur 30. FPAA Configuration Diagram [16], [17] FPAA s ar rconfigurabl and asy to dsign and can simulat complx analog circuits as compard to Analog Boards. Thy ar also much fastr than Fild Programmabl Gat Array (FPGA) in trms of spd whil dlivring th rsults with sam accuracy. In FPGA s th additional dlay can b attributd to Analog to Digital and Digital to Analog convrsion stps. Thus, FPAA s provids not only th as of rconfigurability of complx analog circuits but also provs to b th bst solution whn it coms to high spd switching applications. Th FPAA s usd in this work ar Anadigm third gnration AN231E04 board. It is a discrt tim FPAA chip which is dsignd with th switchd capacitor tchnology [16]. This allows for asir programmability of FPAA. Figur 31 shows th FPAA AN231E04 valuation board. 41

59 Figur 31. Anadigm s AN231E04 FPAA Evaluation Board 4.2 Simulation Rsults of Positiv Squnc SRF Controllr Using Simulink/MATLAB Th simulation of Positiv squnc SRF controllr with squar wav input as th harmonic currnt wavform has bn prformd and th rsults ar shown blow. Figur 32. I La,I Lb,I Lc wavform input to th SRF Controllr I Ld I Lq Figur 33. I, I wavform obtaind aftr th Park Transformation Ld Lq 42

60 Fig34. I Lq vs I Ld s I hd s I hq Figur 35. I, I s hd s hq wavforms Idally, s I hd should coincid with I La at ach zro crossing as shown in th Figur 36 blow. I La Point at which both wavforms coincid idally I hd Figur 36. I hd and I La wavform 4.3 Implmntation of SRF Controllr on FPAA Th Positiv squnc SRF Controllr has bn implmntd using svn AN231E04 boards. Th FPAA chips ar configurd using Anadigm Dsignr 2 softwar. Figur 37 shows th implmntation of SRF Controllr on svn FPAA boards using Anadigm Dsignr 2 43

61 softwar. Th corrsponding xprimntal stup is shown in Figur 38.A 3 rd ordr Buttrworth filtr with a cutoff frquncy of 10Hz has bn implmntd to prform a low pass filtr opration on FPAA. Figur 37. Implmntation of Positiv Squnc SRF Controllr using Anadigm Dsignr 2 softwar Figur 38. Laboratory Stup of svn FPAA boards to implmnt Positiv Squnc SRF Controllr algorithm 44

62 Figur 39.Oscilloscop output showing wavforms for I ( bottom), I ( top) Ld Lq Figur 40.Oscilloscop output showing s s wavforms for I ( top), I ( bottom) hq hd I La I s hd Figur 41.Dlay in Implmntation on FPAA(17.4µsc) Figur 42.Plot of I Lq vs I Ld From ths rsults, it can b sn that th dlay in implmntation of th complt positiv squnc SRF controllr algorithm is 17.4 µsc. 45

63 4.4 Implmntation of SRF Controllr on FPGA Th National Instrumnt Compact-RIO (NI-C-RIO) digital controllr systm consists of a rconfigurabl chassis that contains th usr programmabl FPGA, hot swappabl I/O moduls and a ral tim controllr. LABVIEW softwar is usd to program th FPGA and th digital NI-CRIO controllr systm. Th squar-wav (worst cas for harmonic currnt xtraction) load currnts i La, i Lb, i Lc wr gnratd by th C-RIO controllr intrnally and thn providd as inputs to th programmd SRF Controllr. A 4 th ordr Buttrworth filtr with a cutoff frquncy of 10 Hz has bn usd to prform a low pass filtr opration. Th outputs of th FPGA (C-RIO) controllr which ar I, I, I compnsating harmonic currnts xtraction ar shown in Figur 44. It is vrifid that ha hb hc th digital FPGA basd C-RIO controllr can also b usd to implmnt th SRF Controllr albit with largr computational dlays compard to an analog basd FPAA controllr implmntation. Figur 43. Positiv Squnc SRF Controllr Implmntation on NI C-RIO(FPGA) using LABVIEW softwar 46

64 I La Figur 44.Oscilloscop output showing wavforms for I, I, I ha hb hc Figur 45.Dlay in Implmntation on C- RIO(30µsc) 4.5 Comparison of Analog FPAA and Digital FPGA Controllr Outputs Th comparison of th analog FPAA and digital FPGA basd controllrs wr basd on th implmntation dlay for th sam SRF Controllr basd compnsator for harmonic currnt xtraction with xactly th sam squar-wav (worst cas for harmonic currnt xtraction) load currnts i La, i Lb, i Lc gnratd by th C-RIO controllr for both analog (FPAA) and digital (FPGA) controllrs. Th dlays wr masurd by calculating th tim diffrnc btwn th zro crossings of two points (on point on th input signal, i La and th othr point on output signal, I s hd ). Ths points of th two signals wr chosn bcaus th zro crossings of th input currnt signal, i La and th output currnt signal, I s hd ar idally supposd to coincid. Figur 41 shows a tim dlay of 17.4μs for th implmntation on analog FPAA basd controllr. Figur 45 shows a tim dlay of 30μs for th implmntation on digital FPGA basd controllr. Thus, it can b sn from th rsults obtaind from both th implmntations that th FPAA analog controllr is much fastr than th 47

65 FPGA digital controllr, and thrfor it can b usd as a viabl controllr for vry high switching frquncy convrtr applications such as Silicon Carbid powr smiconductor dvic basd convrtrs with 50 khz switching frquncy. 48

66 CHAPTER 5.HARDWARE IMPLEMENTATION OF SHUNT ACTIVE FILTER SYSTEM Th hardwar implmntation of shunt activ filtr systm has bn prformd by first building a nonlinar load (for lowr powr rating as compard to th simulations shown in Chaptr3) in th laboratory. Th currnt and th voltag masurmnts from th nonlinar load wr thn givn to th harmonic xtraction board and th currnt controllr board to driv th activ filtr invrtr. Figur 46 shows th hardwar stup of th shunt activ filtr systm in laboratory. Currnt and Voltag Snsors Non Linar Load Harmonic Extractor Prdictiv Currnt Controllr Figur 46.Hardwar Stup of Shunt Activ Filtr Controllr and th Nonlinar Load 5.1 Nonlinar Load Spcifications Vs(rms lin to lin)=208v Ls=Supply Sid Inductanc=2.5mH 49

67 Lac=Smoothing Ractor =2.5mH Ldc=DC sid Inductanc=5mH Cdc=DC sid Capacitanc=50µF Rdc=DC Load=72Ω Pdc=Load Rating=944.67W Rstartup=Startup Rsistanc=5Ω,100W 5.1.a Diod Rctifir with DC sid Inductor, and DC sid Capacitor systm This typ of nonlinar load has a highr valu of di/dt for th supply currnt wavform. Th dc sid inductor has th ffct of incrasing th di/dt of th supply currnt wavform but rducing th supply currnt amplitud rippl. Th amplitud of th rippl dpnds on th valu of L dc chosn. Particularly, for th spcifications of this systm, th valu of L dc is such that it givs a discontinuous supply currnt wavform. Figur 47. Diod Rctifir with DC sid Inductor, and DC sid Capacitor systm 50

68 Figur 48. Oscilloscop wavform for Scald I sa,i sb, I sc Figur 49. Oscilloscop Wavform for Scald Thr phas voltag V fa,v fb,v fc 5.1.b AC Supply Sid Lin Inductor and Diod Rctifir with DC sid Capacitor systm Th AC Supply Sid Lin Inductor hlps in rducing di/dt and th pak supply currnt and hnc th THD valu (typically limitd to 40%) [18]. It hlps in making th supply currnt mor continuous. 51

69 Figur 50. Diod Rctifir with AC supply sid Inductor and DC sid Capacitor systm Figur 51. Oscilloscop wavform for Scald I sa,i sb, I sc Figur 52. Oscilloscop Wavform for Scald Thr phas voltag V fa,v fb,v fc 52

70 5.1.c AC Supply Sid Lin Inductor, Diod Rctifir with DC sid Inductor, and DC sid Capacitor systm Th Nonlinar Load schmatic for AC Supply Sid Lin Inductor, Diod Rctifir with DC sid Inductor, and DC sid Capacitor systm is shown in Figur 53.This is th most dsirabl utility intrfac topology for ASD s and othr loads lik DC powr supplis. Th supply sid AC lin inductors rduc th THD and th di/dt of th supply currnt wavform [18]. Also, L dc hlps in gtting a continuous supply currnt and hlps rduc supply voltag unbalanc ffcts on supply sid [18]. Th Diod Bridg startup circuit is rquird to limit th inrush currnt du to th charging of DC sid capacitor during start up. For this purpos, a startup rsistanc is usd in this circuit and all th othr nonlinar load circuits shown abov for initial fw sconds and thn it is takn out of th circuit using a switch as shown in th figur. Figur 53. AC Supply Sid Lin Inductor, Diod Rctifir with DC sid Inductor, and DC sid Capacitor systm. 53

71 Figur 54.Oscilloscop wavform for Scald I sa,i sb, I sc Figur 55.Oscilloscop Wavform for Scald Thr phas voltag V fa,v fb,v fc 54

72 Figur 56.Fast Fourir Transform (FFT) of th I sa wavform on oscilloscop 5.2 Harmonic Extraction on an Analog Board Th harmonic xtraction board has bn implmntd on an analog board using intgratd circuits. Thr diffrnt harmonic xtraction algorithms hav bn implmntd namly V f, Load Currnt and Supply currnt harmonic xtraction mthod as discussd in chaptr 3.Th board rcivs th voltag and currnt signals masurd from th nonlinar load systm and givs out th xtractd harmonics in αβ stationary rfrnc fram and th thr phas. Ths xtractd harmonics bcom th rfrnc for th currnt controllr board. Th schmatic of th harmonic xtraction board laid out using ORCAD Captur has bn attachd in Appndix A. Analog Dvic s AD2S100 chip has bn usd for th vctor rotation from thr phas to two phas synchronous rfrnc fram. Th Low Pass Filtr usd is MAX280 which is a 5 th ordr Buttrworth filtr. It has bn st for a cutoff frquncy of 9.14 Hz by choosing appropriat valu of Rsistanc and Capacitanc in th circuit. Th Buttrworth filtrs hav a slowr roll off towards th stop band and hnc thy rquir a highr ordr for a particular stop band spcification [19]. 55

73 Figur 57.Magnitud Bod Plot of th 5 th ordr Buttrworth Filtr (Gain Normalizd to th Cut off Frquncy) (Rproducd from MAX280 Datasht) 5.2.a Implmntation dlay of Analog harmonic xtractor Th analog harmonic xtractor board has an implmntation dlay of 4.8µsc.Th dlay is masurd by using th input currnts I La, I Lb, I Lc as th currnts of 7th harmonic frquncy. Th xtractd harmonic currnt should also b a 7th harmonic currnt of th sam amplitud. Th zro crossing of th output I hds should idally coincid with th zro crossing of th input currnt I La. 56

74 Figur 58.Oscilloscop wavform for I La (yllow),i hds (blu) Figur 59.Zoomd Oscilloscop wavform for I La (yllow),i hds (blu) showing a dlay of 4.8µsc Clarly, th analog implmntation of harmonic xtractor is much fastr than FPAA and FPGA implmntations. Though, FPAA hav an advantag of rconfigurability and as of implmntation. 5.2.b.i Load Currnt Harmonic Extraction Rsults Th Load currnt harmonic xtraction mthod has bn vrifid using all thr typs of loads discussd in sction For Load typ: AC Supply Sid Lin Inductor, Diod Rctifir with DC sid Inductor, and DC sid Capacitor systm Figur 60.Oscilloscop wavform for i La (blu), i ( pink), i ( grn) for load typ d xplaind in sction 5.1.c q Figur 61. Oscilloscop wavform for i La (blu), invrtd low pass filtrd i d (pink), invrtd low pass filtrd i q (grn) 57

75 Figur 62.Oscilloscop wavform of s i hd (pink), i s hq (grn) for load typ xplaind in sction 5.1.c Figur 63. s i hd (pink),i fa (grn),i fa -i s hd (yllow) Figur 63 vrifis that th harmonic xtraction is taking plac prfctly such that whn th xtractd harmonic is subtractd from th load currnt, it givs a sinusoidal currnt. 58

76 2. For Load typ: AC Supply Sid Lin Inductor, Diod Rctifir with DC sid Capacitor systm Figur 64.Oscilloscop wavform for i La (grn), i d (blu), i q (pink)for load typ xplaind in sction 5.1.b Figur 65.Oscilloscop wavform for i La (grn), invrtd low pass filtrd i d (blu), invrtd low pass filtrd i q (pink) Figur 66. Oscilloscop wavform of s i hd (blu), i s hq (pink) for load typ xplaind in sction 5.1.b 59

77 3. For Load typ: Diod Rctifir with DC sid inductor and DC sid Capacitor systm Figur 67. Oscilloscop wavform for i La (grn), i d (blu), i q (pink)for load typ xplaind in sction 5.1.a Figur 68. Oscilloscop wavform for i La (grn), invrtd low pass filtrd i d (blu), invrtd low pass filtrd i q (pink) Figur 69. Oscilloscop wavform of s i hd (blu), i s hq (pink) for load typ xplaind in sction 5.1.a 5.2.b.ii Vf (Voltag at PCC) Harmonic Extraction Rsults Th Vf harmonic xtraction mthod has bn vrifid for th load typ xplaind in sction 5.1.c. Figur 70.Oscilloscop wavform for V fa (pink), V d (grn), V q (blu) 60

78 Figur 71. Oscilloscop wavform for V fa (pink), invrtd and filtrd V d (blu), V q (grn) Figur 72. Oscilloscop wavform for V fa (blu), s s V d (pink), V q (grn) Figur 73. Oscilloscop wavform for V fa (blu), s i hd (grn), s i hq (pink)(for K v =10) 61

79 5.2.b.iii Supply Currnt Harmonic Extraction Mthod Rsults Th Supply Currnt Harmonic Extraction mthod has bn vrifid on th Analog Board for th load of typ discussd in sction 5.1.c Figur 74. Oscilloscop wavform for i sa (pink), i ( grn), i ( blu) sd sq Figur 75. Oscilloscop wavform for i sa (pink), invrtd low pass filtrd i sd (grn), invrtd low pass filtrd i sq (blu) Figur 76.Oscilloscop wavform for i sa (pink) ( KT ) s, i sd (grn) aftr gain G( s), i sq (blu) 1 ( KT ) s ( KT ) s aftr gain G( s),k=5,t= ( KT ) s Figur 77.Oscilloscop wavform for i sa (pink), s i hd (grn), s i hq (blu) 62

80 5.3 Prdictiv Currnt Controllr Implmntation on Analog Board Th Prdictiv currnt controllr logic has bn tstd by using harmonic xtraction from load currnt harmonic xtraction mthod as th rfrnc. Currntly, for tsting th prdictiv currnt controllr logic, th masurd activ filtr invrtr currnts, i fqs and i fds ar mad zro. s V fd and V s fq (V f in αβ rfrnc fram ) ar also supplid from harmonic xtractor board. Th Switching frquncy for this implmntation is 20kHz.Th Activ Filtr Inductanc, L f is dsignd for 150µH, so that th gain: Lf T 2 sw 6 In this implmntation, compnsation has bn providd for sampling and invrtr dad tim dlays. For this rason, th triangular wavform has bn dlayd by a tim=3µsc (sampling dlay+ dad tim dlay) from th tim at which th sampling starts. For th purpos of implmnting th currnt tracking at vry half of switching priod (T sw /2), two sampl and hold pulss ar producd, on bing dlayd by T sw /2 from th othr as shown in Figur 82. Thy ar thn multiplxd vry T sw /2 for implmnting currnt tracking vry T sw /2.Th sampl and hold pulss ar producd from th comparator output in th triangular wav gnration circuit as shown in Appndix B. This is don such that sampl and hold pulss ar synchronizd with th triangular wavform. Following oscilloscop wavforms validat th corrctnss of th logic. 63

81 * * Figur 78. SV invds (blu), SV invqs (grn)(activ Filtr invrtr rfrnc voltags for SVPWM) Figur 79. V, V, V * invan * invbn * invcn (Thr phas activ filtr invrtr rfrnc voltag for SVPWM) Figur 80.Tripln xtraction for th SVPWM tchniqu Figur 81.V amod,v bmod,v cmod (Thr phas modulating voltags for comparing with triangular wavform) 64

82 Figur 82.Sampl and Hold(S/H) Pulss; S/H at T sw (blu),s/h at T sw /2(grn) Figur 83.V amod aftr sampl and hold opration Figur 84.Dlayd triangular wavform(dlayd by 3µsc from th sampling puls for invrtr dad tim compnsation) Figur 85.Invrtr pulss for switchs S1(blu),S3(pink) and S5(grn) Figur 86.Invrtr pulss S1,S3,S5 nclosd in on anothr in ordr and showing th SVPWM opration 65

83 Figur 87.Invrtr dad band givn to S1 and S2 pulss 5.4 Activ Filtr Invrtr Systm In this work, th activ filtr invrtr has bn drivn using six pulss from prdictiv currnt controllr in opn loop. For driving th activ filtr invrtr in opn loop RL load has bn usd. Th spcifications of ach componnt of this systm ar: L f =150µH C f =50µF R load =50Ω Figur 88 shows th schmatic of th activ filtr invrtr systm implmntd in lab. Figur 89 shows th xprimntal stup of th activ filtr invrtr systm. 66

84 Figur 88. Schmatic of th activ filtr invrtr systm implmntd in lab. Activ Filtr Invrtr C f L f Figur 89. Th xprimntal stup of th activ filtr invrtr systm 67

85 Figur 90.Invrtr trminal voltags; V invan, V invbn at DC bus Voltag = 200V Figur 91.DC bus Voltag(at 250V)(brown),Voltag across load(l-l)(blu),ifa(pink) 68