ESD5651N ESD5651N. Descriptions. Features. Applications. Order information. Pin1. Pin2. 4.5V, Single Li-ion Battery Port Surge Protector

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1 4.5V, Single Li-ion Battery Port Surge Protector http//: Descriptions The is a bi-directional TVS (Transient Voltage Suppressor). It is specifically designed to protect sensitive electronic components which are connected to power lines, from over-stress caused by ESD (Electrostatic Discharge), EFT (Electrical Fast Transients) and Lightning. The may be used to provide ESD protection up to ±3kV (contact and air discharge) according to IEC6-4-2, and withstand peak pulse current up to 35A (8/2μs) according to IEC The is available in DFN6-2L package. Standard products are Pb-free and Halogen-free. DFN6-2L (Bottom View) Pin1 Pin2 Features Reverse stand-off voltage: ±4. 5V Max. Transient protection for each line according to IEC6-4-2 (ESD): ±3kV (contact and air discharge) IEC6-4-4 (EFT): 4A (5/5ns) IEC6-4-5 (surge): 35A (8/2μs) Capacitance: C J = 65pF typ. Low leakage current Low clamping voltage: = 6.5V = 16A (TLP) Solid-state silicon technology Pin1 Circuit diagram * 3 3 = Device code * = Month code ( A~Z) Marking (Top View) Pin2 Applications Power lines Cellular handsets Tablets Microprocessors Portable Electronics Order information Device Package Shipping -2/TR DFN6-2L /Tape&Reel Will Semiconductor Ltd. 1 Revision 1.5, 218/4/23

2 Absolute maximum ratings Parameter Symbol Rating Unit Peak pulse power (t p = 8/2μs) P pk 525 W Peak pulse current (t p = 8/2μs) 35 A ESD according to IEC6-4-2 air discharge V ESD ESD according to IEC6-4-2 contact discharge ±3 Junction temperature T J 125 Operating temperature T OP -4~85 Lead temperature T L 26 Storage temperature T STG -55~15 ±3 kv Electrical characteristics (T A =25, unless otherwise noted) I V RWM Reverse stand-off voltage I R Reverse leakage current Clamping voltage Peak pulse current I HOLD V HOLD V TRIG V RWM I TRIG I R I R I TRIG V RWM V TRIG V HOLD V I HOLD V TRIG Reverse trigger voltage I TRIG Reverse trigger current V HOLD Reverse holding voltage I HOLD Reverse holding current Definitions of electrical characteristics Will Semiconductor Ltd. 2 Revision 1.5, 218/4/23

3 Electrical characteristics (T A =25, unless otherwise noted) Parameter Symbol Condition Min. Typ. Max. Unit Reverse stand-off voltage V RWM ±4.5 V Reverse leakage current I R V RWM = 4.5V 1 μa Reverse trigger voltage V TRIG I TRIG = 2μA 4.7 V Reverse holding voltage V HOLD I HOLD = 5mA 4.6 V Clamping voltage 1) = 16A, t p = ns 6.5 V Clamping voltage 2) V ESD = 8kV 6.5 V = 1A, t p = 8/2μs 6 V Clamping voltage 3) = 2A, t p = 8/2μs 11 V = 35A, t p = 8/2μs 15 V Dynamic resistance 1) R DYN.12 Ω Junction capacitance Notes: C J V R = V, f = 1MHz 65 8 pf V R = 4.5V, f = 1MHz 45 6 pf 1) TLP parameter: Z = 5Ω, t p = ns, t r = 2ns, averaging window from 6ns to 8ns. R DYN is calculated from 4A to 16A. 2) Contact discharge mode, according to IEC ) Non-repetitive current pulse, according to IEC Will Semiconductor Ltd. 3 Revision 1.5, 218/4/23

4 Typical characteristics (T A =25, unless otherwise noted) Peak pulse current (%) 9 5 T T 1 Front time: T 1 = 1.25 T = 8 s Time to half-value: T 2 = 2 s T 2 2 Time ( s) 8/2μs waveform per IEC6-4-5 Current (%) 9 3ns t r =.7~1ns Time (ns) 6ns Contact discharge current waveform per IEC6-4-2 t V C - Clamping voltage (V) Pulse waveform: t p = 8/2 s Pin2 to Pin Peak pulse current (A) Pin1 to Pin2 Clamping voltage vs. Peak pulse current C J - Junction capacitance (pf) f = 1MHz V AC = 5mV V R - Reverse voltage (V) Capacitance vs. Reverse voltage Peak pulse power (W) % of Rated power Pulse time ( s) Non-repetitive peak pulse power vs. Pulse time T A - Ambient temperature ( ) Power derating vs. Ambient temperature Will Semiconductor Ltd. 4 Revision 1.5, 218/4/23

5 Typical characteristics (T A =25, unless otherwise noted) ESD clamping (+8kV contact discharge per IEC6-4-2) ESD clamping (-8kV contact discharge per IEC6-4-2) TLP current (A) TLP voltage (V) Z = 5 t r = 2ns t p = ns TLP Measurement Will Semiconductor Ltd. 5 Revision 1.5, 218/4/23

6 PACKAGE OUTLINE DIMENSIONS DFN6-2L b (Ⅰ) E L (Ⅱ) D e (Ⅲ) Top View Bottom View (Ⅰ) (Ⅱ) A Symbol A1 Side View A3 Dimensions in Millimeters Min. Typ. Max. A A A3.12 Ref. D E b L e.65 BSC Recommended land pattern (Unit: mm) Notes: This recommended land pattern is for reference purposes only. Please consult your manufacturing group to ensure your PCB design guidelines are met. Will Semiconductor Ltd. 6 Revision 1.5, 218/4/23

7 TAPE AND REEL INFORMATION Reel Dimensions RD P1 Tape Dimensions W Quadrant Assignments For PIN1 Orientation In Tape Q1 Q2 Q1 Q2 Q3 Q4 Q3 Q4 User Direction of Feed RD Reel Dimension W Overall width of the carrier tape 1 7inch 13inch 8mm 12mm 16mm P1 Pin1 Pitch between successive cavity centers Pin1 Quadrant 2mm 4mm 8mm Q1 Q2 Q3 Q4 Will Semiconductor Ltd. 7 Revision 1.5, 218/4/23