Process Technology to Fabricate High Performance MEMS on Top of Advanced LSI. Shuji Tanaka Tohoku University, Sendai, Japan

Transcription

1 Process Technology to Fabricate High Performance MEMS on Top of Advanced LSI Shuji Tanaka Tohoku University, Sendai, Japan 1

2 JSAP Integrated MEMS Technology Roadmap More than Moore: Diversification More Moore: Miniaturization 3 µm 0.8 µm Integrated inertia sensors DMD Present High performance integrated sensors ~2015 Self-controlled one-chip sensors ~2020 Integrated health care devices Implantable devices One-chip multiband/ tunable wireless chips ~2025 Smaller More inteillent More distributed 2 Nanoelectronics

3 Multiband Wireless Communication GSM/PDC 800 MHz 900 MHz 1.9 GHz W-CDMA 1.92~1.98 GHz UL 2.11~2.17 GHZ DL PHS PHS 1.88~1.92 GHz W-LAN 5.16~5.35 GHz 2.4~2.48 GHz Digital TV TV 470~770 MHz WiMAX 2.5~2.7 GHz 4th 4th Gen. 3 Multi-band wireless communication chip for W- CDMA + GSM/GPRS/EDGE (Qualcomm, QSC6240) Tx Rx

4 Integration of Wireless Communication System Unimplemented system Frequency tuning circuit Rx Filter Mixer LNA 0/90 º A/D A/D Digital signal processor Discrete devices Integrated devices based on RF CMOS technology Real one-chip solution enables not only advanced mobile communication systems but also ubiquitous network sensors, wireless healthcare chips etc. 4 Integration of advanced LSI and mechanical devices (SAW/BAW filters, clock oscillators, RF MEMS switches, variable capacitors) is a key.

5 Inertia Sensors (Analog Devices) G sensor Detection circuit Safety steel ball sensor μm 1.3 μm 2 μm ADXRS150 2-axis gyro A tiny capacitance change (12 zf) corresponding to Å displacement is detectable by the embedded integrated circuit in the gyro.

6 Integrated Accelerometer (Analog Devices) On-CMOS structure Circuit (NPN, NMOS) Poly Si sensor structure Judy et al., Hilton Head Island WS 2004, 27 Poly-Si sensor structure on 3 µm-ruled, W-metalized BiCMOS Poly-Si annealing at 1100 C for 30 min, Impossible to fabricate in LSI foundry SOI MEMS structure Sensor structure release Trench isolation from this trench Sensor structure Circuit SOI 6 Single crystal Si sensor structure beside 0.6 μm-ruled, Al-metalized CMOS Compatible with advanced LSI from LSI foundry, Low space efficiency

7 Digital Micromirror Device (TI) Hornbeck, IEDM 2007, ~16 μm square micromirrors ~2 μs response time 8.5 V driving voltage ±12 tilt angle = pixels for SVGA ~ = pixels for SXGA

8 Applications of DMD Panasonic Rear-projection television NEC Weight: 1 kg 8 Mobile projector NEC Projector for cinema complex

9 Metal Surface Micromachining for DMD (TI) Resist 0.8 µm CMOS address 1. Sacrificial resist layer circuit (SRAM) Al SiO 2 Al Resist 5. Sacrificial resist layer and Al mirror 2. Al and SiO 2 mask for hinges SiO 2 Al 6. Sacrificial resist etching 3. Al and SiO 2 mask for beams 9 Kessel et al., Proc. IEEE, 86 (1998) Al etching for beams and hinges Hornbeck, IEDM 2007, 17-24

10 MEMS-LSI Integration using Ge Sacrificial Layer Multi-freq. AlN Lamb wave resonator monolithically integrated with LSI Application to one-chip high-speed communication devices Collaboration with NDK 1. Ge patterning and SiO 2 deposition Ge SiO 2 LSI 2. Metal patterning and AlN deposition Mo Al AlN 310 MHz LSI 3. AlN and Au/Cr patterning Au/Cr 4. Ge sacrificial etching μm

11 Electrostatic-Actuated Capacitive Shunt Switch On state Yuki et al., Sensor Symposium 2007 Dielectric layer(sio 2 ) Ni bridge 200 µm Ground Signal Off state Actuation pad Ground 11 Notches for close contact Sacrificial PR (3.5 µm) GND Signal Sacrificial PR (1.5 µm) GND Isolation (db) Driving voltage: 38 V Insert loss Isolation Freqency(GHz) Frequency (GHz) Insertion loss (db)

12 Wafer-Level Packaging of RF MEMS Switch Yuki et al., Sensor Symposium 2007 Polyolefin mold Dry film resist 1. Molding dry film resist Exposed part 4. Developing and over-coating 2. Exposing dry film resist Exposed part CPW Cavity CPW Dry film resist DC in (Au/Cr) 12 Device wafer 3. Laminating molded dry film resist and exposing RF MEMS switch packaged by dry film resist

13 Phase Shifter Using RF MEMS Switches Switching line type Reflection type Z 0 Z 0 Z 1 Capacitive shunt SW Z 2 Capacitive shunt SW SW down Reflect here 13 Reflection-type phase shifter using RF MEMS switch (Taiko Denki & Tohoku Univ.) SW up Reflect here

14 Memory Effect of Metal Hinges in DMD A. B. Southeimer, IEEE 40th Annual International Reliability Physics Symposium, Dallas, TX, 2002 Shift (%) of bias voltage at which a half of mirrors land on the left side Test duration Mirrors exhibiting hinge memory 50 % / 50% Duty cycle in accelerating test 5 % / 95% 14 Simulating random image Simulating static image

15 Wafer Bonding-based MEMS-LSI Integration 1. Preparation of a device layer on a support wafer Support wafer Interlayer e.g.) SiO 2, Polymer 2. Fabrication of a LSI wafer LSI wafer 3. Low temperature bonding of the device layer and the LSI wafer Adhesion layer Device layer e.g.) Single crystal Si, Piezoelectric materials, Diamond, Compound semiconductors Polymer 4. Removal of the support wafer/thinning of the device wafer LSI wafer 5. Fabrication of MEMS (e.g. RF MEMS switch, variable capacitor) or SAW/BAW devices Electrical connection 6. Release of the device by sacrificial etching 15

16 Single Crystal RF MEMS Switch on Top of LSI Metal anchor Metal anchor OFF Signal line Actuation electrode Single crystal Si cantilever ON 200 μm Single crystal Si cantilever Metal anchor 16 Hight (μm) OFF (V drive = 0 V) ON (V drive = 8 V) Lateral length (μm) 200 μm Single crystal Si bridge RF MEMS switches on a dummy LSI wafer

17 Single-Crystal-Si-on-LSI (SOL) Technology 1. Fabrication of metal pads on a (dummy) LSI wafer LSI wafer 4. Patterning of metal electrodes 7. Removal of the photoresist molds 2. Bonding a SOI wafer on the LSI wafer using polymer interlayer SOI wafer 5. Shape formation of the device by reactive ion etching 8. Sacrificial polymer etching by O 2 ashing to release the device Polymer 3. Etching of the handle and BOX layers 6. Cu electroplating using photoresist molds for electrical connection Cu 17 Photoresist mold 200 μm

18 AlN/Si Composite Resonators on Top of LSI 1. Electrically-coupled AlN/Si composite thickness-mode filter 2. Mechanical-coupled AlN/Si composite disk array filter In Out In Out SiO 2 Si GND Si GND AlN Si AlN Si λ 4 Coupling Beam Out-of-phase mode In-phase mode 18 Collaboration with Mr. Matsumura (NiCT)

19 Single-Crystal-Si-on-LSI (SOL) Technology 1. Wafer bonding using polymer SOI wafer Polymer LSI 2. Handle layer and BOX layer etching 5. Metal patterning Al Au/Cr 6. Si etching Resist 3. Metal patterning Au/T Ru Au/Cr i 7. Sacrificial polymer etching 4. AlN deposition and patterning AlN SiO 2 19

20 AlN/Si Composite Resonators on Top of LSI Unpublished data 20

21 Share Wafer System in Tohoku University Shuttle service Given process Call for devices Registration from A corp., B univ. A B C D E F G H I A B Share wafer system Group A Sensor circuit Multiple devices in each shot Delivery after chip separation A B Group B Driver circuit Group C Oscillator circuit Is there a common process? Coordination with LSI foundry A D B C D A D C B C 21 Group D Actuator circuit Project members (NDA is concluded.) MEMS fabrication by each group Full wafers to each group

22 Summary There is strong demands for monolithic integration of advanced LSI and mechanical devices such as clock oscillators, mechanical filters, switches and sensors. More than Moore with Moore Moore and Biyond CMOS There are varieties of existing MEMS-LSI integration technology, but they are not suitable for the above applications. We have developed new versatile microprocess technology for the monolithic integration of high-performance MEMS on top of advanced LSI. Using the developed technology, we fabricated RF MEMS switches/variable capacitors, RF mechanical resonators and filters etc. 22 Acknowledgement: This study was partly supported by Special Coordination Funds for Promoting Science and Technology.