General Specification The table below gives the electrical specifications of the transceiver under the following conditions: supply Voltage = 3.3 V, t

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1 Datasheet of Universal RF Transceiver SCT3700 SCT3700 is a lower power universal RF transceiver developed to interface with baseband SoC SCT358 and RF power amplifier SCT3604 for digital radios. Its applications include DMR, DPMR, NXDN, DCR, P5, Chinese FDMA/TDMA, etc. Frequency band: MHz; Channel spacing: 6.5,.5, 5kHz; High level integration with minimum off-chip components; Low power consumption (7mA@3.3V, RX mode, 60mA@5dBm PdB, TX mode) Half-duplex and full-duplex support; Digital IQ through IS interfaced with baseband SoC SCT358; AGC with SCT358; IQ calibration with SCT358; Seamless interface with RF power amplifier SCT3604; Single power supplier 3.3V; QFN3 5x5mm package. Together with SCT358, SCT3604, one can build a digital radio with SCT3700 that is complied with multiple standards such as DPMR and DMR applications. The following figure shows a block diagram of a radio based on the three chips.

2 General Specification The table below gives the electrical specifications of the transceiver under the following conditions: supply Voltage = 3.3 V, temperature = 5 C, f XOSC = MHz, f RF = 434 MHz, unless otherwise specified. Symbol Description Conditions Min Typ Max Unit IddSl IddSt Supply current in sleep mode 0.5 ua Supply current in standby mode Crystal oscillator enabled.5.5 ma FR Synthesizer frequency range Programmable MHz TS_FS TS_TR TS_OS Frequency synthesizer wake-up time Transmitter wake-up time Crystal oscillator enabled us Frequency synthesizer enabled 0 us Crystal oscillator wake-up time us FXOSC Crystal oscillator frequency MHz FSTEP Frequency synthesizer step F XOSC / Hz

3 Transmitter Specification The table below gives the electrical specifications of the transceiver under the following conditions: supply Voltage = 3.3 V, temperature = 5 C, f XOSC = MHz, f RF = 434 MHz, unless otherwise specified. Symbol Description Conditions Min Typ Max Unit IddT FXtal TxPmax PN ACPR Supply current in transmitter mode Crystal frequency used for synthesizer Output power = -5dBm ma or DAC input clock 3 37 MHz TX max output power Phase noise at 434 MHz Adjacent channel power rejection at 5% BER 3 Receiver Specification Saturated power 4 7 dbm Offset = 6.5 or.5khz - dbc/hz CS = 6.5 or.5khz 63 db The table below gives the electrical specifications of the transceiver under the following conditions: supply Voltage = 3.3 V, temperature = 5 C, f XOSC = MHz, f RF = 434 MHz, unless otherwise specified. Symbol Description Conditions Min Typ Max Unit IddR FXtal CKEJ RxNf RxSen Supply current in receiver mode 7 0 ma Crystal frequency used for synthesizer or ADC input clock MHz External clock jitters Receiver NF, highest LNA specification only applies when noise assumed 0.0 % gain 5 8 db Receiver sensitivity at 5% BER -8 dbm Adjacent channel selectivity at ACS 5% BER 63 db Receiver spurious response at Offset from.5 RxSR 5% BER to 00kHz 6 db RxIM Receiver inter-modulation at Offset = 50 and 58 db

4 5% BER 00 khz RxBL Receiver blocking at 5% BER Offset = MHz 8 db 4 Pinout (top view) Pin Name Type Description 0 I (snug) VR_PA I/O Power supply for power amplifier driver VBAT I 3.3V power supply 3 VR_ANA I/O Analog power filtering 4 SCAN/ I Enable for scanning, in normal mode 5 VR_DIG I/O Digital power filtering 6 XTA I/O Crystal input A 7 I 8 XTB I/O Crystal input B/external clock input 9 RESET I/O Reset 0 CK_OUT O IS Clock Out NA Not defined (floating) NA Not defined (floating) 3 DI I IS DI 4 NA Not defined (floating) 5 DO O IS DO

5 6 VBAT I 3.3V power supply 7 SCK I SPI clock 8 MISO O SPI output 9 MOSI I SPI input 0 NSS I SPI chip select SW_ExtLNA O Used for external LNA power switch DIO O Digital IO 3 WS I/O IS WS 4 NA Not defined (floating) 5 VR_ANA I/O Analog power filtering 6 I 7 RFI I RF input 8 I 9 RFOUT_N O Negative output of power amplifier driver 30 RFOUT_P O Positive output of power amplifier driver 3 I 3 VBAT3 I 3.3V power supply 3 5 Typical Application Circuit A B C D VDD C4 uf C9 C30 C3 7pF L L C33 P4 RFOUT 0R 5nH 7pF L3 3.3pF 33nH C3 C34.8pF C0 C 0.uF 0.uF C3 uf C8 0nF Y MHz C pf VDD RESET IS_CLKO IS_DI IS_DO C pf VR_PA VBAT VR_ANA SCAN/ VR_DIG XTA XTB V BA T 3 RF_O U T _P RF_O U T _N RFIN V R_A N A RE SE T IS_CL K O IS_D I IS_D O V BA T FS DIO SW_ExtLNA NSS MOSI MISO SCK VDD C5 uf U9 4 C5 0.uF SCT IS_WS DIO SW_ExLNA SPI_/CS SPI_MOSI SPI_MISO SPI_SCK P RFIN 5 SPI_SCK SPI_MOSI SPI_/CS IS_CLKO IS_DI IS_DO 5 6 SCT358 6 A B C D

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