GDM1101: CMOS Single-Chip Bluetooth Integrated Radio/Baseband IC

Transcription

1 GDM1101: CMOS Single-Chip Bluetooth Integrated Radio/Baseband IC General Descriptions The GDM1101 is one of several Bluetooth chips offered by GCT. It is a CMOS single-chip Bluetooth solution with integrated radio & baseband. Together with an external flash memory running the Bluetooth protocol stack, the GDM1101 provides a fully compliant Bluetooth solution for data and voice communications. GCT s patent-pending direct conversion (DC) technology optimizes Bluetooth performance and reduces off-chip components, thus reducing OEM development costs and shortening time-to-market. The GDM1101 performance excels where it counts in Bluetooth operation. The direct conversion (DC) receiver has high channel selectivity and broad dynamic range for reliable 2.4 GHz Bluetooth communications. GCT s advanced DC technology significantly lowers BOM costs by eliminating external RF components, such as external SAW and bandpass filters. The GDM1100 is manufactured with high-yield CMOS processes, in creasing product availability at a cost-competitive price. The on-chip 32-bit RISC microcontroller is powerful enough to support full rate Bluetooth data communications. Features Single -chip CMOS Bluetooth chip (Bluetooth 1.0b ) with integrated Radio & B aseband Direct Conversion RF transceiver with no external channel filter Integrated 2.4GHz channel synthesizer includes VCO, and loop filter UART interface and 13/14 bit PCM, 8kbps synchronous serial audio 8bit general host interface, 24pin general purpose I/O On-chip Bluetooth software stack: Link Controller, Link Manager, HCI, L2CAP, and RFCOMM Provides system power control of radio and CPU Software development kit and source code licenses available 176 -pin tfbga (10mm x 10mm) package Applications Headsets Mobile phone handset integration, tri-mode phones PDAs, palmtop, and other mobile hand -held devices Desktop, laptop PCs, printers Digital camera, game units Access-points, home personal networks GCT Proprietary 32bit RISC MCU (V6@Pico, 32MIPS) I-Cache 8KB DMEM0 (16KB) DMEM1 (4KB) DMEM2 (8KB) MEM IF V6PB Bridge 20bit address, 16bit data I/O (2MB) SRAM (2MB) Flash (2MB) HOST Application RFComm SDP FSK/Clock Controller Modulator/ Demodulator GCT Proprietary CMOS-RF Packet Controller Bit Processor (FEC,HEC,CRC,..) System registers Timer Interrupt handler Power Manage. Host I/F Debug I/F GPIO UART PCM I/F 8bit 16bit serial serial HOST GDM1100 PC Audio Codec L2CAP HCI HCI Audio LM Link Control Baseband GDM1101 Protocol Stack Figure 1. GDM1101 Bluetooth Integrated Radio/Baseband Block Diagram All specification are preliminary and GCT reserves the right to change these without notice. 1

2 Functional Description Product Description Bluetooth is a specification for short-range, ad -hoc, data and voice communications, operating in the license-free, globally available 2.4 GHz to 2.5 GHz ISM band. Bluetooth features GFSK frequency hopping (1600 hop/s) over 79 1-MHz channels, and a nominal bandwidth of 1 Mbit/s. The GDM1101 is a fully integrated Bluetooth solution, including radio transceiver, GFSK modem, baseband hardware, on-chip 32bit microcontroller, and peripheral interface block. For most Bluetooth applications, the GDM1101 requires only external antenna, crystal and 128KB flash memory. Radio Section The GDM1101 radio section has a complete Bluetooth transceiver, including low noise amplifier, gain controlled amplifier, channel filter, anti-aliasing filter, analog to digital converter and phase-locked-loop (PLL) synthesized local oscillator. The radio architecture has a direct up-conversion scheme for the transmitter and a direct down-conversion scheme for the receiver. The receiver is composed of a LNA, a complex RF-to- Baseband down conversion Mixer, an AGC/complex filter, a dual ADC for the I/Q signal paths. The LNA provides wide dynamic range from -20 dbm to -80 dbm. The down conversion mixer employs GCT s proprietary technologies to minimize RF coupling. The fast AGC converges rapidly and an analog RSSI indicator combines the outputs of the AGC control voltage. By using a direct down-conversion scheme, the complex baseband filters carry out excellent channel selection and image-free operations. As a result, the receiver exceeds the Bluetooth 1.0A requirements for adjacent channel & image rejection and provides superior performances in the presence of ISM-band RF interferers. The transmitter is comprised of a dual DAC (for the I/Q signal paths), channel filter, baseband-to -RF upconversion Mixer, and power-controlled PA. The transmitter features a direct up-conversion scheme to minimize frequency drift during a transmit timeslot and also results in a well-controlled modulation index. The digital baseband Gaussian Shaping Filter & DAC provides accurate spectral shaping. The baseband channel filter offers excellent out-of-band suppression and equalized signals to alleviate cross-modulation products in the receiver. With a nominal transmit power of 0 dbm, the transmitter can be used in class 2 and class 3 radios and can be simply implemented in class 1 with an external RF power amplifier. The radio synthesizer is fully integrated, requiring no external VCO, varactor tuning diodes or LC resonators. It is designed with GCT s proprietary frequency synthesizer that minimizes phase noise and coupling to the RF amplifiers. An on-chip reference oscillator is provided and requires an external crystal or a reference clock. The external crystal frequency (or reference clock) can be in the range of MHz (on a multiple of 1 MHz) with 30 ppm accuracy. Baseband Modem The baseband GFSK modem is implemented with DSP (digital signal processing) technology, which provides excellent performance in the presence of noise, interferers, and frequency offset/drift. The baseband modem interface is designed to transfer Bluetooth data between the GDM1100 and baseband controller. The GFSK demodulator performs symbol/frame, timing recovery, and frequency offset/drift compensation. The GFSK demodulator detects the Bluetooth SYNC word and delivers SYNC detection indication/timing to baseband controller. The GFSK modulator provides a precise modulation index control and Gaussian spectral shaping. Bluetooth baseband hardware Bluetooth baseband hardware consists of modem control, packet processing hardware, and an on-chip microcontroller interface. The modem control section generates control signals for the modem and RF blocks, and controls transmit or receive of d ata with the modem. Packet processing for Bluetooth is implemented by dedicated, low-power hardware solution, while providing the required data throughput for the highest data transfer rate. The functions implemented in hardware include: forward error correction (FEC), header error control, cyclic redundancy check (CRC), encryption, and data whitening. An on-chip microcontroller interface generates interrupt signals to on-chip interrupt handler and processes DMA operation with 4KB internal dualport memory (DMEM1 ), which is shared with the onchip microcontroller. During radio transmission this block constructs a packet from header information and payload data/voice taken from a ring buffer in DMEM1, which is previously loaded by software. For radio receptio n, this block stores the packet header and the payload data in the appropriate ring buffer in DMEM1. After the completion of reception, this block generates All specification are preliminary and GCT reserves the right to change these without notice. 2

3 an interrupt signal to on-chip interrupt handler. This architecture minimizes the interventions req uired by the processor during packet transmission and reception. On-chip 32bit microcontroller The on-chip 32bit microcontroller supports the highest Bluetooth communications data rate. The architecture is based on GCT proprietary V6 RISC processor for low power embedded processing. Its instruction set is optimized not only for general embedded processing but also for special bit processing frequently used in Bluetooth stack. The Bluetooth software stack hosted on the microcontroller includes link controller, link management, HCI and peripheral device control. Because of its powerful processing, L2CAP, RFCOMM and SDP are implemented as well for cordless phone or GSM dial-up networking. To support the on-chip Bluetooth stack, a total of 28KB internal SRAM is integrated for data memory. Internal SRAM consists of three types memory : DMEM0, DMEM1 and DMEM2. DMEM0 is byte accessible 16KB general purpose data memory, and DMEM1 is dual-port 4KB memory for communication with Bluetooth baseband hardware and peripheral devices. DMEM2 is used for data or on-chip scratch pad instruction memory. To support low power consumption, the on-chip microcontroller adopts programmable clock control, which reduces the complexity of the embedded RTOS optimized for Bluetooth, and minimizes external I/O access with several techniques. To minimize the access of external flash memory for code, GDM1101 includes an on-chip 8KB instruction cache. In addition to the instruction cache, frequent access code or time critical code is located on 8KB DMEM2 in order to reduce external memory access resulting in a low power and high performance Bluetooth solution. Peripheral Interface Block The GDM1101 has several peripheral interfaces, such as off-chip memory interface, UART interface, PCM interface, 8-bit general microcontroller interface, and 24-bit general purpose programmable I/O (GPIO) interface. All peripheral devices are connected to the on-chip microcontroller via internal peripheral bus (V6PB), which is compatible with Advanced Peripheral Bus (APB) of the ARM processor. Off-chip memory interface supports 3 devices concurrently, such as flash memory, SRAM, and I/O for code and data. It supports up to 2MBs of address space and 16 -bit data with byte access functionality. The access timing for each device can be programmable by software. On-chip UART supports a programmable baud rate up to a maximum of 1.84 MBaud for serial communications and flow control. The PCM interface supports 13 or 14-bit 8kbps linear PCM serial interfaces. It generates synchronization signals and operates in master mode. The GDM1101 provides 24 -bit programmable, bi - directional I/O (GPIO). In host interface mode, 4 GPIO pins are used for host interface control signals and 8 GPIO for 8bit data or address bus signals. With these signals, the external host can communicate with the on-chip microcontroller or the on-chip debugger controller. Using the on-chip debugger controller, an external host can access internal peripheral device registers, the external memory interface of GDM1101, and execute real-time monitoring and debugging of the on-chip microcontroller. In test mode, GDM1101 connects directly to GDM1100 for Bluetooth baseband signal processing through the external host interface. All specification are preliminary and GCT reserves the right to change these without notice. 3

4 Electrical specifications GDM1101 Absolute Maximum Ratings Stresses in excess of the absolute maximum ratings can cause permanent or latent damage to the device. These are absolute stress ratings only. Functional operation of the device is only implied at these or any other conditions in excess of th ose given in the operation sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. Power Supply Supply Voltage (to GND) VDD V Input Voltage(All Input Pins) VI -0.5 VDD+0.5 V Power Output Short Circuit Duration CONT. Continuous Power Dissipation Temperature Operating Temperature Range C Storage Temperature Range TSTG C Lead Temperature(Soldering, 10 sec) 300 C Recommended Operating Conditions Ambient Temperature VDD = 2.7V +/- 5% TA C Supply Voltage (to GND)* TA= +25 C VDD 2.7 V * An external regulator is required for reliability DC Specifications Unless otherwise noted, the specification applies for: Digital Inputs Logical input High VIH 0.8VDD VDD+0.3 V Logical input Low VIL VDD V Input capacitance 3 pf Input leakage current 0.5 < VIN < VDD-0.5 ILEAK 5 µa Rise/Fall time 0 20 ns Digital Outputs Logical output High VOH VDD -0.4 VDD V Logical output Low VOL V Output capacitance 10 pf Current Consumption All specification are preliminary and GCT reserves the right to change these without notice. 4

5 Digital Inputs Standby 500 µa Receive mode* 40 ma Transmit mode* 40 ma * The actual power consumption depends on incoming signal level. Frequency Synthesizer Specifications Reference Clock Reference frequency Step = 1 MHz MHz Reference tolerance ppm Phase 500 khz -100 dbc/hz Receiver Specifications Overall Frequency Range MHz Double-sided Bandwidth 1 MHz Cascade Noise Figure TA= +25C 13 db Cascade Input Impedance 50 Ω Cascade Input VSWR Over all band 2.5:1 Cascade Input 3 rd Order Intercept Point 0 dbm Receiver Performance Dynamic Range 0.1% BER dbm C/IAWGN 0.1% BER 21 db C/Ico-channel 0.1% BER 11 db C/I@1MHz 0.1% BER -7 db C/I@2MHz 0.1% BER -30 db C/I 3MHz 0.1% BER -40 db Spurious emissions 30 MHz 1 GHz -85 dbm Spurious emissions 1 GHz GHz -85 dbm Receiver turn-on time 20 µs All specification are preliminary and GCT reserves the right to change these without notice. 5

6 Transmitter Specifications Frequency Frequency deviation khz Frequency deviation offset khz TX carrier offset khz TX carrier drift in 1 slot 25 khz in 3 slots 40 khz in 5 slots 40 khz TX power dbm Adjacent channel (@1MHz) power -30 dbm Adjacent channel (@2MHz) power -50 dbm Adjacent channel ( 3MHz) power -60 dbm Out of Band Spurious Emissions 30MHz 1GHz -65 dbm 1 GHz GHz -65 dbm 1.8 GHz 1.9 GHz -65 dbm 5.15 GHz 5.3 GHz -65 dbm All specification are preliminary and GCT reserves the right to change these without notice. 6