DATA SHEET. HEF4538B MSI Dual precision monostable multivibrator. For a complete data sheet, please also download: INTEGRATED CIRCUITS

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1 INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC Dual precision monostable multivibrator File under Integrated Circuits, IC04 January 1995

2 DESCRIPTION The is a dual retriggerable-resettable monostable multivibrator. Each multivibrator has an active LOW trigger/retrigger input (I 0 ), an active HIGH trigger/retrigger input (I 1 ), an overriding active LOW direct reset input (C D ), an output (O) and its complement (O), and two pins (C TC, (1) RC TC ) for connecting the external timing components C t and R t. Typical pulse width variation over temperature range is ± 0,2%. The may be triggered by either the positive or the negative edges of the input pulse and will produce an accurate output pulse with a pulse width range of 10 µs to infinity. The duration and accuracy of the output pulse are determined by the external timing components C t and R t. The output pulse width (T) is equal to R t C t. The linear design techniques in LOCMOS guarantee precise control of the output pulse width. A LOW level at C D terminates the output pulse immediately. Schmitt-trigger action in the trigger inputs makes the circuit highly tolerant to slower rise and fall times. Fig.2 Pinning diagram. P(N): 16-lead DIL; plastic (SOT38-1) D(F): 16-lead DIL; ceramic (cerdip) (SOT74) T(D): 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America PINNING I 0A, I 0B input (HIGH to LOW triggered) I 1A, I 1B input (LOW to HIGH triggered) C DA, C DB direct reset input (active LOW) O A, O B output O A, O B complementary output (active LOW) C TC A, C TC B external capacitor connections (1) RC TC A, RC TC B external capacitor/ resistor connections Note 1. Always connected to ground. Fig.1 Functional diagram. FAMILY DATA, I DD LIMITS category See Family specifications. January

3 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.this text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be... January Fig.3 Logic diagram. Philips Semiconductors

4 FUNCTION TABLE INPUTS OUTPUTS I 0 I 1 C D O O L H H H X X L L H Notes 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state is immaterial = positive output pulse = negative output pulse = positive-going transition = negative-going transition Fig.4 Connection of the external timing components R t and C t. DC CHARACTERISTICS V SS =0V T amb ( C) V DD V SYMBOL TYP. MAX. TYP. MAX. TYP. MAX. Supply current 5 55 µa active state 10 I D 150 µa (see note) µa Input leakage current 15 ± I IN na (pins 2 and 14) Note 1. Only one monostable is switching: current present during output pulse (output O is HIGH). January

5 AC CHARACTERISTICS V SS =0V; T amb =25 C; C L = 50 pf; input transition times 20 ns V DD V SYMBOL MIN. TYP. MAX. TYPICAL EXTRAPOLATION FORMULA Propagation delays I 0, I 1 O ns 173 ns + (0,55 ns/pf) C L HIGH to LOW 10 t PHL ns 79 ns + (0,23 ns/pf) C L ns 52 ns + (0,16 ns/pf) C L I 0, I 1 O ns 193 ns + (0,55 ns/pf) C L LOW to HIGH 10 t PLH ns 74 ns + (0,23 ns/pf) C L ns 52 ns + (0,16 ns/pf) C L C D O ns 98 ns + (0,55 ns/pf) C L HIGH to LOW 10 t PHL ns 44 ns + (0,23 ns/pf) C L ns 32 ns + (0,16 ns/pf) C L C D O ns 98 ns + (0,55 ns/pf) C L LOW to HIGH 10 t PLH ns 44 ns + (0,23 ns/pf) C L ns 32 ns + (0,16 ns/pf) C L Recovery times ns C D I 0,I 1 10 t RCD ns ns Retrigger times 5 0 ns O, O I 0,I 1 10 t RO 0 ns 15 0 ns Minimum I ns pulse width; LOW 10 t WI0L ns ns Minimum I ns pulse width; HIGH 10 t WI1H ns ns Minimum C D ns pulse width; LOW 10 t WCDL ns ns Output O or O µs pulse width 10 t WO µs µs Output O or O 5 10,3 10,8 11,3 ms pulse width 10 t WO 10,2 10,7 11,2 ms 15 10,1 10,6 11,1 ms Output O or O 5 1,01 1,09 1,11 s pulse width 10 t WO 0,99 1,04 1,09 s 15 0,99 1,04 1,09 s R t = 100 kω C t = 0,002 µf R t = 100 kω C t = 0,1 µf R t = 100 kω C t =10µF January

6 AC CHARACTERISTICS V SS =0V; T amb =25 C; C L = 50 pf; input transition times 20 ns V DD V SYMBOL MIN. TYP. MAX. Change in output O 5 ± 0,2 % pulse width over 10 t WO ± 0,2 % temperature (T amb ) 15 ± 0,2 % Change in output O pulse width over t WO ± 1,5 % V DD range 5 to 15 V Pulse width variation 5 ± 1 % between circuits 10 t WO ± 1 % in same package 15 ± 1 % External timing resistor R t 5 (1) kω R t = 100 kω C t = 2 nf to 10 µf External timing capacitor C t 2000 no limits pf Input capacitance (pin 2 or 14) C IN 15 pf Note 1. The maximum permissible resistance R t, which holds the specified accuracy of t WO, depends on the leakage current of the capacitor C t and the leakage of the. January

7 Fig.5 Waveforms showing minimum I 0, I 1, O and C D pulse widths, recovery times and propagation delays. (1) Positive edge triggering. (2) Positive edge re-triggering (pulse lengthening). (3) Negative edge triggering. (4) Reset (pulse shortening). (5) T = R t C t. Fig.6 Timing diagram. January

8 (a) R t = 100 kω; C t = 100 nf.. (b) R t = 100 kω; C t = 2 nf. Fig.7 Typical normalized change in output pulse width as a function of ambient temperature; 0% at V DD = 10 V and T amb =25 C. Fig.8 Typical normalized change in output pulse width as a function of the supply voltage at T amb =25 C; 0% at V DD =10V;R t = 100 kω. Fig.9 Total supply current as a function of the output duty factor; R t = 100 kω; C t = 100 nf; C L = 50 pf. One monostable multivibrator switching only. January

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