A Design-to-Test Methodology for SDR and Cognitive Radio

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1 A Design-to-Test Methodology for SDR and Cognitive Radio Authors: Greg Jue & Bob Cutler, Agilent Technologies

2 Agenda SDR Waveform Challenges SDR Waveform Design SDR Hardware Testing Cognitive Radio Algorithm Development Challenges Cognitive Radio Testbed 2

3 Software Defined Radios Flexibility Radio can support multiple waveforms: Different formats, different revisions of a format, backwards compatibility, future-proofing Combination of DSP/FPGA/GPP C++/HDL Flexibility increases demands on RF HW performance HW may be flexible or reconfigurable to more efficiently support waveforms with significantly different characteristics (e.g. OFDM vs MSK) Portability Across single vendors platforms (usually proprietary) Across multiple vendors platforms (based on standards such as SCA) Portability of waveform components (e.g. Viterbi decoder) 3

4 Portability and Flexibility Challenges and opportunities RF performance determined by both hardware and software. Performance could change with bug fix. Hardware platforms may come from different vendors and have different capabilities. Not quite write-once, run anywhere. Probe points in the signal path are now digital, as well as analog. Need a consistent way to measure. Component implementations in C++, HDL, possibly also from different vendors. Need to design and test hardware to support waveforms that have yet to be invented. Can use test waveforms for development, diagnostics and manufacturing test. 4

5 Impacts of SDR Technology on Test RF performance is a combination of baseband processing, radio configuration, and RF hardware performance Hard to isolate root causes of performance problems. Finger pointing between hardware and software teams and/or suppliers Need consistent way to quantify RF Performance in the both the hardware and in the soft-bits. Abstraction layers help with portability, but can introduce performance and optimization issues (e.g. timing, or optimal hardware configuration for a waveform) as well as organizational issues (hardware and software from different vendors) Baseband Processing RF 5 5

Example: High TX ACP Several Potential Sources of Error FPGA/DSP D/A PA Insufficient stop band rejection on baseband DSP filter Poor design Truncated filter coefficients

Improperly programmed hardware (excess gain, misconfigured parts) Distortion in D/A Poor analog baseband/if filtering IF Distortion due to improper levels Spurious signals

6 Example: High TX ACP Several Potential Sources of Error FPGA/DSP D/A PA Insufficient stop band rejection on baseband DSP filter Poor design Truncated filter coefficients Insufficient numeric resolution (adds digital noise) Insufficient numeric range (non-linear over/under flow) Improper timing (PA enable, frequency settling, glitches, etc) Improperly programmed hardware (excess gain, misconfigured parts) Distortion in D/A Poor analog baseband/if filtering IF Distortion due to improper levels Spurious signals Excessive phase noise PA Distortion A 2 db problem is usually a combination of several sub-1db problems. Need to accurately characterize performance in both the digital and analog signal paths 6 6

A Consistent Way To Measure Simulation Design Signal analysis Spectrum analysis Bit-accurate Algorithm Code generation Code Generation FPGA/DSP D/A Digital (logic analyzer) Signal analysis Spectrum

7 A Consistent Way To Measure Simulation Design Signal analysis Spectrum analysis Bit-accurate Algorithm Code generation Code Generation FPGA/DSP D/A Digital (logic analyzer) Signal analysis Spectrum analysis Hardware config Timing Packet inspection RTOS scheduling Baseband/IF/RF (scope) Signal analysis Spectrum analysis Hardware config Timing RF/IF (VSA) Signal analysis Spectrum analysis Phase noise Levels Distortion 7 7

Impacts of SDR Technology on Test Future Proofing Need a different

supported waveforms, need to test radio configurations that might be

B 2009 Waveform C 2013 Baseband Processing FPGA/DSP/GPP Configure

8 Impacts of SDR Technology on Test Future Proofing Need a different test strategy when goal is to support future waveforms Can t just test supported waveforms, need to test radio configurations that might be used with future waveforms When deployed, will Waveform C have adequate RF performance? (ACP, BER, EVM, spurious, noise figure, etc) Waveform A 2009 Waveform B 2009 Waveform C 2013 Baseband Processing FPGA/DSP/GPP Configure Converters and Flexible RF How do we ensure that Waveform C will have adequate performance when installed in radios deployed in 2009? 8 8

High efficiency (FM) High linearity(ofdm) Pulsed, continuous TEST APPROACHES 1.

9 SDR Technology Usually Implies Flexible Hardware Signal bandwidth dynamic range Signal BW Signal power stats (Distortion req s) Tunable or broadband antenna for frequency coverage Low phase noise (NB, OFDM) Fast tuning (FHSS, duplex) Phase coherent (MIMO) High efficiency (FM) High linearity(ofdm) Pulsed, continuous TEST APPROACHES 1. Test with real waveforms and their configurations 2. Test broad selection of representative waveforms 3. Test with custom waveforms to exercise different hardware configurations 9 9

10 Use Simulation to Design Test Waveforms, Introduce Defects, and Verify Test Coverage Noise only DC offset Quadrature error Delay mismatch Distortion 10 10

11 Agenda SDR Waveform Challenges SDR Waveform Design SDR Hardware Testing Cognitive Radio Algorithm Development Challenges Cognitive Radio Testbed 11

12 Design SDR RF Using Various Types of Waveform Formats Use waveform sources to design SDR RF Waveform Sources HDL code FPGA hardware Simulation models Algorithm code Waveform signal source Simulated RF transmitter design 12

Example 1: Use HDL-Based WiMAX Waveform to Design SDR RF Transmitter Simulated SDR transmitter output Waveform sources HDL code FPGA hardware

13 Example 1: Use HDL-Based WiMAX Waveform to Design SDR RF Transmitter Simulated SDR transmitter output Waveform sources HDL code FPGA hardware Simulation models Algorithm code EVM = 8.4% Mobile WiMAXt m is a registered trademark of the WiMAX Forum. Simulated RF transmitter design VSA measurement 13

14 Example 2a: Use FPGA-Based Legacy Waveform to Design SDR RF Transmitter Simulated SDR transmitter output Waveform sources HDL code FPGA hardware Simulation models Algorithm code EVM = 9.1% Simulated RF transmitter design VSA measurement 14

Example 2b: Re-Configure FPGA-Based Waveform to Evaluate SDR RF Transmitter Design Interoperability Waveform sources HDL code FPGA hardware Simulation models

15 Example 2b: Re-Configure FPGA-Based Waveform to Evaluate SDR RF Transmitter Design Interoperability Waveform sources HDL code FPGA hardware Simulation models Algorithm code Reconfigure legacy FPGA waveform for a new waveform (LTE) Simulated SDR transmitter output EVM=10.5% Simulated RF transmitter design VSA measurement 15

16 Example 2c: Probing an FPGA Waveform with Dynamic Probe Waveform sources HDL code FPGA hardware Simulation models Algorithm code Simulated RF transmitter design Preliminary work-in-progress 16

Waveform simulation source Waveform simulation receiver Simulated RF

17 Example 3a: Use Simulation-Based WiMAX Waveform to Design SDR RF Receiver Waveform sources HDL code FPGA hardware Simulation models Algorithm code Waveform simulation source Waveform simulation receiver Simulated RF receiver design Pre-configured algorithm models (customizable) Select ADC model 17

18 Example 3a Results: WiMAX BER vs. ADC Jitter QPSK BER vs. ADC Jitter vs. EbNo 16 QAM BER vs. ADC Jitter vs. EbNo 64 QAM BER vs. ADC Jitter vs. EbNo Red: 4% ADC Jitter Blue: 6% ADC Jitter Green: 8% ADC Jitter 18

19 Example 3b: Replace Waveform to Evaluate SDR Receiver Design Interoperability New BER results New waveform simulation source Replace WiMAX waveform source & receiver with LTE New waveform simulation receiver Simulated RF receiver design 19

20 Example 4: Use Algorithm Code Waveforms Waveform sources HDL code FPGA hardware Simulation models Algorithm code Customize OFDMA algorithms 20

21 *Please note: this next section of the presentation contains Preliminary product information that is part of new product development (next 3 slides) 21

SCA Waveform Rapid Prototyping Concept Physical-layer environment for waveform development/verification Waveform Components/ Blocks RF Tx RF Channel/ RF Interferers/Jammers RF Rx Waveform

22 SCA Waveform Rapid Prototyping Concept Physical-layer environment for waveform development/verification Waveform Components/ Blocks RF Tx RF Channel/ RF Interferers/Jammers RF Rx Waveform Components/ Blocks Component Model Export Import OE in the loop Functional Component wrapper Deployable component SCA compliant environment For component design, implementation, and deployment Preliminary 22

23 PHY Link Example 5: SCA Waveform Design Export C++ and XML Preliminary 23

Transmitter RF Receiver ADI ADC RF Channel BER Sink QPSK

24 Example 5: Verify End-to-End System with OE In the Simulation Loop PA Output Receiver Digital Output RF Transmitter RF Receiver ADI ADC RF Channel BER Sink QPSK Transmitter (OE-in-the-loop) Preliminary QPSK Receiver (OE-in-the-loop) 24

25 Agenda SDR Waveform Challenges SDR Waveform Design SDR Hardware Testing Cognitive Radio Algorithm Development Challenges Cognitive Radio Testbed 25

26 SDR Hardware Testing SDR testing challenges: Custom/proprietary waveforms not supported by COTS test equipment Flexible SDR test platforms are needed for today s and tomorrow s waveforms Different tools used between design and test- makes it difficult to debug issues Solution- Combine the flexibility of simulation with test equipment for flexible SDR testing 26

27 Adding Flexibility to SDR Testing with Simulation Test waveform coding/decoding SW-defined Customizable algorithms Customizable test waveforms 14 Bit A/D board DUT 16822A Logic Analyzer with Agilent SystemVue* * Note: SystemVue does not ship with logic analyzer 27

28 OFDMA BER Hardware Test Results 28

29 Simulate an SDR Receiver with a Hardware Front End (N6841 RF sensor) Wideband RF sensor Simulated RF receiver design Simulated SDR receiver output VSA measurement HW DUT test signal 29

30 Agenda SDR Waveform Challenges SDR Waveform Design SDR Hardware Testing Cognitive Radio Algorithm Development Challenges Cognitive Radio Testbed 30

31 Cognitive Radio Many definitions of CR. A radio that is aware of its environment and adjusts its behavior accordingly. Key application for CR is Dynamic Spectrum Access (DSA) Radio adjusts frequency, power, modulation based on sensed spectrum, location, policy and databases Complimentary to SDR in this application 31

32 Filling the Whitespace Goal: Increase spectrum utilization without causing interference 32

33 CR Design and Measurement Considerations Interference (actual, or potential for) Radio system performance (capacity, link establishment and reliability) Radio physical layer performance (e.g. adjacent channel power) Environment sensing performance (spectrum sensing, location sensing) Policy performance (does the policy over, or under protect) Radio environment (channel, noise, occupancy) 33

34 Challenges of Spectrum Sensing Performance of various spectrum sensing algorithms False positives, false negatives Response to real-world signal environment (dynamic, many signals) Radio design Spurious Amplitude accuracy Intermod distortion Sensitivity Selectivity Frequency accuracy Speed/complexity/cost tradeoffs 34

35 CR Development Needs Need to characterize, capture, and replicate real-world spectral environments. Needs to be done over time, frequency and location. Need to use captured environments to evaluate CR algorithms and radio link performance. Need to evaluate performance using non-ideal radios. Need a flexible and comprehensive CR R&D Testbed! 35

36 Agenda SDR Waveform Challenges SDR Waveform Design SDR Hardware Testing Cognitive Radio Algorithm Development Challenges Cognitive Radio Testbed 36

37 Cognitive Radio R&D Testbed 37

38 CR Algorithm Development and Testing Environment 38

39 Mobile WiMAX Case Study 39

40 Step 1: Capture Signal and Bring into SystemVue Captured CR environment 40

41 Step 2: Whitespace Math Algorithms Determine Valid Whitespace Frequency Rules Policy Valid whitespace determined within the policy Rising/falling edges detected to determine whitespace 41

42 Debugging Whitespace Algorithms Single-step through code Add/remove breakpoint Code variable values are displayed as code is single-stepped 42

43 Step 3: Whitespace Math Algorithms Determine Valid Whitespace WiMAX spectrum (scaled and centered in the valid whitespace) 43

44 Analyze Detect-and-Avoid Interferer Scenarios Narrowband interferer Sweep narrowband interferer vs. frequency to evaluate impact on OFDMA BER 44

45 Step 4: Identify Detected Signals in Simulation or with Test Equipment Sensed spectrum 45

46 Video Demo with SystemVue + N6841A N6841A is Remotely Located Across Washington State Remotely located N6841A RF sensor 46

47 New Whitepaper Available: 47

48 Summary Use waveforms sources in various formats (HDL, FPGA hardware, simulation models, math algorithms) to design SDR transmitters and receiver and evaluate interoperability Use improved SCA waveform flow for SDR waveform design and test Seamless integration between design and test capability creates flexible SDR testing platform enables R&D engineers to develop and test algorithms and hardware with real field signals Evaluate Cognitive Radio link performance, perform what-if detect-andavoid interference scenarios Explore a Cognitive Radio simulation example in the SystemVue example set request a free evaluation at: Or, contact your local Agilent representative 48

49 Additional Resources Product Web sites: SystemVue RF sensors Whitepapers and application notes: Videos: Cognitive Radio Algorithm Development and Testing: Software Defined Radio Measurement Solutions: Solutions for Addressing SDR Design and Measurement Challenges Web video of CR Testbed discussed in this paper: 49

50 Thank You! 50

51 For more information about Agilent EEsof EDA, visit: For more information on Agilent Technologies products, applications or services, please contact your local Agilent office. The complete list is available at: Contact Agilent at: Americas Canada (877) Brazil (11) Mexico United States (800) Asia Pacific Australia China Hong Kong India Japan 0120 (421) 345 Korea Malaysia Singapore Taiwan Thailand Europe & Middle East Austria Belgium 32 (0) Denmark Finland 358 (0) France * *0.125 /minute Germany Ireland Israel /544 Italy Netherlands 31 (0) Spain 34 (91) Sweden Switzerland United Kingdom 44 (0) Other European Countries: Product specifications and descriptions in this document subject to change without notice. Agilent Technologies, Inc Printed in USA, October 29, EN

Addressing the Design-to-Test Challenges for SDR and Cognitive Radio

Addressing the Design-to-Test Challenges Bob Cutler and Greg Jue, Agilent Technologies Software Defined Radios Flexibility Radio can support multiple waveforms: Different formats, Different revisions of