True Double Pole, Single Through (DPST or 2 Form A+B) Connectable as a SPDT and others DPST Solid-State Relays

Transcription

1 Electrnic Design & Research Inc. True Duble Ple, Single Thrugh (DPST r Frm A+B) Cnnectable as a SPDT and thers DPST Slid-State Relays Technical Infrmatin DPST relays with tw islated pairs, Frm A + Frm B terminals cnfiguratin fr DC and AC/DC applicatins. Frm B terminal is a true nrmally clsed pair Designed time-delay between terminatins allws cnfiguring a DPST relay as a true SPDT relay, r cnverting Frm A + Frm B relay int Frm C relay Under management S Hlding LLC Page# Made in USA File# 79 EDR Inc.

2 INTRODUCTION Slid-State Relays/Switches frm Electrnic Design & Research ffers a brad range f functins frm a basic nrmal pen and nrmal clse relays t a bus-cmpatible, fuzzy lgic input high-speed drivers, pwer distributin mdules made fr mtrcycles, pwer bats, etc. and slid-state breakers. Sme EDR s devices are pin-fr-pin and functinally cmparable t similar relays accepted in the industry and manufacture by ther cmpany, and mst f them grw t be the standard by itself. Devices included in this publicatin ffer speed and pwer capability with lw pwer dissipatin the way beynd what is available in the industry tday. A precise cntrl f turning-n and turning-ff timing allws using high-pwer DPST devices as ½ drivers (r as a true SPDT relay) simplifies designing a high-pwer cntrlling and driving equipment. A SIP-packaging is especially attractive fr use in the systems where a bard space is critical. IMPORTEN NOTICE Electrnic Design & Research (EDR) reserves the right t make changes t r t discntinues any prductin r service identified in this publicatin withut ntice. EDR advises its custmers t btain the latest versin f the relevant infrmatin t verify, befre placing rders, that the infrmatin presented is current. EDR warrants perfrmance f its prduct t current specificatin in accrding with EDR s standard warranty. Testing and ther quality cntrl techniques are utilized t the etend EDR deems necessary t supprt this warranty. Unless mandated by gvernment requirements, specific testing f all parameters f each device in nt necessarily perfrmed. EDR assumes n liability fr EDR applicatins assistance, custmer prduct design, r infringement f patent r services described herein. Nr des EDR warrant r represent that any license, either epress r implied, is granted under any patent right, cpyright, mask wrk right, r ther intellectual prperty rights f EDR cvering r relating t any cmbinatin, machine, r prcess in which such mdules prducts r services might be r are used. There are plenty f an electrmechanical nrmal-clse relays n the market but if a high current, highvltage pwer must be cntrlled a slid-switch is the best chice. Many cmpanies and s EDR manufacture varieties f nrmal-pen switches and until nw, nly a lw-pwer nrmal-clse switch was available n the market. This publicatin is abut ur newest family f unique slid-state devices. We prud t ffer yu a family f high-current, nrmal-clse/nrmal-clse DPST relays that can be used as a SPDT relay, r as a break-befre-make analg switch, r as a ½ driver. This publicatin included the Ordering Instructin. Yu can create a new part number, fr yur unique applicatin that required a different vltage, current r speed fllwing the Instructin. Please, d nt hesitate t send an t: inf@vshlding.cm fr any additinal infrmatin, delivery schedule and prices. Thank yu, ladimir A. Shavrtsman, Ph.D. President & CEO _Shvartsman@vshlding.cm Page# Made in USA File# 79 EDR Inc.

3 Frm the creatin time, Electrnic Design & Research Inc. is wrking t satisfy, as it lks like an endless flw f requirements fr a new and unique prducts and technlgy. We gave life in 9 t a neural-cell technlgy and nw a new branch f science Neural Netwrks is flurishing. Based n that inventin we intrduced in 9 a Multichannel signal prcessr, which fr the first time detected a faint signal frm the heart frm the bdy surface. Since 99, we put a heavy emphasis n develping varieties f mdules, such as slid-state relays, drivers and switches. Our mdules are wrking in many critical applicatins prviding a pwer inside f super-pwer, redundant servers installed n submarines, cntrl mvements f chairs in ima Theatres, One f the mst ppular relays frm that family (p/n EDR with a FORM A wiring diagram) has fund applicatin in high-speed printers. Precise turning n/ff timing allws cnnecting bth terminals fr a large current capacitance and that is eactly what was eplited by ne f ur custmer fr cntrlling heavy, fast machinery. Recently, we epended the family with adding mre advance switching prducts. A new relay (p/n EDR) with A+B terminal cnfiguratins emplyed that is used can be fund nly in advanced analg and sphisticated switches. An internal electrnic insures and guarantees that there is n sht-thrugh current when and if a N.C. (nrmal clse) pair and a N.O. (nrmally pen) terminals wired in series. Only epensive ½-bridge drivers and analg switches s far ffered such precisin switching. It is a fast, pwerful relay and mre apprpriate is a switch rated at 7DC. Fr the first time in the industry, the EDR prvides a high-current, nrmally clse slid-state relay Aug : ms The EDR with tw pair f terminals (ne is N.C. and the ther N.O.) can wrk, as a driver when terminals cnnected in serius and a lad is cmmn. The internal cntrl circuitry allws the driver, large varieties f pwerful MOSFETs and as the result f that; we ffer a large variatin f relays t switch a DC and DC/AC pwer. Please send us an inquiry. We d nt charge a set-up prductin fee fr an rder f relays and up. Page# Made in USA File# 79 EDR Inc.

4 Electrnic Design & Research Technlgy fr peple's ideas Input Specificatins: Input DC ltage DC r DC Nminal Current, at Hz ma ma Maimum Current, at KHz ma ma Maimum Current, at KHz ma ma Output Specificatins: Operating DC vltage range Maimum cntinuus current Maimum surge current (IDM) Cntinues current (ID) Maimum n-state resistance Rising time. µs Delay-n time 7. µs Falling time. µs 7 DC A rms C. Ohm TN7D//C Delay-ff time. µs."."."."."." Maimum switching frequency. KHz General Specificatins: Ambient perating temperature range - C t C Ambient strage temperature range - C t 9 C." Dialectic Strength input-t-utput AC Dialectic Strength between terminals AC Mechanical Specificatins: Weight(z). Encapsulatin ResTech 7/ Terminals; input/utput."/. diameter Dimensins.."H."L.9"W Pwerful, N.C./N.O. Slid State Relay Designed t cntrl A, 7DC in micrsecnds Features: Utilizes nly. sq. in. f PCB area and nly. tall Amp cntinuus r up t Amp-pick in miniature size High sensitivity, even at a high switching frequency A surge current, and nly mill-ohms lw n-state resistance input, and nly ma TN7D//C EDR/ 7DC/A - INPUT Transient Prtectin: All lads are inductive, even nes that are nt s bvius r labeled. An inductive lad prduces a harmful transient vltage, which is much higher than the applied vltage, when it is turned n and ff. A SSR built with a MOSFET utput acts as an ideal switch and can prduce a seemingly nn-inductive lad, which can cause damage if nt suppressed. A transient vltage suppressr, which is bi-directinal fr an AC applied vltage and unidirectinal fr a DC applied vltage, shuld be used t clamp ecessive spikes. Electrnic Design & Research Inc. ** 7 Intermdal Dr. ** Luisville ** KY Tel: -9; Fa: -9-; Sales: --7; vshlding@vshlding.cm Page# Made in USA File# 79 EDR Inc.

5 Energ/Cnv Energ/Cnv (-) (-) (+) (+) (-) (-) (+) (+) The SPDT relay (p/n EDR) is unique in its class. Belw are time-diagrams snap-shrts prepared fr better understanding its time-respnses and its perfrmance in variety tasks. Q DNNCDv v Pulse Generatr (+in) (-in) R BT W COAX Digital Oscillscpe Figure A testing set-up fr a nrmal-pen (N.O.) pair =ns,=.µs,=.µs =ns,=7ns,=77ns =.7µs,=.9µs,=.µs µs Sep : µs Sep : µs Sep : Fig. Q DNNCDv v Pulse Generatr (+in) (-in) R BT W COAX Digital Oscillscpe Figure A testing set-up fr a nrmal-clse (N.C.) pair =.µs,=7ns,=-.7µs =79ns,=.µs,=.µs =.µs,=.µs,=-7ns µs Sep :9 - - µs Sep :9 - - µs Sep :9 Page# Made in USA File# 79 EDR Inc.

6 Energ/Cnv Occurred timing relatinship (-) (+) between an input signal (pulse) and (-) (+) utput signal (pulse) at a lad. Q DNNCDv v Pulse Generatr (+in) (-in) BT W COAX Digital Oscillscpe R BT Figure Set-up fr test f a SPDT hk-up - - =7ns,=7.7µs,=7.µs µs Sep : - - =.7µs,=.µs,=.µs µs Sep : =7.µs,=.µs,=9ns =.µs,=.µs,=.9µs µs Sep : µs Sep : =.µs,=ns,=-.µs =ns,=.µs,=.µs µs Sep : µs Sep : =7ns,=9ns,=ns =7ns,=.7µs,=.µs µs Sep : µs Sep : =79.µs,=7.µs,=-.µs =7.7µs,=.7µs,=.9µs µs Sep : - - µs Sep : Page# Made in USA File# 79 EDR Inc.

7 Electrnic Design & Research Technlgy fr peple's ideas Input Specificatins: Input DC ltage DC r DC Nminal Current, at Hz ma ma Maimum Current, at KHz ma ma Maimum Current, at KHz ma ma Output Specificatins: Operating DC vltage range Maimum cntinuus current Maimum surge current (IDM) Cntinues current (ID) Maimum n-state resistance Rising time. µs Delay-n time 7. µs Falling time. µs +/- DC (AC). A rms 7 C. Ohm Delay-ff time. µs Maimum switching frequency. KHz General Specificatins: Ambient perating temperature range - C t C Ambient strage temperature range - C t 9 C Dialectic Strength input-t-utput AC Dialectic Strength between terminals AC Mechanical Specificatins: Weight(z). Encapsulatin ResTech 7/ TNA//C Pwerful, N.C./N.O. Slid State Relay Designed t cntrl A at +/-DC in micrsecnds Features: Utilizes nly. sq. in. f PCB area and nly. tall. Amp cntinuus r up t Amp-pick in miniature size High sensitivity, even at a high switching frequency 7 A surge current, and nly. Ohms lw n-state resistance At input the relay cnsumes nly ma (+in) (-in) HNNCA Terminals; input/utput."/. diameter Simplified blck-diagram f the relay Dimensins.."H."L.9"W En er g/ C nv (- ) (+) (- ) (+). EDR7/ TNA//C iew frm the bttm: +/-DC, A cntrl signal & N.C. pair. & N.O. pair. Cntrl Signal Transient Prtectin: All lads are inductive, even nes that are nt s bvius r labeled. An inductive lad prduces a harmful transient vltage, which is much higher than the applied vltage, when it is turned n and ff. A SSR built with a MOSFET utput acts as an ideal switch and can prduce a seemingly nn-inductive lad, which can cause damage if nt suppressed. A transient vltage suppressr, which is bi-directinal fr an AC applied vltage and unidirectinal fr a DC applied vltage, shuld be used t clamp ecessive spikes. Electrnic Design & Research Inc. ** 7 Intermdal Dr. ** Luisville ** KY Tel: -9; Fa: -9-; Sales: --7; vshlding@vshlding.cm Page# 7 Made in USA File# 79 EDR Inc.

8 Electrnic Design & Research Technlgy fr peple's ideas Input Specificatins: Input DC ltage DC r DC Nminal Current, at Hz ma ma Maimum Current, at KHz ma ma Maimum Current, at KHz ma ma Output Specificatins: Operating DC vltage range Maimum cntinuus current Maimum surge current (IDM) Cntinues current (ID) Maimum n-state resistance Rising time. µs Delay-n time µs Falling time. µs DC A n heat-sink Ohm DND//NN Delay-ff time µs."."."."."." Maimum switching frequency. KHz General Specificatins: Ambient perating temperature range - C t C Ambient strage temperature range - C t 9 C." Dialectic Strength input-t-utput AC Dialectic Strength between pen cntacts AC Mechanical Specificatins: Weight(z). Encapsulatin ResTech 7/ Terminals." Dimensins.."H."L.9"W Terminals - Slder. diameter Pwerful Subminiature Slid State Relay/Switch Designed t cntrl A, DC in micrsecnds Features: Utilizes nly. sq. in. f PCB area and nly. tall Amp cntinues r up t Amp-pick in miniature size High sensitivity, even at a high switching frequency A surge current, and nly mill-ohms lw n-state resistance input, and nly ma DND//NN EDR DCA DCA - INPUT Transient Prtectin: All lads are inductive, even nes that are nt s bvius r labeled. An inductive lad prduces a harmful transient vltage, which is much higher than the applied vltage, when it is turned n and ff. A SSR built with a MOSFET utput acts as an ideal switch and can prduce a seemingly nn-inductive lad, which can cause damage if nt suppressed. A transient vltage suppressr, which is bi-directinal fr an AC applied vltage and unidirectinal fr a DC applied vltage, shuld be used t clamp ecessive spikes. Electrnic Design & Research Inc. ** 7 Intermdal Dr. ** Luisville ** KY Tel: -9; Fa: -9-; Sales: --7; vshlding@vshlding.cm Page# Made in USA File# 79 EDR Inc.

9 Electrnic Design & Research Technlgy fr peple's ideas Input Specificatins: Input DC ltage Nminal Current Must Turn On ltage Must Turn Off ltage Output Specificatins:.7DC DC ma.ma. DC. DC EDR SPDT Analg Switch Operating DC vltage range +/-7DC (AC) Maimum cntinuus current A rms =-97.ms,=-7.7ms,=.ms.. Maimum surge current (IDM) Cntinues current (ID) C. -. Maimum n-state resistance. Ohm Rising time.9 µs Delay-n time. S ch A: Frequency(Hz).7 Bth terminalsthe N.C. and N.O. are cntrlling tw different lads. The N.C. cmmutates an AC signal and the N.O terminals d a DC vtage. Falling time. µs Oct :7 Delay-ff time. µs."."."."."." Maimum switching frequency 7 Hz General Specificatins: Features: Ambient perating temperature range - C t C Ambient strage temperature range - C t 9 C.9" Dialectic Strength input-t-utput AC Dialectic Strength between terminals AC Mechanical Specificatins: Weight(z). Encapsulatin ResTech 7/ Terminals; input/utput."/. diameter Dimensins."H."L."W Frm A + Frm B terminals SSR Designed t cntrl A, +/-7DC (AC) Utilizes nly. sq. in. f PCB area and nly. tall Amp cntinuus r up t 9 Amp-pick in miniature size A surge current and nly. Ohms lw n-state resistance Wide input range - input, and nly ma Designed with small internal delays, circuitry virtually eliminates terminals crss cnductin and current shtthrugh allws the relay t wrk as a SPDT r DPST utput terminals cnfiguratin. Built-in a 7mS de-buncing prtectin simplifies an interfacing with electr-mechanical cntrls. Break-befre-make SPDT switch cnfigurable as a DPST m - - s. TL7A/-/C EDR/7 +/-7DC/AC -DC A - INPUT + ~ ~... Transient Prtectin: All lads are inductive, even nes that are nt s bvius r labeled. An inductive lad prduces a harmful transient vltage, which is much higher than the applied vltage, when it is turned n and ff. A SSR built with a MOSFET utput acts as an ideal switch and can prduce a seemingly nn-inductive lad, which can cause damage if nt suppressed. A transient vltage suppressr, which is bi-directinal fr an AC applied vltage and unidirectinal fr a DC applied vltage, shuld be used t clamp ecessive spikes. Electrnic Design & Research Inc. ** 7 Intermdal Dr. ** Luisville ** KY Tel: -9; Fa: -9-; Sales: --7; vshlding@vshlding.cm Page# 9 Made in USA File# 79 EDR Inc.

10 Input Electrical Characteristics (Ta = C) fr TL7A/-, p/n EDR/7 Minimum Nminal Maimum Unit Cntrl ltage, pins. Cntrl Current, pins.9. ma Current Leakage/7DC, pins - and - A Capacitance, pins - and pins - (turn ff) 9 pf Switching time test: vltage +/-DC, lad is Ohm & A and is =ns,=.7µs,=.µs =9.µs,=.µs,=.µs.. Cntrl - Cntrl Lad Lad ch A: Frequency(Hz) Nt enugh data Oct :9 -. µs ms ch A: Frequency(Hz) Nt enugh data Frm the N.O. terminals t the N.C. terminals a "dead" is. ms. Oct : Figure Turn-n delay is. S Figure Turn-ff dead time is. S - =9.µs,=.7µs,=.9µs.... Cntrl - - =.µs,=µs,=µs Cntrl Lad - - Lad ch A: Frequency(Hz) Nt enugh data Oct : µs m ch A: Frequency(Hz) Nt enugh data Frm the N.C. terminals t the N.O. terminals a "dead" is. ms. Oct : - Figure Rising time is.9 S Figure A turn-n dead time. ms SIGNAL SQ EDR t scillscpe R J +DC GND/Cmmn -DCD Pwer Supply Switching Time Test Circuit Page# Made in USA File# 79 EDR Inc.

11 APPLICATIONS Applicatin fr a SPDT/DPST with true N.C. terminal series Slid-State Relay is illustrated by just a few eamples belw. The EDR frm that series is a bi-directin switch taking place ver the full analg signal range f +/-7DC, with break-befre- make peratin t prevent mmentary shrting f utput signals. The EDR is an analg switch that switches psitive r negative signals while using a single cntrl vltage that can vary frm t. The EDR, as Frm A + Frm B relay switches pwer alternatively between tw lads. =-.ms,=-.ms,=-7.ms +DC SIGNAL SQ EDR t scillscpe t scillscpe ch A: Frequency(Hz).9 Bth terminals the N.C. and N.O. are cntrlling tw different lads. It shws capability t respnd n a fast changing cntrl signal. Oct : -. ms R R The EDR is cnfigured as a DPST switch ( Frm C) =m cntrl utput SIGNAL SQ EDR t scillscpe R J +DC GND/Cmmn -DCD Pwer Supply ch A: Frequency(Hz).99 Bth terminals, the N.C. and N.O. are cnnected t the same lad and applied +DC r -DC n it. Oct :9 s The EDR is capable t cmmutate a high frequency, as it shwn KHz. =.µs,=.µs,=ns EDR.. t scillscpe SIGNAL SQ SIGNAL AC R ch A: Frequency(kHz). Bth terminals the N.C. and N.O. are cntrlling tw different lads. The relay is capable f cmmutating a Khz signal. Oct :7 µs Bth terminals f EDR are islated f each ther that allw cmmutating DC and AC pwers.. =-97.ms,=-7.7ms,=.ms m +DC.. EDR.. t scillscpe SIGNAL SQ t scillscpe ch A: Frequency(Hz).7 Bth terminalsthe N.C. and N.O. are cntrlling tw different lads. The N.C. cmmutates an AC signal and the N.O terminals d a DC vtage. Oct :7 - s SIGNAL AC R R CONTACT BOUNCE AND EDR IS DE-BOUNCING SOLUTION Page# Made in USA File# 79 EDR Inc.

12 The situatin Push-buttn switches, tggle switches, and electr-mechanical relays all have ne thing in cmmn: cntacts. It's the metal cntacts that make and break the circuit and carry the current in switches and relays. Since at least ne f the cntacts is n a mvable strip f metal, it has springiness. Cntacts are designed t pen and clse quickly with a little resistance (damping) t their mvement. Cntacts have mass and springiness with lw damping that make them buncy as they make and break. When a nrmally pen (N.O.) pair f cntacts is clsed, the cntacts will cme tgether and bunce ff each ther several times befre finally cming t rest in a clsed psitin. The effect is called "cntact bunce" r, in a switch, "switch bunce," cntacts can bunce n pening as well as n clsing. Cntact bunce perid Cntact bunce perid Switch activated Switch de-activated The Prblem In sme cases, a cntact buncing is irrelevant when a switch r relay is used t turn n a lamp r start a fan mtr. Hwever, it becmes a prblem when a switch r electrmechanical relay is the input t a digital cunter, a persnal cmputer, r a micr-prcessr based piece f equipment. In such cases, a designer must cnsider cntact bunce. The reasn fr cncern is that the time it takes cntacts t stp buncing is measured in millisecnds, but digital circuits respnd in micrsecnds. The Slutin There are several ways t slve the prblem f cntact bunce (that is, t "de-bunce" the input signal). Often the easiest way is t get a piece f equipment that is designed t accept "buncy" input and EDR s made Slid-State Relays are a slutin. =-.ms,=-.ms,=977µs ms ch A: Frequency(Hz) 9.7 EDR with a 9.7 ms de-bunce rejects all pulses that were shrter f that duratin. Oct : Any relay f the SPDT/DPST with a true N.C. terminals family can be rdered with the de-buncing. In mst cases a ms de-bunce is sufficient t avid nuisances f mechanical and electrmechanical devices but please let us knw if any anther perid wuld be required. Page# Made in USA File# 79 EDR Inc.

13 Selectin and Ordering Instructin fr EDR s made Slid State Mdules such as Relays, Switches, Breakers, ½ and Full-bridge Drivers, etc. Ntes: During past ten years rapid develpment f new and additinal [prducts gave us n chice but t epend, mdify and unify part descriptins. Belw represent the third mdificatin. Our mdules descriptin will be marked accrding t the specificatins belw but p/n EDR will stay the same fr already items in circulatin (already sld). Part descriptin: H L D / / X A B C F H /E /I H-Driver size = Speed L = lw ltage = Current = DC Current = A CS= cc= X mdule type D Slid State Relay, SPST-NO and SPST-NC switches T Driver, such as ½-bridge r a SPDT relay which can wrk as a ½ driver M Driver, such as a switch with built-in PWM cntrller H Full-bridge (H-bridge) Driver C Relay with built-in de-buncing r a turn-n/ff delay B Slid State Breaker and brakes cntrl mdules A package dimensins. H. L.9 W. H.7 L. W. H.7 L. W. H. L.9 W. H. L. W DIP,.7 H.9 L. W 7 panel munt,. H.7 L. W DIN type enclsure,. H.. W, fr mm DIN Rail 9 P panel munt,.7.7. B Speed - A device s ability t turn ON/OFF utput terminal(s) times per secnd L a lw speed relay/switch, rated DC - Hz, direct driving cntrl A a lw speed relay/switch, AC input relays N a medium speed relay/switch, rated DC - KHz, direct driving cntrl G a medium speed relay/switch, rated DC - KHz, lw current cntrl and pwer F a fast relay/switch, rated up t DC - KHz, lw current cntrl and pwer S a super-fast relay/switch, rated DC -. MHz, lw current cntrl and pwer U a super-fast relay/switch, rated DC. MHz, direct driving cntrl Fast, High ltage Slid-State Switches with Nansecnds rise time C Output ltage - A maimum allwed vltage between utput terminals, up t k It must be replace with required vltage and we ffer the clsest and highest value available. Nte: In an AC -relay a vltage specified a peak-t-peak maimum vltage and the maimum AC can be calculated by multiplying a maimum allwed vltage by factr f.7 F A relay can be use t cntrl either AC, DC r AC/DC pwer A - a relay/switch designed t switch/chp an AC/DC pwer D - a relay/switch designed t switch/chp a DC pwer nne - relay with a SCR r TRIAC n the utput t cntrl nly AC pwer H A maimum allwed RMS CURRENT (Ampere) withut a heat sink A maimum current limited t a size f the enclsure (b). We can prduce a device fr any required current in a custmer enclsure. I Sme f ur prducts use an internal DC/DC cnverter n prvide a pwer t the internal electrnics. arieties vltages are available: DC+/-%, DC+/-%, DC+/-% and DC+/-%. Fr a wider input pwer vltage swing, please add W after the vltage. Fr an eample, W is fr +/-. E We ffer several standard cntrl vltages DC, DC, DC, DC, -DC and -DC. Please specify the input cntrl vltage, as fr eample DLD/. Replace with a,,,,, - and - that is fr DC, DC, DC, DC, DC, -DC and -DC. Respectful cntrl vltage represented at the end f part number in the fllwing way, fr an eample EDR/ and EDR/. Bth relays are almst the same and difference is nly an applied cntrl vltage, if fr DC and is fr -DC; Cntrl ltage Representatin Cntrl ltage Representatin Cntrl ltage Representatin DC DC DC DC DC DC -DC 7 -DC 9-AC 9 Z A relay/switch built with fllwing standard islatins L r nne type relay is N type relay is, DC ( H ) and ( H ) DC. T Turn-n delays; S fr secnds, M fr millisecnds, U fr micrsecnds, M ms turn-ff delay, M ms turn-n delay Electrnic Design & Research Inc. ** 7 Intermdal Dr. ** Luisville ** KY Tel: -9; Fa: -9-; Sales: --7; website: inf@vshlding.cm Page# Made in USA File# 79 EDR Inc.