MC74VHC1GT66. SPST (NO) Normally Open Analog Switch
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- Janel Russell
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1 MC7VHCGT66 SPST (NO) Normally Open nalog Switch The MC7VHCGT66 is a Single Pole Single Throw (SPST) analog switch. It achieves high speed propagation delays and low ON resistances while maintaining low power dissipation. This bilateral switch controls analog and digital voltages that may vary across the full power supply range (from to GND). The MC7VHCGT66 is compatible in function to a single gate of the High Speed CMOS MC7VHCT066 and the metal gate CMOS MC066. The device has been designed so that the ON resistances (R ON ) are much lower and more linear over input voltage than R ON of the metal gate CMOS or High Speed CMOS analog switches. The ON/OFF Control input is compatible with TTL type input thresholds allowing the device to be used as a logic level translator from V CMOS logic to V CMOS logic or from.8 V CMOS logic to V CMOS logic while operating at the high voltage power supply. The input protection circuitry on this device allows overvoltage tolerance on the input, which provides protection when voltages of up to 7 V are applied, regardless of the supply voltage. This allows the MC7VHCGT66 to be used to interface V circuits to V circuits. Features High Speed: t PD = 0 ns (Typ) at = V Low Power Dissipation: I CC =.0 (Max) at T = C Diode Protection Provided on Inputs and Outputs Improved Linearity and Lower ON Resistance over Input Voltage On/Off Control Input Has OVT Chip Complexity: FETs = ; Equivalent Gates = Pb Free Packages are vailable SC 88 DF SUFFIX CSE 9 TSOP DT SUFFIX CSE 8 PIN SSIGNMENT MRKING DIGRMS IN/OUT X OUT/IN Y GND ON/OFF CONTROL VE M VE = Device Code M = Date Code* W = Work Week = Pb Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position may vary depending upon manufacturing location. M VE M FUNCTION TBLE On/Off Control Input L H State of nalog Switch Off On ORDERING INFORMTION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. Semiconductor Components Industries, LLC, 0 ugust, 0 Rev. Publication Order Number: MC7VHCGT66/D
2 MC7VHCGT66 IN/OUT X OUT/IN Y GND (SC 88, TSOP ) Figure. Pinout Diagram ON/OFF CONTROL ON/OFF CONTROL X U U IN/OUT X OUT/IN Y Figure. Logic Symbol MXIMUM RTINGS Symbol Characteristics Value Unit DC Supply Voltage 0. to +7.0 V V IN DC Input Voltage 0. to +7.0 V V IS nalog Output Voltage 0. to 7.0 V I IK Input Diode Current 0 m I CC DC Supply Current, and GND + m T STG Storage Temperature Range 6 to 0 C T L Lead Temperature, mm from Case for 0 Seconds 60 C T J Junction Temperature Under Bias 0 C J Thermal Resistance SC70 (Note ) SOT 0 0 C/W P D Power Dissipation in Still ir at 8 C SC70 SOT 0 00 mw MSL Moisture Sensitivity Level F R Flammability Rating Oxygen Index: 8 to UL 9 V 0. in V ESD ESD Withstand Voltage Human Body Model (Note ) Machine Model (Note ) Charged Device Model (Note ) N/ V I Latchup Latchup Performance bove and Below GND at C (Note ) 00 m Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Measured with minimum pad spacing on an FR board, using 0 mm by inch, ounce copper trace with no air flow.. Tested to EI/JESD.. Tested to EI/JESD.. Tested to JESD C0.. Tested to EI/JESD78.
3 MC7VHCGT66 RECOMMENDED OPERTING CONDITIONS Symbol Characteristics Min Max Unit DC Supply Voltage.0. V V IN Digital Input Voltage GND. V V IS nalog Input Voltage GND V T Operating Temperature Range + C t r, t f Input Rise and Fall Time =. V ± 0. V =.0 V ± 0. V ns/v Device Junction Temperature versus Time to 0.% Bond Failures Junction Temperature C Time, Hours Time, Years 80,0, , , , , , ,900.0 NORMLIZED FILURE RTE FILURE RTE OF PLSTIC = CERMIC UNTIL INTERMETLLICS OCCUR TJ = 0 C TJ =0 C TJ =0 C TJ =00 C TIME, YERS Figure. Failure Rate vs. Time Junction Temperature TJ = 90 C TJ = 80 C
4 MC7VHCGT66 DC ELECTRICL CHRCTERISTICS Symbol Parameter Test Conditions V IL I IN Minimum High Level Input Voltage ON/OFF Control Input Maximum Low Level Input Voltage ON/OFF Control Input Maximum Input Leakage Current ON/OFF Control Input R ON = Per Spec R ON = Per Spec V IN = or GND (V) to. T = C T 8 C C T C Min Max Min Max Min Max Unit ±0. ±.0 ±.0 V V I CC Maximum Quiescent Supply Current V IN = or GND V IO = 0 V I CCT Quiescent Supply Current ON/OFF Control at. V....6 m R ON Maximum ON Resistance V IN = V IS = or GND I IS 0 m (Figure ) I OFF Maximum Off Channel Leakage Current V IN = V IL V IS = or GND Switch Off (Figure ) C ELECTRICL CHRCTERISTICS C load = 0 pf, Input t r /t f =.0 ns Symbol Parameter Test Conditions (V) T = C T 8 C C T C Min Typ Max Min Max Min Max Unit t PLH, t PHL Maximum Propagation Delay, Input X to Y Y = Open (Figures 7, ) ns t PLZ, t PHZ Maximum Propagation Delay, ON/OFF Control to nalog Output = 000 (Figures 8, ) ns t PZL, t PZH Maximum Propagation Delay, ON/OFF Control to nalog Output = 000 (Figures 8, ) ns C IN Maximum Input Capacitance ON/OFF Control Input pf Control Input = GND nalog I/O Feedthrough C, =.0 V C PD Power Dissipation Capacitance (Note 6) 8 pf 6. C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. verage operating current can be obtained by the equation: I CC(OPR) = C PD f in + I CC. C PD is used to determine the no load dynamic power consumption; P D = C PD V CC f in + I CC.
5 MC7VHCGT66 DDITIONL PPLICTION CHRCTERISTICS (Voltages Referenced to GND Unless Noted) Symbol Parameter Test Conditions Limit C Unit BW Maximum On Channel Bandwidth or Minimum Frequency Response (Figure 0) f in = MHz Sine Wave djust f in voltage to obtain 0 dbm at V OS Increase f in = frequency until db meter reads db = MHz ISO off Off Channel Feedthrough Isolation (Figure ) f in = Sine Wave djust f in voltage to obtain 0 dbm at V IS f in = 0 khz, = db NOISE feed Feedthrough Noise Control to Switch (Figure ) V in MHz Square Wave (t r = t f = ns) = mv PP THD Total Harmonic Distortion (Figure ) f in = khz, = 0 k THD = THD Measured THD Source V IS =.0 V PP sine wave V IS =.0 V PP sine wave % PLOTTER POWER SUPPLY + COMPUTER DC PRMETER NLYZER V IL Figure. On Resistance Figure. Maximum Off Channel Leakage Current N/C TEST POINT Figure 6. Maximum On Channel Leakage Current Figure 7. Propagation Delay
6 MC7VHCGT66 Switch to Position when testing t PLZ and t PZL Switch to Position when testing t PHZ and t PZH TEST POINT C L * N/C N/C Figure 8. Propagation Delay Output Enable/Disable Figure 9. Power Dissipation Capacitance V OS V IS V OS 0. F 0. F f in f in db Meter db Meter Figure 0. Maximum On Channel Bandwidth Figure. Off Channel Feedthrough Isolation ( )/ To Distortion Meter ( )/ V IS V OS I S V MHz IN t r t ns f V OS f in 0. F GND Figure. Feedthrough Noise, ON/OFF Control to nalog Out, Figure. Total Harmonic Distortion 6
7 MC7VHCGT66 X. V. V t PLH t PHL Y 0% V OH V OL Figure. Propagation Delay, nalog In to nalog Out Waveforms t r t f 90% Control 0% t PZL 0% nalog Out 0% tpzh. V t PLZ 0% 90% t PHZ High Impedance V OL V OH High Impedance Figure. Propagation Delay, ON/OFF Control ORDERING INFORMTION M7VHCGT66DFTG Device Package Shipping SC 88 (Pb Free) MC7VHCGT66DFT M7VHCGT66DFTG SC 88 SC 88 (Pb Free) 000 / Tape & Reel MC7VHCGT66DTT M7VHCGT66DTTG TSOP TSOP (Pb Free) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD80/D. 7
8 MC7VHCGT66 PCKGE DIMENSIONS SC 88 (SC 70 /SOT ) CSE 9 0 ISSUE K S G B D PL 0. (0.008) M B M N NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y.M, 98.. CONTROLLING DIMENSION: INCH OBSOLETE. NEW STNDRD DIMENSIONS ND B DO NOT INCLUDE MOLD FLSH, PROTRUSIONS, OR GTE BURRS. INCHES MILLIMETERS DIM MIN MX MIN MX B C D G 0.06 BSC 0.6 BSC H J K N REF 0.0 REF S C J H K SOLDERING FOOTPRINT* SCLE 0: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 8
9 MC7VHCGT66 PCKGE DIMENSIONS TSOP CSE 8 0 ISSUE H X X NOTE 0.0 T 0.0 T L 0.0 H G B C D X 0.0 C B T S SETING PLNE J K DETIL Z M DETIL Z SOLDERING FOOTPRINT* NOTES:. DIMENSIONING ND TOLERNCING PER SME Y.M, 99.. CONTROLLING DIMENSION: MILLIMETERS.. MXIMUM LED THICKNESS INCLUDES LED FINISH THICKNESS. MINIMUM LED THICKNESS IS THE MINIMUM THICKNESS OF BSE MTERIL.. DIMENSIONS ND B DO NOT INCLUDE MOLD FLSH, PROTRUSIONS, OR GTE BURRS.. OPTIONL CONSTRUCTION: N DDITIONL TRIMMED LED IS LLOWED IN THIS LOCTION. TRIMMED LED NOT TO EXTEND MORE THN 0. FROM BODY. MILLIMETERS DIM MIN MX.00 BSC B.0 BSC C D G 0.9 BSC H J K L.. M 0 0 S SCLE 0: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICTION ORDERING INFORMTION LITERTURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 6, Denver, Colorado 807 US Phone: or Toll Free US/Canada Fax: or Toll Free US/Canada orderlit@onsemi.com N. merican Technical Support: Toll Free US/Canada Europe, Middle East and frica Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MC7VHCGT66/D
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