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1 ADVANCES in NATURAL and APPLIED SCIENCES ISSN: Published BYAENSI Publication EISSN: May 11(7): pages Open Access Journal Modified Seven Level Symmetric Inverter with Reduced Switch Count 1 Thiyagarajan V and 2 Somasundaram P 1 Assistant Professor, Department of EEE, SSN College of Engineering, Kalavakkam, Chennai, Tamilnadu, India AssociateProfessor, Department of EEE, CEG, Anna University, Chennai, Tamilnadu, India Received 28 January 2017; Accepted 12 May 2017; Available online 18 May 2017 Address For Correspondence: Thiyagarajan V, Assistant Professor, Department of EEE, SSN College of Engineering, Kalavakkam, Chennai, , Tamilnadu, India thiyagarajanv@ssn.edu.in. Copyright 2017 by authors and American-Eurasian Network for ScientificInformation (AENSI Publication). This work is licensed under the Creative Commons Attribution International License (CC BY). ABSTRACT Multilevel inverters utilizes a higher number of power electronic switches to perform the power conversion in small voltage steps. It can be used in high power and medium voltage applications since it offers less distortion and less electro-magnetic interference. The main objective of this paper is to propose a new single phase symmetric type seven level inverter with reduced number of power electronic switches. The proposed inverter topology produces seven level output voltage waveform during symmetric operation with only seven switches and three DC voltage sources. The main advantage of this inverter topology is it uses minimum number of components and hence, the cost and size of the inverter is reduced. The different methods of calculating the switching angles are presented. The performance of the proposed inverter is analysed using MATLAB/Simulink software. KEYWORDS: Mulilevel; Inverter; Symmetric; Seven level; THD; Switching angle. INTRODUCTION Multilevel inverters plays an important role in handling high power and high voltage applications [1]. In multilevel inverter, different voltage levels are added to each other to obtain a smooth stepped output voltage waveform. The multilevel inverters are classified into symmetric type and asymmetric type multilevel inverter. If the magnitude of all DC voltage sources are same, it is a symmetric multilevel inverter. On other hand, if the magnitude of all DC voltage sources are different, then it is an asymmetric multilevel inverter [2-3]. The main advantage of the multilevel inverter is it have the capability to use capacitors, batteries, fuel cells or photovoltaic (PV) as the DC voltage sources. The other advantages of the multilevel inverter includes low distortion, high power quality, minimum peak inverse voltage (PIV), staircase output voltage, low dv/dt stress, smaller common mode voltage and minimum switching losses[4-5]. The switching angles calculation is an important factor in multilevel inverter. The switching angles should be properly designed in such a way that the output waveform have low harmonic distortion. The commercial topologies of multilevel inverters includes diode-clamped or neutral point clamped[6], capacitor clamped or flying capacitor[7-8] and cascaded H-bridge inverters[9-11]. The cascaded H-bridge multilevel inverter requires less number of switching components as compared to other commercial multilevel inverters to achieve same number of output levels. The greater level of output voltage can be obtained simply by adding the DC voltage sources. However, the increase in the output levels increases the number of active power switches. The main drawback of the conventional multilevel inverter is it requires greater number of power electronic switches and the associated gate driver circuits to achieve higher number of output levels[12]. ToCite ThisArticle: Thiyagarajan V and Somasundaram P., Modified Seven Level Symmetric Inverter with Reduced Switch Count. Advances in Natural and Applied Sciences. 11(7); Pages:
2 265 Thiyagarajan V and Somasundaram P., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: Modern day researchers has developed different modulation and control strategies including pulse width modulation (PWM), selective harmonic elimination (SHE) and space vector modulation (SVM)[13-15]. Some researches has also focused on developing new inverter topology to improve the performance of the multilevel inverter. A modular cascaded H-bridge multilevel inverter suitable for both single and three phase applications is proposed in [16]. A maximum power point tracking (MPPT) control scheme is used for better utilization of PV modules. In [17], a transformerless single phase inverter for grid tied photovoltaic system is proposed. This proposed inverter topology reduces the leakage current and injects the reactive power into the grid. A symmetric and asymmetric type inverter has been proposed in [18]. The proposed inverter uses 10 switches and 3 DC voltage sources to generate seven level output voltage during symmetric mode of operation. This paper proposes a new symmetric type seven level inverter with reduced number of switches. The proposed multilevel inverter uses three DC voltage sources, and seven switches to generate seven level output voltage. Section II explains the different modes of operation of the proposed seven level inverter. Section III presents the four different methods of calculating the switching angles. The simulation results obtained using MATLAB/Simulink are presented in Section IV. The conclusion is given in Section V. Proposed Inverter Topology: Fig. 1 shows the circuit diagram of the proposed seven level inverter. It consists of three DC voltage sources and seven switches of equal rating. The proposed inverter can produce 7-level output voltage during symmetrical case of operation. Fig. 1: Proposed Multilevel Inverter The different modes of operation of the proposed inverter is shown in Fig. 2. In mode-0, the switches S 2 and S 4 or switches S 1 and S 3 are ON and the other switches are OFF to get zero as shown in Fig. 2(a). The switches S 1, S 4 and S 7 are ON during mode-1 operation and the remaining switches were OFF. In this mode, the obtained voltage is V 1 as shown in Fig. 2(b). Fig. 2(c) shows the mode - 2 operation. In this mode, the voltage V 1+V 3 is obtained by turning ON the switches S 1, S 4 and S 6. During mode-3, the switches S 1, S 4 and S 5 are ON and the voltage V 1+V 2+V 3 is obtained across the load as shown in Fig. 2(d). The mode-4 operation is opposite to mode- 1. The mode-5 operation is opposite to mode-2 operation. Similarly, the mode-6 operation is opposite to mode-3 operation. In mode-4, the voltage -V 1 is obtained across the load by turning ON the switches S 2, S 3 and S 7 as shown in Fig. 2(e). During mode-5 operation, the voltage -(V 1+V 3) is obtained with the switches S 2, S 3 and S 6 are ON and the other switches are OFF as shown in Fig. 2(f). The mode-6 operation of the proposed inverter is shown in Fig. 2(g). In this mode, the voltage -(V 1+V 2+V 3) is obtained across the load with the switches S 2, S 3 and S 5 are ON. (a) (b) (c) (d) (e) (f)
3 266 Thiyagarajan V and Somasundaram P., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: (g) Fig. 2: Different modes of operation (a) Mode - 0 (b) Mode - 1 (c) Mode - 2 (d) Mode - 3 (e) Mode - 4 (f) Mode - 5 and (g) Mode - 6 The mode-1, -2 and -3 are called as positive mode of operation where the output voltage is positive. Similarly the negative output voltage is obtained during the mode-4, -5 and -6 are called as negative mode of operation. The switching states for different modes of operation of the proposed multilevel inverter is given in Table 1. Table 1: Switching States for Different Modes of Operation Mode S 1 S 2 S 3 S 4 S 5 S 6 S 7 Output Voltage Mode Mode V 1 Mode V 1 +V 3 Mode V 1 +V 2+V 3 Mode V 1 Mode ( V 1 +V 3) Mode ( V 1 +V 2+V 3) Fig. 3 shows the comparison of the number of ON state switches corresponding to the output voltage levels for the proposed and other symmetric multilevel inverter topologies. The comparison of the output voltage levels with the number of DC voltage sources and the number of switches for different topologies of multilevel inverter are given in Table 2. From the table, it is clear that the proposed multilevel inverter uses minimum number of switches to achieve seven level output voltage Number of ON State Switches Fig. 3: Comparison of ON state Switches Table 2: Comparison of multilevel inverter Topologies Number of DC Number of Switches Inverter Sources (N dc) (N S) Cascaded Multilevel Inverter Number of level (N) Ratio (N dc / N) Ratio (N S / N) Ref. [18] Ref. [19] Ref. [20] Proposed inverter Calculation Of Switching Angles: The different methods of calculating the switching angles for the proposed symmetrical seven level inverter are given below[21]. Method - 1 In this method, the switching angles are distributed averagely over the range 0 90 o and are
4 267 Thiyagarajan V and Somasundaram P., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: determined by, N -1 i i where, i 1, 2, 3..., N 2 Method - 2 In this method, the switching angles are determined by, N -1 where, 1, 2, 3..., 1 i i i N 2 Method - 3 The main switching angles are determined by the formula given below, 2 1 N -1 sin 1 i i where, i 1, 2, 3... N 1 2 Method - 4 The proposed method of calculating the switching angles is method-4. In this method, the main switching angles are determined by using the given formula, 1 i 0.5 N -1 i 2sin where, i 1, 2, 3... N 1 2 where, N = Number of output levels. This method gives better output voltage waveform compared with other methods. The switching angles corresponding to the period 0 to 90 o are called as main switching angles. For seven level inverter, there are three main switching angles and are determined using the above mentioned methods are given in Table 3. Table 3: Switching Angles Angle Main Switching Angles (in degree) Method- 1 Method- 2 Method- 3 Method- 4 θ θ θ The switching pulses obtained using the different methods are shown in Fig. 4. (a) (b)
5 268 Thiyagarajan V and Somasundaram P., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: (c) (d) Fig. 4: Switching Pulses (a) Method - 1 (b) Method - 2 c) Method - 3 and (d) Method - 4. Simulation Results: The MATLAB/Simulink simulation results of the proposed symmetrical seven level inverter are presented in this section. The proposed inverter consists of three DC voltage sources and seven switches. The values of the DC voltage sources are V 1 = V 2 = V 3= 75. The maximum voltage obtained as 225 V (i.e., V 1 + V 2+ V 3). The seven level output voltage obtained for different switching methods are shown in Fig. 5. The result shows that the proposed inverter output voltage looks like the staircase waveform. (a) (b) (c)
6 269 Thiyagarajan V and Somasundaram P., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: (d) Fig. 5: Output Voltage (a) Method - 1 (b) Method - 2 (c) Method - 3 and (d) Method - 4. The FFT analysis of the seven level output voltage waveform for different switching method are shown in Fig. 6. (a) (b) (c) (d) Fig. 6: FFT Analysis (a) Method - 1 (b) Method - 2 (c) Method - 3 and (d) Method - 4. The simulation result shows that the harmonic content of the output voltage waveform for the switching method - 4 is less when compared with the other methods. The comparison of the fundamental output voltage and %THD are given in Table 4.
7 270 Thiyagarajan V and Somasundaram P., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: TABLE 4: COMPARISON OF VOLTAGE, CURRENT AND THD Method Fundamental Output Voltage (V) THD (%) Method Method Method Method From the above table, it is observed that the %THD of the output voltage is obtained as 11.74% for method- 4. The fundamental value of the output voltage is V for method-4, which is high when compared with other methods. Conclusion: A new symmetric type seven level inverter with minimum number of switches has been proposed in this paper. The main advantage of this inverter topology is it uses only three DC voltage so urces and seven switches to achieve seven level output voltage during the symmetric mode of operation as compared with other conventional topologies. The different methods used to calculate the switching angles are presented and the corresponding results are compared in this paper. The MATLAB/Simulink simulation results of the proposed multilevel inverter are presented in this paper. The maximum obtained voltage is 3V dc. The simulation result shows that the switching angles obtained by method - 4 achieves less THD compared with other methods. In addition, the method - 4 achieves high fundamental output voltage. Since, the proposed inverter uses minimum number of switches, the cost of the inverter is reduced and the size is minimum. The main drawback of the proposed inverter is that asymmetric mode of operation is not possible. REFERENCES 1. Baker, R.H. and L.H. Bannister, Electric Power Converter. U.S. Patent, 3: Nami, A., F. Zare, A. Ghosh and F. Blaabjerg, A Hybrid Cascade Converter Topology With Series-Connected Symmetrical and Asymmetrical Diode-Clamped H-Bridge Cells. IEEE Transactions on Power Electronics, 26(1): Babaei, E., S. Laali and Z. Bayat, Single-Phase Cascaded Multilevel Inverter Based on a New Basic Unit With Reduced Number of Power Switches. IEEE Transactions on Industrial Electronics, 62(2): Villanueva, E., P. Correa, J. Rodriguez and M. Pacas, Control of a Single-Phase Cascaded H- Bridge Multilevel Inverter for Grid-Connected Photovoltaic Systems. IEEE Transactions on Industrial Electronics, 56(11): Corzine, K.A., Y.L. Familiant, A new cascaded multilevel H-bridge drive. IEEE Trans. Power Electronics, 17: Nabae, A., I. Takahashi and H. Akagi, A New Neutral-Point-Clamped PWM Inverter. IEEE Transactions on Industry Applications, IA-17(5): Sadigh, A.K., S.H. Hosseini, M. Sabahi and G.B. Gharehpetian, Double Flying Capacitor Multicell Converter Based on Modified Phase-Shifted Pulsewidth Modulation. IEEE Transactions on Power Electronics, 25(6): Dargahi, S., E. Babaei, S. Eskandari, V. Dargahi and M. Sabahi, Flying-capacitor stacked multicell multilevel voltage source inverters: analysis and modelling. IET Power Electronics, 7(12): Meynard, T.A., H. Foch, P. Thomas, J. Courault, R. Jakob and M. Nahrstaedt, Multicell converters: basic concepts and industry applications. IEEE Transactions on Industrial Electronics, 49(5): Kangarlu, M.F. and E. Babaei, A Generalized Cascaded Multilevel Inverter Using Series Connection of Submultilevel Inverters. IEEE Transactions on Power Electronics, 28(2): Zamiri, E., N. Vosoughi, S. H. Hosseini, R. Barzegarkhoo and M. Sabahi, A New Cascaded Switched-Capacitor Multilevel Inverter Based on Improved Series Parallel Conversion With Less Number of Components. IEEE Transactions on Industrial Electronics, 63(6): Banaei, M.R., E. Salary, New multilevel inverter with reduction of switches and gate driver. Energy Conversion and Management, 52: Kim, J.H., S.K. Sul and P.N. Enjeti, A Carrier-Based PWM Method With Optimal Switching Sequence for a Multilevel Four-Leg Voltage-Source Inverter. IEEE Transactions on Industry Applications, 44(4):
8 271 Thiyagarajan V and Somasundaram P., 2017/Advances in Natural and Applied Sciences. 11(7) May 2017, Pages: Zhang, F. and Y. Yan, Selective Harmonic Elimination PWM Control Scheme on a Three- Phase Four-Leg Voltage Source Inverter. IEEE Transactions on Power Electronics, 24(7): Vafakhah, B., J. Salmon and A.M. Knight, A New Space-Vector PWM With Optimal Switching Selection for Multilevel Coupled Inductor Inverters. IEEE Transactions on Industrial Electronics, 57(7): Xiao, B., L. Hang, J. Mei, C. Riley, L.M. Tolbert and B. Ozpineci, Modular Cascaded H- Bridge Multilevel PV Inverter With Distributed MPPT for Grid-Connected Applications. IEEE Transactions on Industry Applications, 51(2): Islam, M., and S. Mekhilef, H6-type transformerless single-phase inverter for grid-tied photovoltaic system. IET Power Electronics, 8(4): Ajami, A., M.R.J. Oskuee, A. Mokhberdoran and A. Van den Bossche, Developed cascaded multilevel inverter topology to minimise the number of circuit devices and voltage stresses of switches. IET Power Electronics, 7(2): Babaei, E., S.H. Hosseini, New cascaded multilevel inverter topology with minimum number of switches. Energy Conversion and Management, 50(11): Babaei, E., M.F. Kangarlu and F.N. Mazgar, Symmetric and asymmetric multilevel inverter topologies with reduced switching devices. Electric Power Systems Research, 86: Luo, F.L., and H. Ye, Advanced DC/AC Inverters. CRC Press LLC.
Modeling and Analysis of Novel Multilevel Inverter Topology with Minimum Number of Switching Components
Copyright 2017 Tech Science Press CMES, vol.113, no.4, pp.461-473, 2017 Modeling and Analysis of Novel Multilevel Inverter Topology with Minimum Number of Switching Components V. Thiyagarajan 1 and P.
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