Design of MEMS Tunable Inductor Implemented on SOI and Glass wafers Using Bonding Technology

Transcription

1 Design of MEMS Tunable Inductor Implemented on SOI and Glass wafers Using Bonding Technology USAMA ZAGHLOUL* AMAL ZAKI* HAMED ELSIMARY* HANI GHALI** and HANI FIKRI** * Electronics Research Institute, ** Ain Shams University Abstract: - In this work, RF- MEMS tunable inductor is designed based on mechanical displacement that changes the magnetic coupling coefficient between two inductors. The two inductors are separated by an air gap of 15 µm. The tunable inductor microstructure is based on the bonding technology of two wafers, the first one is SOI wafer etched through bulk micromachining and the other one is Quartz glass substrate. Modeling and analysis of the MEMS microstructure including the two inductors and the actuator are performed using Ansoft HFSS and Intellisuite simulators respectively. The proposed inductor has a maximum Q factor of 8.83 and a self resonance frequency of 25 GHZ. The inductance value is varied from 1.69 to 6.35 nh, resulting in a tuning range of 294 %. Key-Words: - Tunable Inductor, MEMS, Wafer Bonding, RF applications. 1 Introduction Tunable inductors can be used to optimize the performance of multi-band RF front-end circuits by adjusting the center frequency of a band-pass filter, changing the impedance given by a matching network precisely and tuning the oscillation frequency of a VCO and RF filters for example. In comparison to capacitors, relatively few tunable inductor configurations have been reported. Among these presented papers, many approaches use MEMS switches to activate different static inductive sections depending on the ON/OFF configurations of the switches [1], [2]. These kinds of configurations provides only discrete values of inductance, however, continuous inductance variation is desirable for fine tuning of the frequency of resonant circuits. Other configurations which have continuous inductance variation [3]-[6] either have a small tuning ratio or can not be utilized at microwave frequencies. In this paper a tunable spiral inductor is realized using mechanical displacement that changes the magnetic coupling coefficient between a centered loops inductor and a spiral inductor. The Spiral inductor which represents the fixed part of the structure is constructed over a Glass wafer while the centered loops inductor which represents the movable part is patterned on a cantilever on SOI wafer. Anodic bonding technique is used to bond the two wafers after being aligned. The inductance value can be varied by moving the cantilever and so the centered loops above the spiral inductor using an electrostatic actuator. In the following sections, the principle of the tunable inductor and the design of both magnetic and mechanical parts of the proposed structure will be presented. Also, the fabrication process will be discussed in details. 2 Principle of Tunable Inductor The structure of the proposed tunable inductor is shown in Fig. 1.This configuration consists of a planar spiral inductor patterned on a glass wafer, a centered loops placed above the spiral inductor and of the same dimensions as its turns patterned over an electrostatically actuated cantilever on SOI wafer and a MEMS electrostatic actuator. The two inductors are separated by an air gap g o. By generating DC bias between the stationary and movable electrodes, the cantilever and so the centered loops inductor bends toward the spiral inductor, the distance between the two inductors is then reduced. When the magnetic flux of the spiral inductor penetrates these loops, eddy current flows in these loops and induces a counteractive magnetic field according to Lenz s law which causes a negative magnetic coupling between the two circuits. The more the distance between the two inductors decreases, the more the counteractive magnetic field and so the negative magnetic coupling coefficient increases, resulting in an inductance reduction. Controlling the height of the air gap that separates the two inductors through the DC bias, controls the inductance value [7].

2 SOI Wafer Electrostatic actuator electrodes Loops and are aligned accurately over them. Fig. 2-a shows the different shapes of the loops which have been simulated. g 0 Glass Wafer Spiral inductor Aluminum Oxide Fig.1 The structure of the proposed tunable inductor. In this work, Spiral inductors with different geometries and different shapes of the loops were studied and simulated. Values of inductance L, Q factor and self resonance frequency f are srf calculated by using Ansoft HFSS, a 3D electromagnetic simulator. Two different topologies of the electrostatic actuator were simulated using Intellisuite, a 3D mechanical simulator. 3 Inductor Design Two inductors were investigated, a spiral inductor over a glass wafer and a loops inductor over a SOI wafer. 3.1 Spiral inductor design Various rectangular spiral inductors have been designed using [9] and simulated using HFSS. These inductor structures have a 20 µm line width, 2 µm Aluminum line thickness and 150 µm inner diameter. Table 1 lists the number of turns and line spacing for these different structures. Design A B C D Number of turns Line spacing (µm ) 20 5 Table 1. Spiral Inductor different geometries. 3.2 Loops design In order to increase the magnetic coupling, these loops have the same dimensions of the spiral inductor turns Fig. 2 Different shapes of the simulated loops. The best shape. HFSS simulation of the magnetic coupling between an initial design of the spiral inductor and these different shapes proved that the unconnected loops shape, Fig. 2-b is the best shape among all other shapes since it gives the highest tuning ratio when being coupled with the spiral inductor turns. This shape has been used in parallel with the selected four geometries of the spiral inductor, Table 1 for the proposed tunable inductor as shown in Fig HFSS simulation The S-parameters which are calculated using HFSS are transformed into Y-parameters from which the inductance L and Q factor can be calculated based on the following equations [8], respectively: L = Im(1/ Y) / 2π f (1) Q = Im(1/ Y) / Re(1/ Y) (2) Where Y are the Y-parameters and f is the signal frequency.

3 turns in both designs B,D results in increasing the tuning ratio although having two different line spacing. 8.00E-008 (c) (d) Fig. 3 Different spiral inductor geometries with the unconnected loops shape. Spiral Inductor (Design A) coupled with 7 loops. Spiral Inductor (Design B) coupled with 4 loops. (c) Spiral Inductor (Design C) coupled with 7 loops. (d) Spiral Inductor (Design D) coupled with 4 loops. Fig. 4 shows the simulation results for design A( number of turns = 3.5 ) in two different states: Pulldown state, where the gap between the two inductors is 2 µm and No DC bias state, where the gap is 14.5 µm. It is very clear from the figure that as the gap between the loops and the spiral turns decreases, the inductance value is reduced due to increasing the negative coupling coefficient between the two circuits. The Q factor of the spiral inductor without coupling is high (19) due to the high resistivity of the glass wafer.however, reducing the gap between the two inductors will increase the self resonance frequency but unfortunately will reduce the Q factor dramatically. The results of design B (number of turns = 6.5) is shown in Fig. 5. The total inductance of the tunable spiral inductor L T can be given by L T = L Spiral M ve + M+ ve (3) Where L is the inductance of the spiral inductor Spiral without coupling, M ve is the negative mutual coupling between the loops and the spiral inductor turns and M + ve is the positive mutual coupling between the loops themselves. Table 2 shows a comparison between the four different designs.increasing the number of turns results in enhancement of both M ve and M + ve.however, the effect of M ve is the dominant since increasing the number of turns from 3.5 to 6.5 Inductance [nh] Quality factor 6.00E E E E E E E-008 air gap 14.5 mu air gap 2mu -8.00E air gap = 14.5 mu air gap = 2 mu Fig. 4 HFSS simulation results for design A (3.5 turns) Inductance. Q factor. Inductance [H] 1.50E E E E E E-007 air gap 14.5 mu air gap 2mu -1.50E-007

4 Quality factor air gap 14.5 mu air gap 2 mu 0 Fig.5 HFSS simulation results for design B (6.5 turns) Inductance. Q factor. Table 2 Comparison between the four different designs. Design A B C D L [nh] at Q max Q max Spiral only DC bias = DC bias= V PI Tuning ratio 136 % 230 % 187 % 294 % Spiral only DC bias = DC bias= V PI Spiral only f srf DC bias = [GHZ] DC bias= V PI K 3 eff g o V PI = (4) 27ε o A eff Where g o is the zero-voltage gap spacing and ε o is the permittivity of free space. Two different structures were simulated using Intellisuite, fixed free beam (cantilever beam) and clamped clamped beam. The beam of both structures has a 800 µm width, 2900 µm length and 12 µm thickness. 4.1 Fixed-free beam In this structure the loops inductor is patterned at the end of the beam. For an air gap of 14.5 µu, the beam displacement and Pull-in voltage obtained from Intellisuite simulator are shown in Fig Electrostatic Actuator Design A simple representation of an electrostatic actuator consists of two parallel conductive plates forming a capacitor with an effective overlap area A eff and separated by gap spacing g 0. The bottom plate is fixed and the top plate is suspended by a spring with stiffness K. By applying a DC bias across the two eff plates, an electrostatic attractive force is induced which pulls the top plate downward to the bottom one, thereby stretching the spring. This results in an increase of the spring force which counteracts the electrostatic force. The pull-in voltage V PI can be defined as the voltage at which the restoring spring force can no longer balance the attractive electrostatic force. In effect, the gap spacing is closed to zero at the onset of pull-in. The pull-in voltage can be easily derived based on the balance of forces and minimization of potential energy and is given by [10] Fig. 6 Intellisuite results for Fixed-free beam. Displacement. Displacement versus voltage. Different dimensions have been simulated, the Pullin voltage for different electrode lengths and different air gap height is shown in Table 3. Table 3 Pull-in voltage for different dimensions.

5 Air gap (µm) Electrode length (µu) Pull-in voltage (V) From Equation (5) and Table 3 it is clear that increasing the electrode length which will increase the effective area A eff, will decrease the pull-in voltage V PI. On the contrary, increasing the air gap height will increase V PI although it is required to obtain higher tuning ratios. 4.2 Clamped-clamped beam The loops inductor is patterned at the center of the beam, while the top electrode is divided into two areas at both ends of the beam. Beam displacement of this structure is shown in Fig. 7. This structure has the advantage of linear mutual coupling with the spiral inductor however, it requires a very high Pull-in voltage compared with the fixed free structure since its beam has a very high stiffness constant. For example, 250 V is required for an air gap height of 14.5 µu. Therefore, the fixed-free structure will be applied in the proposed tunable inductor. Fig. 7 Beam displacement for clamped-clamped beam. 5 Fabrication Process As discussed previously, the tunable inductor consists of two wafers: a glass wafer which holds the spiral inductor and a SOI wafer with the unconnected loops. Each wafer will be processed separately then aligned and bonded together at the end of fabrication process. The fabrication steps are similar to that of [7] with some modification to adapt our design and are shown in Fig Glass Wafer Processing The fabrication process of the spiral inductor will start with a 4-in quartz glass substrate as shown in Fig. 8-a; Deposition of Chromium/Gold (0.05 nm /0.2 µu) to work as a mask for glass etching. Photoresist will be spin coated and lithography will be used to remove the metal over the glass cavity only. Gold etching (gold Etchant) and chromium etching (HcL: H 2 O 2 ) from those areas that the glass will be etched. Glass Etching using HF to obtain an air cavity in which the spiral inductor will be patterned. A 0.5 µm Aluminum is deposited and patterned to obtain the spiral inductor underpass. 1 µm PECVD SiO 2 deposition to isolate the underpass from the spiral turns and lithography will be used to remove the oxide using BHF to pattern the via (c). A 2 µm Aluminum is deposited and patterned to form the spiral turns, via, RF-pads, ground, bottom electrode, DC pad for the bottom electrode, and connection for the upper electrode (d). 1 µm PECVD oxide deposition for passivation and opening contacts for the pads. 5.2 SOI wafer Processing The fabrication process of the cantilever that holds the unconnected loops inductor will start with a 4-in SOI substrate with a 10 µm thick silicon layer on a 2 µm thick SiO 2 as shown in Fig. 8-b; 0.3 µm thermal oxidation to work as a mask for silicon etching. Trench patterning and 2.8 µm silicon etching from the front side of the wafer using wet etching (TMAH) to accommodate the connection for the top electrode which is patterned on the glass wafer (e). 1 µm thermal oxidation and substrate etching from the back-side using TMAH (f). 1 µm thermal oxidation followed by 1 µm Aluminum deposition and lithography to pattern the unconnected loops, top electrode and the trench (g). Lithography and RIE to remove the SiO 2 and the silicon from the front-side to release the cantilever (h). Glass Wafer

6 (c) (d) Glass wafer fabrication steps. (e) SOI Wafer (f) (g) (h) SOI wafer fabrication steps. Fig. 8 Fabrication process. Glass process. SOI wafer. 5.3 Anodic bonding After processing the two wafers, they will be aligned and bonded using anodic bonding technique. The substrates are bonded at elevated temperature (~400 degc) by placing and clamping the substrates between two metal electrodes. A high DC potential (up to >1kV) is applied between the electrodes creating an electrical field, which penetrates the substrates. One substrate is a glass that contains sodium ions, which at the elevated temperature are displaced from the bonding surface of the glass by the applied electrical field. The depletion of sodium ions near the surface of the glass makes the surface highly reactive with the silicon surface of the other substrate forming a solid chemical bond. 6 Discussion Instead of patterning the spiral inductor on a glass wafer we can use a silicon wafer; therefore it can be applied to CMOS RF circuits. Substrate removal underneath the spiral inductor is required in this case to increase the Q factor [11], [12]. The air cavity will be patterned on the SOI wafer through silicon wet etching from the front-side of the wafer using TMAH. However, there are two limitations for this way; the first limitation is that the air gap height will be limited to the silicon layer height over SiO 2 on the SOI wafer which in sequence will limit the tuning ratio as discussed earlier. The second limitation is that the anodic bonding technique can't be used to bond two silicon wafers. We can use other bonding techniques such as fusion bonding which is not that good as anodic bonding from the point of view of bonding force. For the electrostatic actuator at one-third of the initial gap, the beam is at the threshold of instability. There is no static equilibrium position beyond this point (until contact) because the increase in electrostatic forces due to further displacement overwhelms the mechanical restoring force. Positive feedback snaps the movable beam down all the way to the bottom electrode. Analytical results show that the travel range of rigid electrostatic actuators can be extended by manipulating the shape of the electrode. Even a full travel range (100%) can be realized by a general power function shaped electrode. It is found that the partial actuation can avoid pull-in and reach full travel ranges with the sacrifice of the bias voltage [13]. The values of tuning ratio listed before are calculated without considering the pull-in phenomena i.e. the electrostatic actuator is considered to have a full

7 traveling range. If we will consider the pull-in phenomena, the continuous tuning ratio will decrease dramatically, for example for design C the continuous tuning ratio will drop from 187 % to 26 %. 7 Conclusion A tunable MEMS inductor with a tuning range of 294 % has been proposed. The inductor has a maximum Q factor of 8.83 and can operate up to 25 GHZ. The tunability is achieved by controlling the magnetic coupling coefficient between two inductors, the spiral inductor and a centered loops inductor. Two wafers were utilized to build the structure, a glass wafer and a SOI wafer. Anodic bonding technique is used to bond both wafers. Acknowledgement I would like to thank Prof. Dr. Ayman El-Dessouki, president of Electronics Research Inst., who gave us the opportunity to do this research in the Central Electrical and Engineering Research Inst.,CEERI Pilani, India. Also I would like to thank Dr. S. Ahmed and all other members in CEERI for helping me and giving me the chance to use their MEMS facilities. References: [1] Zhou S, Sun X Q and Carr W N 1999, "A monolithic variable inductor network using microrelays with combined thermal and electrostatic actuation," J. Micromech. Microeng. [2] S. Balachandran, B. Lakshminarayanan, T. Weller, and M. Smith, "MEMS tunable planar inductors using DC-contact switches," 34th European Microwave Conference, Amsterdam, 2004, pp [3] Saleh N 1978, "Variable Microelectronic Inductors," vol CHMT-1, no 1. [4] Lubecke V, Barber B, Chan E, Lopez D, Gross M and Gammel P 2001, "Self-assembling MEMS variable and fixed RF inductors," IEEE Trans. on MTT (Nov. 2001) vol 49 no 11. [5] Y. Yokoyama, T. Fukushige, S. Hata, K. Masu, and A. Shimokohbe, Onchip variable inductor using microelectromechanical systems technoloy, Jpn. J. Appl. Phys., vol. 42, no. 4B, pp , Apr [6] I. Zine-El-Abidine, M. Okoniewski, and J. McRory, "A Tunable RF MEMS Inductor," International Conference on MEMS, NANO and Smart Systems (ICMENS 04). [7] C. Tassetti1, G. Lissorgues1 and J. Gilles, " New tunable RF MEMS microinductors design," J. Micromech. Microeng. 14 (2004) 1 6. [8] I. J. Bahl, "High-performance inductors," IEEE Trans. Microwave Theory Tech., vol. 49,no. 4,pp ,Apr [9] H. M. Greenhouse, "Design of planar rectangular microelectronic inductors," IEEE Trans. Parts, Hybrids, Packag., vol. PHP-10, pp , June [10] Nathanson H C, Newell W E, Wickstrom R A and Davis Jr J R 1967 "The resonant gate transistor," IEEE Trans. Electron Devices [11] J. Y. C. Chang,A. A. Abidi, and M. Gaitan, "Large suspended inductors on silicon and their use in a 2 µm CMOS RF amplifier," IEEE Electron Devices Letters, vol. 1, pp , Oct [12] C. Y. Chi and G. M. Rebeiz, "Planar microwave and millimeter wave lumped element and coupled line filters using micromachined techniques," IEEE Trams. Microwave Theory Tech., vol. 43, pp , Apr [13] J. Cheng, J. Zhe, and X. Wu, Analytical and finite element model pull-in study of rigid and deformable electrostatic microactuators, J. Micromech. Microeng, Vol. 14, No. 1, pp , Jan