Final Examination Copyright reserved. Finale Eksamen Kopiereg voorbehou. Analoogelektronika ENE Junie 2008

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1 Departement Elektriese, Elektroniese en Rekenaar-Ingenieurswese Finale Eksamen Kopiereg voorbehou Analoogelektronika ENE Junie 2008 Department of Electrical, Electronic and Computer Engineering Final Examination Copyright reserved Analogue Electronics ENE June 2008 Toetsinligting / Test information: Maksimum punte / Maximum marks: 100 Volpunte / Full marks: 100 Duur van vraestel: Duration of paper: 180 minute 180 minutes Eksamineringsbeplanning: n Addisionele 10 minute sal aan die begin van die eksaminering beskikbaar gestel word. Gedurende hierdie tydperk mag kandidate nie op die antwoordstelle skryf nie. Test planning: An additional 10 minutes will be availed at the start of the test. During this period, candidates may not make any markings on the answer scripts. Oopboek / toeboek: Open / closed book: Oop (Enige materiaal) Open (Any material) Geen toestel met n kommunikasiepoort (van enige aard) word toegelaat nie. Any device with a communication port (of whatsoever kind) may not be used. BELANGRIK- IMPORTANT 1. Die eksamenregulasies van die Universiteit van Pretoria geld. The test & examination regulations of the University of Pretoria apply. 2. Vrae moet in onuitwisbare ink beantwoord word. Geen antwoorde wat in potlood geskryf is sal gemerk word nie. Questions must be answered in indelible ink. Answers in pencil will not be marked. 3. Beantwoord al die vrae en skryf u antwoorde in u Antwoordboek neer. Geen vrae mag op die vraestel beantwoord word nie. Answer all the questions and write the answers in the supplied Answer Book. No questions are to be answered on the Question Paper. 4. Toon alle berekeninge waar van toepassing. Geen punte sal toegeken word vir korrekte antwoorde sonder berekeninge om dit te staaf nie. Show all calculations where applicable. No marks will be given for correct answers without calculations/reasoning to support them. 5. Gebruik duidelik geregverdigde & kundige Ingenieursbenaderings (en/of aannames) waar/indien van toepassing. Use clearly justified & educated Engineering approximations (and/or stated assumptions) where/as appropriate. 6. Datavelle: Vir karakteristieke waar beide tipiese, maksimum en (moontlik) minimum waardes gespesifiseer word, gebruik die tipiese waardes. (tensy anders in vraag gespesifiseer) Datasheets: For characteristics where the typical, maximum and (possibly) minimum values are specified, make use of the typical value (unless/otherwise specified in the question). Dosent: Lecturer: Mr Saurabh Sinha ( ssinha@ieee.org) Eksterne Eksaminator: External examiner: Prof. M. du Plessis ( monuko.du.plessis@eng.up.ac.za) Vertaler (Engels Afrikaans): Translator (English Afrikaans): Wynand Lambrechts ( wynand_lam@vodamail.co.za) Groephoof: Ek bevestig dat die vraestel die uitkomstes toets soos gespesifiseer in die studiehandleiding. Group head: I confirm that the question paper evaluates the outcomes as specified in the study guide. Groephoof: Group Head: Prof. M. du Plessis Handtekening: Signature: Totale aantal bladsye (hierdie blad ingesluit) / Total number of pages (including this page): 9

2 Study theme and Study units 1. Introduction to amplifier circuits SU1 Signals SU2 Basic amplifiers 2. Bipolar transistor amplifiers SU3 Bipolar transistor amplifiers & small signal analysis SU4 Graphical analysis and biasing SU5 Basic single stage BJT amplifier configurations 3. Field effect transistor amplifiers SU6 MOSFET transistor amplifier SU7 MOS circuit biasing and basic configurations 4. Differential and multistage amplifiers SU8 BJT and MOSFET differential amplifiers (DAs) 5. Amplifier frequency response SU9 Frequency terminology and Bode plots SU10 Transistor frequency response SU11 s-domain analysis and amplifier transfer functions SU12 Low- and high-frequency responses of the CS and CE amplifiers SU13 Cascode configurations and frequency responses 6. Feedback SU14 Feedback structure and basic feedback topologies SU15 Feedback topology analysis SU16 Loop gain, loop stability, and frequency compensation 7. Output stages and power amplifiers SU17 Output stages SU18 Power transistors and variations on the class AB configurations Questions Notional hours % Contribution 1, 2 & , 4 & & & & 6 Total credits AFRIKAANS AGTER-OP 1

3 QUESTION 1 [35] A multi-stage amplifier is proposed: V SUP r in r out/uit R source v 1 v o1 v u1 C C v o/u v s A 1 A 2 A v R L R source = 50 Ω, R L = 20 kω and V SUP = 12 V The multi-stage amplifier should achieve: Gain (v o /v s ) 50 V/V f L = 100 Hz Gain (v o1 /v s ) 3 V/V 0 1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz 300KHz 1.0MHz 3.0MHz 10MHz 30MHz 100MHz Frequency The following circuit must be used for this problem: A 1 V SUP A 2 R 11 R D R 21 v C C o1 v u1 R C C OUT v o/u C VCC_BAR VCC 0 C IN v 1 R 12 R S R 22 R E C B SPICE Model for transistors:.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3 + Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u + Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18 + Af=1) * National pid=50 case=to92 A V.model Q2N2222 NPN(Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=255.9 Ne= Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 + Cjc=7.306p Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 + Tr=46.91n Tf=411.1p Itf=.6 Vtf=1.7 Xtf=3 Rb=10) AFRIKAANS AGTER-OP 2

4 Only standard 5 % resistors, and standard capacitors are available (specification sheets attached). 1.1 [21] Complete the design by providing component values to achieve the above specifications. 1.2 [6] For your design, verify the high-frequency pole, f H. 1.3 [4] Propose the addition of a capacitor (also specify the component value) to limit the high-frequency response to 20 khz. Show this on the schematic (in the answer script). 1.4 [2] Sketch the phase plot for v o /v s. 1.5 [2] Determine the DC power consumption of the circuit. QUESTION 2 [10] Consider the simple active filter. Assume that the operational amplifier is ideal. C F R F v s R source C IN - VCC VCC + OUT v o Given: R source = 50 Ω R source C IN >> R F C F [2] Sketch the Bode magnitude plot for the amplifier. 2.2 [2] Approximately derive the transfer function of the amplifier, A v (jω), in terms of the passive circuit components. 2.3 [2] Sketch the phase plot for the amplifier. 2.4 [1] Resistor, R B is added in series to the non-inverting terminal. If the operational amplifier was a non-ideal amplifier, then R B compensates for the effects of input offset currents, I OS. Determine the value of RB. 2.5 [3] The active filter should have a low-frequency cut-off of 100 Hz, a highfrequency cut-off of 900 khz, and a pass-band gain of 50. Only standard 5 % resistors, and standard capacitors are available (specification sheets attached) [2] Determine C IN and C F [1] Determine R F. AFRIKAANS AGTER-OP 3

5 QUESTION 3 [10] Consider the differential amplifier shown below. V DD I SS V DD v 1 M 1 VCC_BAR v o1 VCC_CIRCLE v VCC_BAR o v o - M 2 v 2 R D R D V SS Voltage Supplies: V DD = 10 V V SS = -10 V Current Source: I SS = 40 μa Assume the output resistance of the current source to be 1.25 MΩ. Notation: v id = v 1 - v 2 Transistor parameters: W μa k p = μ pcox = 200 V 2 L V TO = -2.2 V V A [6] Design (choose a value for R D ) for a differential gain: vo A dm = = 28 db v [1] Determine the differential input resistance, r id [1] Determine the output resistance, r o (for a differential output, v o ). id 3.2 [2] For a single-ended output, v o1, determine (in db) the common-mode rejection ratio (CMRR). AFRIKAANS AGTER-OP 4

6 QUESTION 4 [20] 4.1 [14] Consider the series-shunt amplifier shown below. r in-fb V CC v s + - OUT r out-fb r out-β v f R 1 R 2 VCC VCC VCC_BAR v o I Q R 1 = 1 kω Feedback Network, β Operational amplifier parameters: A v = 5000 R i = 10 kω R o = 1 kω Transistor parameters: V f = 0.7 V h FE = 100 V A = 80 V Assume an ideal current source is available, I Q = 0.2 ma. The supply voltage, V CC = 10 V [1] Determine the feedback factor, β [1] Determine the amount of feedback: 1 + A o β [9] Determine the resistances: r in-β, r out-β, r in-fb, and r out-fb [1] Determine the closed loop gain (considering the type of feedback), A fb [3] Summarize the above results, using a unilateral model for the closed-loop amplifier. r in-β R 2 = 10 kω 4.2 [5] An integrator is shown below. C v s R - Given: R = 100 kω C = 0.01 μf Single-pole operational amplifier parameters: A o = 100 db f T = 1 MHz Determine the: [3] loop gain, and [2] phase margin. VCC VCC + 0 OUT v o AFRIKAANS AGTER-OP 5

7 QUESTION 5 [21] Consider the class AB output stage shown below. The parameters are: V + = -V - = 24 V R L = 20 Ω I Bias = 10 ma The diode and transistor parameters are I S = 2 pa. The transistor current gains are β n = 20 and β p = 5 for the npn and pnp devices, respectively. 5.1 [15] For v o = 0, determine: [3] V BB [7] Quiescent collector currents, I C1, I C2, and I C [5] Base-Emitter Voltages, V BE1, V BE2, and V EB [6] An average power of 10 W is to be delivered to the load. Determine the quiescent collector current in each transistor and the instantaneous power dissipated in Q 2 and Q 5, and R L when the output voltage is at its peak negative amplitude. QUESTION 6 [4] A BJT must dissipate 25 W of power. The maximum junction temperature is T J,max = 200 C, the ambient temperature is 25 C, and the device-to-case thermal resistance is 3 C/W. Determine the maximum permissible thermal resistance between the case and ambient. AFRIKAANS AGTER-OP 6

8 AFRIKAANS AGTER-OP 7

9 AFRIKAANS AGTER-OP 8

10 Studentenommer / Student Number Volle Voorname / Full Name VRAAG/QUESTION 1 [35] R source/bron = 50 Ω, R L = 20 kω and / en V SUP = 12 V Beoordelaar 1 (Vraag 1) Evaluator 1 (Question 1) Saurabh Sinha ( ssinha@ieee.org)

11 Beoordelaar 1 (Vraag 1) Evaluator 1 (Question 1) Saurabh Sinha ( ssinha@ieee.org) 2

12 Studentenommer / Student Number Beoordelaar 1 (Vraag 1) Evaluator 1 (Question 1) Saurabh Sinha ( ssinha@ieee.org) 3

13 Beoordelaar 1 (Vraag 1) Evaluator 1 (Question 1) Saurabh Sinha ( ssinha@ieee.org) [21] 4

14 Studentenommer / Student Number 1.2 Beoordelaar 1 (Vraag 1) Evaluator 1 (Question 1) Saurabh Sinha ( ssinha@ieee.org) [6] 5

15 1.3 [4] 1.4 <T(jω) f (Hz) [2] 1.5 Beoordelaar 1 (Vraag 1) Evaluator 1 (Question 1) Saurabh Sinha ( ssinha@ieee.org) [2] 6 Total/Totaal: [35]

16 Studentenommer / Student Number Volle Voorname / Full Name VRAAG/QUESTION 2 [10] C F R F v s R source R bron C IN VCC VCC + - OUT v o/u A v (jω) ω (rad/s) [2] 2.2 Beoordelaar 2 (Vraag 2) Evaluator 2 (Question 2) Samuel Twala ( s @tuks.co.za) [2] 7

17 2.3 <T(jω) ω (rad/s) [2] 2.4 [1] 2.5 Beoordelaar 2 (Vraag 2) Evaluator 2 (Question 2) Samuel Twala ( s @tuks.co.za) [3] 8 Total/Totaal: [10]

18 Studentenommer / Student Number Volle Voorname / Full Name VRAAG/QUESTION 3 [10] V DD I SS V DD v 1 M 1 VCC_BAR v o/u1 VCC_CIRCLE v VCC_BAR o/u v o/u - M 2 v 2 R D R D V SS Beoordelaar 3 (Vraag 3) Evaluator 3 (Question 3) Schalk Peach ( s @student.up.ac.za) 9

19 [6] [1] [1] 3.2 Beoordelaar 3 (Vraag 3) Evaluator 3 (Question 3) Schalk Peach ( s @student.up.ac.za) [2] 10 Total/Totaal: [10]

1.3 Beoordelaar 4 (Vraag 4) Evaluator 4 (Question

20 Studentenommer / Student Number Volle Voorname / Full Name VRAAG/QUESTION 4 [20] [1] [1] Beoordelaar 4 (Vraag 4) Evaluator 4 (Question 4) Wayne Maclean ( wayne.maclean@gmail.com) 11

21 [9] [1] Beoordelaar 4 (Vraag 4) Evaluator 4 (Question 4) Wayne Maclean ( wayne.maclean@gmail.com) [3] 12

22 Studentenommer / Student Number 4.2 C v s R - VCC VCC + 0 OUT v o/u Beoordelaar 4 (Vraag 4) Evaluator 4 (Question 4) Wayne Maclean ( wayne.maclean@gmail.com) [5] 13 Total/Totaal: [20]

23 Beoordelaar 4 (Vraag 4) Evaluator 4 (Question 4) Wayne Maclean ( wayne.maclean@gmail.com) 14

24 Studentenommer / Student Number Volle Voorname / Full Name VRAAG/QUESTION 5 [21] v o/u [3] Beoordelaar 5 (Vraag 5) Evaluator 5 (Question 5) Wynand Lambrechts ( wynand_lam@vodamail.co.za) 15

25 5.1.3 [7] Beoordelaar 5 (Vraag 5) Evaluator 5 (Question 5) Wynand Lambrechts ( wynand_lam@vodamail.co.za) [5] 16

26 Studentenommer / Student Number 5.2 Beoordelaar 5 (Vraag 5) Evaluator 5 (Question 5) Wynand Lambrechts ( wynand_lam@vodamail.co.za) [6] 17 Total/Totaal: [21]

27 Beoordelaar 5 (Vraag 5) Evaluator 5 (Question 5) Wynand Lambrechts ( wynand_lam@vodamail.co.za) 18

28 Studentenommer / Student Number Volle Voorname / Full Name VRAAG/QUESTION 6 [4] Beoordelaar 2 (Vraag 6) Evaluator 2 (Question 6) Samuel Twala ( s @tuks.co.za) 19 Total/Totaal: [4]

29 Beoordelaar 2 (Vraag 6) Evaluator 2 (Question 6) Samuel Twala ( s @tuks.co.za) 20

Meghan van Wouw ( Christo Janse van Rensburg ( Blessing Buthelezi (

Meghan van Wouw ( Christo Janse van Rensburg ( Blessing Buthelezi ( Departement Elektriese, Elektroniese en Rekenaar-Ingenieurswese Finale Eksamen Kopiereg voorbehou Analoogelektronika ENE310 08 Junie 2010 Toetsinligting / Test information: Department of Electrical, Electronic