ECEN3250 Lab 6 Design of Current Sources Using MOS Transistors

Transcription

1 Lab 6 Design of Current Sources Using MOS Transistors with Extra-Credit Problem Design of a Saw-Tooth Waveform Generator ECE Department University of Colorado, Boulder 1

2 Prelab Assignment Current sources are used extensively for biasing and as active loads in analog integrated circuits. Figure 1 shows an ideal current source where the output current I out is independent of the voltage across the output terminals. The objective in this prelab assignment is to design a current source using two NMOS transistors in a current mirror configuration shown in Figure 2. The NMOS transistors in the current mirror are. The available supply voltage source is V DD =15V. 2

3 Prelab Assignment 1. Design the current mirror, i.e., choose R so that the output current (assuming that M2 operates in saturation) is: a) I out = 1 ma b) I out = 10 ma c) I out = 100 ma For use the model parameters you found in Lab 5. For each of the three designs, find the minimum voltage,min across the output terminals of the current source such that the output current I out has the specified value, i.e., such that M2 operates in saturation. Turn in your calculations and results. Note that,min is a measure of how good the current source is. Ideally, there is no,min, i.e. the voltage across the ideal current source is arbitrary. With real devices, however,,min is greater than zero. In lab 6 you will examine and test,min for several current-source configurations. 3

4 Prelab Assignment 2. Use PSpice to verify the three designs completed in part 1: connect a voltage source across the output terminals of the current source, as shown in Figure 3. Sweep in the range from 0 to 10 V to obtain the dc output characteristic (i.e. the i-v characteristic) of the current source. Use the library model of (from 3250.lib). On the printouts of the i-v characteristics, label the voltages,min and compare them to the values you computed in part 1 of the prelab assignment. Use the cursors to find the incremental output resistance r out defined by: ΔV Vout,2 V out out,1 rout = = ΔI out I out,2 I out,1 where,2 >,1 >,min. Turn in the simulation results. Note that the incremental output resistance is another measure of how good a current source is. An ideal current source has infinite incremental output resistance, r out. A real current source has a finite output resistance. In lab 6 you will study and test several ways to improve the output resistance of current sources. 4

5 Prelab Assignment circuit biased by I out I out Figure 1: Ideal current source. 5

6 Prelab Assignment V DD = 15 V R circuit biased by I out I out M1 M2 Figure 2: Current source realization using an NMOS current mirror. 6

7 Prelab Assignment V DD = 15 V R I out M1 M2 Figure 3: Circuit for testing the current-source performance using PSpice.dc simulation. 7

8 Introduction Lab objectives: Design and test current sources using MOS transistors Experience with MOS incremental output resistance Current-source specification: Nominal dc output current I out,nom, specified at a nominal voltage,nom across the current source terminals Current-source characteristics: circuit biased by I out I out Minimum voltage,min across the output terminals so that I out I out,nom. Ideally,,min =0. A practical current source has,min >0 because of the real device limitations (such as triode operation of a MOS transistor) Incremental output resistance: ΔV V out out,2 V rout = = ΔI I I out V > V > V out,2 out, 2 out,1 out,min out,1 out,1 Ideally, r out 8

9 Lab Tasks 1. Design and test a current source using the simple current mirror from the prelab assignment 2. Design and test a current source using a current mirror with improved incremental output resistance 3. Design and test of a high-performance current source using an op-amp and a MOS transistor in a feedback configuration 9

10 Design specifications and post-lab report Design specifications (same for each of the 3 current-source configurations) Choose all resistors so that: I out,nom = 10 ma at,nom = 5 V,min is at most 1 V r out is as large as possible Except with the current source based on a simple current mirror, the solution is not unique you are expected to use circuit analysis, simulation and experiments to improve the current-source performance Report guidelines (for each of the 3 current-source configurations) Detailed description of circuit analysis, simulation results and experimental observations you used to finalize the design A labeled plot of the measured output characteristic (I out as a function of, for in the range from 0 to 10 V) of the final version of the current source you designed.,min and r out Comments on the performance of the current source 10

11 1. Simple Current Mirror as a Current Source V DD = 15 V R A I out I R M1 M2 V Use the prelab results to start the design In addition to the report tasks on Page 4, use the measured I out ( ) data to find and report the λ parameter of. Compare to the value of LAMBDA in the PSpice library model Use the bench variable DC voltage source as. Do not forget to include decoupling capacitors. 11

12 2. Improved Current Source V DD = 15 V A R 1 I out I R To think about: M1 M2 R 2 R 3 V What are the effects of the added resistors R 2, R 3 on,min and r out? Start from circuit analysis for the case R 2 = R 3 Use the bench variable DC voltage source as. Do not forget to include decoupling capacitors. 12

13 3. High-Performance Current Source V DD = 15 V A R 1 I out I R VDD=15 V LF356 M1 V VEE= 15 V R 2 R 3 Start by deriving an expression for I out as a function of V DD, R 1, R 2, and R 3. In the experiment, use the bench variable DC voltage source as. Do not forget to include decoupling capacitors. 13

14 Lab 6 Extra-Credit Problem Design of a Saw-Tooth Waveform Generator Specifications: Your task is to design, test and demonstrate operation of a saw-tooth waveform generator The output voltage v c (t) of the saw-tooth waveform generator is shown below The saw-tooth waveform specs are: V M = 10 V, T = 50 μs, 1/T = f = 20 KHz, t r = 40 μs v c (t) V M 0 t r T t 14

15 Conceptual solution The saw-tooth waveform generator can be constructed using a constant current source feeding a parallel combination of a capacitor C and a controllable switch S. The on/off state of the switch is controlled by a pulsating switch-control voltage waveform v g (t), which can be obtained from the laboratory function generator. When the switch control signal v g (t) is equal to zero, the switch S is off, and the capacitor voltage v c (t) increases as a linear function of time (why?). When v g (t) is equal to V G, the switch S is on, and the capacitor C is quickly discharged to zero through the small on-resistance of the switch. V DD = 15 V v c (t) V M I out v g (t) switch control S C v c (t) v g (t) t r T V G t S off S on 15

16 Design hints and grading policy One terminal of the current source I out is connected to V DD = 15 V. Consider using one or two PMOS transistors to construct the current source. One terminal of the switch S is connected to ground. Consider using an NMOS transistor as the controllable switch, with v g (t) connected to the gate. The laboratory function generator can be used to obtain the switch-control waveform v g (t). Adjust the generator to produce the pulsating waveform with V G = 5 V amplitude, f = 20 KHz frequency, 20% duty cycle, and an offset so that the voltage levels of v g (t) are zero and V G = 5V Grading: you can earn one extra-credit point if you demonstrate operation of the sawtooth generator to the TA or the instructor; you can get another extra-credit point if you turn in a complete report for this extra-credit task Extra-Credit Report should include: Complete, labeled circuit diagram of the saw-tooth waveform generator you constructed, together with an analysis that shows how you selected all parameter values in the circuit A labeled sketch of the oscilloscope waveforms of v g (t) and v c (t) with comments on how and why the experimental waveforms differ from the ideal specification 16