Modified Cascaded H-Bridge Multilevel Inverter with one Switched Inductor Quasi-Z-Source Network

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1 ISSN: olume 03 Issue 08 August 016 PP. 733 Modified Cascaded HBridge Multilevel Inverter with one Switched Inductor QuasiZSource Network G. Prem Sunder 1, B. Shanthi, Alamelu Nachiappan 3, S. P. Natarajan 4 ¹ Department of Electrical and Electronics Engineering, Mailam Engineering College, India ² Centralized Instrumentation and Service Laboratory, Annamalai University, India ³ Department of Electrical and Electronics Engineering, Pondicherry Engineering College, India 4 Department of Instrumentation Engineering, Annamalai University, India ABSTRACT: Performance analysis on modified Cascaded HBridge Multilevel Inverter with one Switched Inductor quasizsource network (SLqZSMCHBMLI) is presented in this paper. The proposed topology has DC sources connected to QuasiZ Source (qzs) network, and a modified HBridge network including a full H bridge and half bridge units. The proposed topology provides massive merits like voltage boosting capability and reduced number of switches when compared to conventional quasiz source cascaded MLI. The performance analysis of the proposed topology in terms of output voltage THD is presented with the simulated results obtained from MATLAB. KEYWORDS Half bridge units; Modified CHBMultilevel Inverter; Switched inductor; THD; Quasi Z Source network. I. INTRODUCTION Recent research activities show much interest on multilevel inverters as it is utilized in effective powerconversion systems for highpower applications. The multilevel inverters provide good quality output voltage with reduced voltage stress across the switching components [1]. Cascaded Hbridge multilevel inverter (CHB MLI) employs separate dc voltage sources from renewable energy sources such as P panel or windmill to create multilevel output voltage [5]. The CHBMLI is more advantageous than other multilevel inverter topologies, and is broadly utilized in photovoltaic (P) power systems. ariation in P voltage causes drastic change in dclink voltage i.e., voltage imbalance. This problem can be resolved by including an extra dcdc boost converter into each module's dclink after P panel, providing twostage conversion in each module. QuasiZsource cascaded Hbridge multilevel inverter (qzschbmli) achieves the same purpose in singlestage power conversion [6], [7]. The recent researches show much interest on Modified Cascaded HBridge Multilevel Inverter (MCHBMLI) to further reduce the number of switches and minimize manufacturing cost [8]. Analysis of QuasiZ Source modified Cascaded HBridge Multilevel Inverter with one switched inductor (SLqZSMCHBMLI) has been proposed in this paper. The SLqZSMCHBMLI has the advantages of voltage boosting capability, lower THD, reliability against shortcircuits, and lower number of switches and single stage power conversion. The SLqZSMCHBMLI have DC sources connected to QuasiZ Source (qzs) network with switched inductor, and a modified HBridge network comprising a full Hbridge and half bridge units based on number of DC sources. The introduction of switchedinductor provides a high boost factor [9] [11], thus overcoming the boost limitations of the traditional qzschbmli. The demerits such as high voltage stress on capacitors, discontinuous input current, and no common ground point between the CHB inverter and dcsource can be evaded with the help of the SLqZSMCHBMLI. The switched inductor improves the voltage boost gain for the same shoot through duty ratio when compared with the conventional topologies. The switched inductor makes possible the operation of the proposed topology at higher modulation index, reducing the stress over the switching components. The performance of the proposed topology with seven level output voltage has been presented in this paper, accomplishing outstanding performance with combined advantages of the switched inductor, qzs network, half bridge units and a full HBridge module. The THD analysis of the proposed topology for a seven level output voltage is presented with the simulated results obtained using MATLAB. II. SWITCHEDINDUCTOR QUASIZSOURCE MCHB MLI The proposed SLqZSMCHBMLI for producing 7level output voltage is as shown in Fig.1. Each unit of the SLqZSMCHBMLI contains a SLqZS network with switchedinductor cells, and an Hbridge inverter module. The switchedinductor cell has three diodes (D, D 3 & D 4 ) and two inductors (L & L 3 ). The SLqZS network provides the common ground point with the CHB inverter. The switchedinductors allow the proposed topology to draw continuous current from the dc source. The switchedinductor cells improve the voltage boosting capability of the proposed topology with the inclusion of only three diodes and one inductor. Page 7

2 ISSN: olume 03 Issue 08 August 016 PP. 733 The operation of the proposed topology is explained with shootthrough and nonshootthrough states. The equivalent circuit of the nonshootthrough state is exposed in Fig. and that of the shootthrough state is revealed in Fig.3. C D L1 D1 D4 L D3 Sa1 in1 Sa C L1 D1 D D4 S1 S3 L D3 Sb1 in Sb C S4 S D L1 D1 D4 L D3 Sc1 in3 Sc Fig.1. Proposed 7Level Asymmetric SLqZSMCHBMLI In the nonshootthrough state, the diode D 1 and D 4 are in on state, whereas D and D 3 are in off state. L and L 3 are coupled in series. The capacitors and C are charged, whereas the inductors L 1, L, and L 3 transfer energy from the dc voltage source to the MCHB inverter circuit. In the shootthrough state, the inverter side is shorted by both the upper and lower switching devices of any leg. During the shootthrough state, D 1 and D 4 are in off state, whilst D and D 3 are in on state. L and L 3 are coupled in parallel. The capacitors C 1 and C are discharged, whilst inductors L 1, L, and L 3 stores energy. The value of the voltage across capacitor C 1 is given in (1) D sh Dsh Dsh in (1) The value of the voltage across capacitor C is given in () D sh C Dsh Dsh in () Page 8

3 ISSN: olume 03 Issue 08 August 016 PP. 733 C i L1 i C L1 in1 i L i L i dc Fig.. Non shootthrough state of the Proposed Topology C i C L1 in1 i L1 i i L L i Fig.3. Shootthrough state of the Proposed Topology Fig.4. The relationship of boost factor with shootthrough duty ratio for qzsmli and ASLqZSCHBMLI using simple boost control. The value of DC link voltage is given in (3) v DC D sh C Dsh Dsh dc B dc (3) Page 9

4 ISSN: olume 03 Issue 08 August 016 PP. 733 The value of AC output voltage is as given in (4) v ac M B dc (4) Fig. 4 shows the boost factor versus duty cycle for the proposed SLqZSCHBMLI and qzschb MLI topologies. The boost ability of the proposed topology is higher than that of the classical topologies. III. PWM CONTROL OF THE PROPOSED SLQZSMCHBMLI There are several multicarrier pulse width modulation (MCPWM) methods available for controlling the proposed SLqZSMCHBMLI [1]. In this paper, the switching signals for the proposed topology are obtained by phase disposition pulse width modulation (PDPWM) technique, where the triangular carriers are in phase with each other, having same frequency f c and same amplitude A c. The carriers are positioned in such a way that the areas they cover are contiguous. The reference signal with an amplitude A m and frequency f m is compared with each of the triangular carriers to produce gate pulses. Shootthrough states are mandatory for perfect operation and control of the proposed topology. The shootthrough states are established in the generated pulses by varying shootthrough duty cycle. The shootthrough states can be produced by simple, maximum and constant boost control methods [13], [14]. The shootthrough states facilitates buck, boost and extended boost operations of the proposed topology. In this paper, the simple boost control method is used for providing shoot through states to the proposed topology. The simple boost control method utilizes a straight line, whose amplitude is equal to or greater than the peak value of the modulating signal in order to introduce the shootthrough states. The shootthrough duty ratio D sh can be customized as a constant value. The shootthrough duty ratio for the proposed topology is given in (5) D sh = T sh T = 1 M (5) The relationship between modulation index M and shootthrough duty ratio is given in (6) M < 1 D sh (6) The boost factor of the SLqZSMCHBMLI is shown in (7) B = 1D sh 1 D D sh (7) Here, B is the boost factor and D sh is the shoot through duty ratio. The proposed topology needs lower shootthrough duty ratio as compared with conventional qzsmchbmli for attaining the same boost gain. This advantage of the proposed topology provides the better improvement in the output voltage. Fig.5.The relationship of voltage gain with modulation index for qzsmli and SLqZSMCHBMLI using simple boost control. Page 30

5 ISSN: olume 03 Issue 08 August 016 PP. 733 The voltage gain G versus the modulation index M characteristics of the proposed topology is as shown in Fig.5. It is observed from the plot that the voltage gain G increases with a decrease in the modulation index. From the plot, it is described that the modulation index M of the proposed topology is high for the same voltage conversion ratio as compared to conventional qzschbmli. I. SIMULATION RESULTS The proposed topology is simulated in Matlab/Simulink software. The following simulation parameters are considered for each unit to analyze the performance of the proposed SLqZSCHBMLI. L 1 = L = L 3 = L 4 = mh, C 1 = C =000μF, ratio D = 0.1, B = 1.39 and R = 10 Ω, where D is the duty ratio and B is the boost factor. The switching frequency is set to 10 khz and the input is set to 100 for each unit. The output voltage for 7level SLqZSMCHBMLI configuration is shown in Fig.6. The DC link voltage for the 7level SLqZSMCHBMLI is provided in Fig.7. The capacitor voltages of the 7level SLqZSMCHBMLI are provided in Fig.8. The THD spectrum from FFT analysis for the 7level output voltage is presented in Fig.9. As depicted in Fig.6, the peak fundamental output voltage of the proposed topology is boosted to when the input dc voltage in1 =100. Fig.6. Output voltage of 7 level SLqZSCHBMLI Fig.7. DC link voltage of a 7 level SLqZSCHBMLI Fig.8. Capacitor voltages of a 7 level SLqZSCHBMLI Page 31

6 ISSN: olume 03 Issue 08 August 016 PP. 733 Fig.9. THD Spectrum for Output voltage of 7 level SLqZSCHB. CONCLUSIONS The performance analysis of the SLqZSMCHBMLI topology with extended boost capability is presented in this paper. The boosted output voltage, DC link voltage, capacitor voltages and output voltage THD of the proposed topology are presented with the simulated results using MATLAB. The result ensures reduced THD and boosted output voltage for the proposed seven level topology. This topology can be effectively applied for P or wind power conversion systems. REFERENCES [1]. J. Rodriguez, J.S. Lai, and F. Z. Peng, Multilevel inverters: A survey of topologies, controls, and applications, IEEE Trans. Ind. Electron., vol. 49, no. 4, pp , Aug. 00. []. J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, Multilevel voltagesourceconverter topologies for industrial medium voltage drives, IEEE Trans. Ind. Electron., vol. 54, no. 6, pp , Dec [3]. E. Babaei and S. H. Hosseini, Charge balance control methods for asymmetrical cascade multilevel converters, in Proc. ICEMS, Seoul, Korea, 007, pp [4]. M. Farhadi Kangarlu and E. Babaei, A generalized cascaded multilevel inverter using series connection of submultilevel inverters, IEEE Trans. Power Electron., vol. 8, no., pp , Feb [5]. S. R. Pulikanti, G. Konstantinou, and. G. Agelidis, Hybrid sevenlevel cascaded active neutralpointclampedbased multilevel converter under SHEPWM, IEEE Trans. Ind. Electron., vol. 60, no. 11, pp , Nov [6]. D. Sun, B. Ge, H. AbuRub, Peng F.Z., De Almeida A.T., "Power flow control for quasiz source inverter with battery based P power generation system," in 011 IEEE Energy Conversion Congress and Exposition (ECCE), 17 Sept. 011, pp [7]. J. Anderson and F. Z. Peng, A class of quasizsource inverters, in Conf. Rec. IEEE IAS Annu. Meeting, Edmonton, Alta, Canada, Oct.008, pp.17. [8]. E. Babaei and S. H. Hosseini, New cascaded multilevel inverter topology with minimum number of switches, Energy Convers. Manage., vol. 50, no. 11, pp , Nov [9] M.K. Nguyen, Y.C. Lim, and G.B. Cho, Switchedinductor quasizsource inverter, IEEE Trans. Power Electron., vol. 6, no. 11, pp , Nov [9]. M. Adamowicz and R. Strzelecki, "Boostbuck inverters with cascaded qztype impedance networks, "Electrical Review, ISSN , vol. 86n., pp , 010. [10]. Miao Zhu, Kun Yu, and Fang Lin Luo, Switchedinductor ZSource Inverter, IEEE Trans. Power Electron., vol. 5, no. 8, pp , Aug [11]. M. Zhu, K. Yu, and F. L. Luo, "Switchedinductor Zsource inverter," IEEE Transactions on Power Electronics, vol.5, no.8, pp , Aug [1]. G. Carrara, S. Gardella, M. Marchesoni, R. Salutari, and G. Sciutto, A new multilevel PWM method: A theoretical analysis, IEEE Trans. Power Electron., vol. 7, pp , Jul [13]. F. Z. Peng, M. Shen, and Z. Qian, Maximum boost control of the Zsource inverter, IEEE Trans. on Power Electron., vol. 0, no. 4, pp , Jul./Aug [14]. M.S. Shen, J. Wang, A. Joseph, F.Z. Peng, L.M. Tolbert, D.J. Adams, Constant Boost Control of the ZSource Inverter to Minimize Current Ripple and oltage Stress, IEEE Trans. on Ind. Appl., vol. 4, no. 3, pp , May/June Page 3

7 ISSN: olume 03 Issue 08 August 016 PP. 733 AUTHOR PROFILE G. Prem Sunder received the B.E. degree in Electrical and Electronics Engineering from Madras University in 00, and the M.Tech. in Electrical Drives and control from Pondicherry University in 006. He is currently pursuing his Ph.D. in power electronics at Annamalai University. He is having 10 years of experience and presently working as Associate Professor in the Department of Electrical and Electronics Engineering at Mailam Engineering College, Mailam. His current research interests include Multilevel Inverter, DCDC Converter and ZSource and QuasiZsource converters. He is a life member of Indian Society for Technical Education. Dr.B.Shanthi was born in 1970 in Chidambaram. She has obtained B.E (Electronics and Instrumentation) and M.Tech (Instrument Technology) from Annamalai University and Indian Institute of Science, Bangalore in 1991 and 1998 respectively. She obtained her Ph.D. in Power Electronics from Annamalai University in 009. She is presently a Professor in Central Instrumentation Service Laboratory of Annamalai University where she has put in a total service of 4 years since 199. Her research papers (65) have been presented in various international /national seminars/conferences. She has 47 publications in national journals and 61 in international journals. Her areas of interest are: modeling, simulation and intelligent control for MLI and Zsource inverters. Dr. Alamelu Nachiappan received the B.E. (Electrical and Instrumentation) degree in the year 1984 and M.E. degree in the 1988 from the Annamalai University and then obtained her Ph.D. from the Pondicherry University in the year 007. She is having 8 years of experience. She is presently a Professor and Head in the Department of Electrical and Electronics Engineering at Pondicherry Engineering College, Pondicherry. She has published and/or presented more than 81 papers in International / National journals and conferences. Her research interests include digital signal processing techniques and power control. She is a Fellow of Institution of Engineers (India). Dr.S.P.Natarajan was born in 1955 in Chidambaram. He has obtained B.E (Electrical and Electronics) and M.E (Power systems) degrees in 1978 and 1984 respectively from Annamalai University securing distinction and then Ph.D. in Power Electronics from Anna University, Chennai in 003. He is currently Professor and Head of Instrumentation Engineering Department at Annamalai University (Retd) where he has put in 31 years of service. He produced nine Ph.D.s and presently guiding nine Ph.D. Scholars and so far guided eighty M.E students. His research papers 105 have been presented in various/ieee international/national conferences in Mexico, irginia, Hong Kong, Malaysia, India, Singapore and Korea. He has 15 publications in national journals and 14 in international journals. His research interests are in modeling and control of DCDC converters and multiple connected power electronic converters, control of permanent magnet brushless DC motor, embedded control for multilevel inverters and matrix converters etc. He is a life member of Instrument Society of India and Indian Society for Technical Education. Page 33