INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATION ENGINEERING & TECHNOLOGY (IJECET)

Size: px
Start display at page:

Download "INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATION ENGINEERING & TECHNOLOGY (IJECET)"

Transcription

1 INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATION ENGINEERING & TECHNOLOGY (IJECET) International Journal of Electronics and Communication Engineering & Technology (IJECET), ISSN 0976 ISSN (Print) ISSN (Online) Volume 5, Issue 7, July (2014), pp IAEME: Journal Impact Factor (2014): (Calculated by GISI) IJECET I A E M E DESIGN OF A TWO STAGE DIFFERENTIAL LOW NOISE AMPLIFIER FOR UWB APPLICATIONS Neeraj Malviya, R.S Gamad Department of Electronics and Instrumentation Engineering, SGSITS Indore, (M.P), India ABSTRACT This paper reports a design of a two stage differential LNA for Ultra-wideband (UWB) applications. Design is consisted with a simple two stage with noise improvement technique. The first stage is utilizing a resistive current through reuse and dual inductive degenerated technique to attend a wideband input matching. Second stage is used as a common source amplifier with inductive peaking technique to generate a response of flat power gain. Best simulation result are obtained that is maximum power gain is dbs, noise figure of 2.8 to 4.5 dbs, High reverse isolation of -45 db is obtain with good linearity that is IIP 3 = -3.76dbm. Keywords: Ultra Wide Band, Low Noise Amplifier, Noise Figure, Linearity, Reverse Isolation, Inductive Degeneration. INTRODUCTION Now a days ultra wide frequency band is being mostly used in commercial application and becoming great area of interest for wireless communication engineers. The need for low power and high-throughput wireless communication systems has grown exponentially in the last few years. UWB technology has attracted immense interest from the research and industry communities because of its high data rate, robustness against multipath fading and low power dissipation. This technology provides high-bandwidth wireless link for the transmission of audio, video and high speed data. Frequency bands from 0 to 960 MHz (subgigahertz band) and from 3.1 to 10.6 GHz are allocated by FCC for UWB communication respectively, for medium range less than 100 m low throughput and short range less than 10m high-through- put (1GBPS) data. By definition, an UWB radio signal is expected to have a fractional bandwidth greater than 20% or a bandwidth of at least 500MHz [1-3]. This ultra-wide channel bandwidth B allows high channel capacity C, enabling data transfer at a very high rate, while, keeping the transmitted signal-to-noise ratio (SNR) to a minimum. 63

2 Since it is a first block of receiver so it should be able to catch sufficient amount of signal and also able to amplify largely over desire or constant bandwidth and deliver sufficient amount to load with addition of as minimum noise as possible. The ability to catch and deliver sufficient amount of signal is totally depend on input and output load matching that is S 11 and S 22, addition of noise is inherent property of devices, so it can be reduced only. The design of LNA is quiet difficult and creates a large problem. In recent years much research have been done on designing of LNA such as distributed amplifier, filter matching network amplifier, and current reuse amplifier. From all the topology they have their own advantages and disadvantages for example the distributed amplifier provide large gain over high bandwidth but has large power consumption similarly in folded cascode topology it require high area high power consumption but give low noise figure [4-5]. The cascode topology of LNA design will able to provide large gain as well good noise figure and having good resistance against third order non linearity. In the same topology if current is feedback through resistor then it becomes resistive feedback topology and it will able to provide good gain and good linearity when the same topology, we use differentially, we get minimum noise figure at moderate gain and moderate linearity [7-8]. Now it is clear that the design of RF-CMOSLNAs, the key performance parameters are power-gain, noise figure (NF) and linearity besides the stability and isolation. The goal of LNA design is to achieve maximum power-gain and minimum NF simultaneously at any given amount of power dissipation with good linearity. Proposed Design: Since we are using cascode topology which involves common gate followed by common source to design UWB LNA as it is able to provide high gain with good linearity and better noise figure. Along with this topology authors have used a feedback resistor to get even better gain, noise figure and input reflection coefficient. As shown in fig2. To avoid degradation in input impedance and the -3db bandwidth at high frequency to overcome this problem, source degeneration that is inductors are used to tune out parasitic capacitances at partial sides. Figure 1: simple current reuse topology 64

3 Figure 2: Simple current reuse topology with resistor feedback There are several techniques to increase third order input intercept point in order to get high linearity such as MGTR Technique which involves two transistor connected back to back in parallel. From these transistor one is operated in weak inversion region while the other is operated in strong inversion region so that, they produce negative and positive third order frequency terms, and they can be cancel out easily and improvement will obtained in linearity[9]. Another technique, which involves Q-factor at the input side, to increase and get better linearity in the same way with adjustment of overdrive voltage (v gs -v th ) of input MOS [10].Such a way the another technique is very simple which involves transconductance of transistor directly, in this if increases the transconductance then in proportionate gain will increase but linearity got degraded. if decrease the gain, third order input intercept point will improved and due to this overall linearity will improved [11]. The overall gain of single ended LNAis given as: A v = (g mn + g mp )(r f // r dsn //r dsp //z in2 ). (1) Clearly the overall gain depend on sum of transconductance of two transistor and is directly proportional to it. The overall transconductance can be determine as: G m,tot = {g mn /(1+jωlg mn )} + {g mp /(1+jωlg mp )} (2) noise figure of single ended LNA is given by [12] : NF = 1+(2/3)(The noise 1/(g mn + g mp ) r s )((r f 2 +r s 2 )/r s r f 2 ) + 2/3(g mn + g mp )r s (f/f t ) 2 + r s /r f (3) 65

4 If increase the transconductance the overall gain will increases and due to this noise figure decrease. the value of transconduction is depend on W/L ratio [13-15] and its mathematical expression is as follows: G m = U n C ox (W/l)(v gs - v th ) (4) As per the requirement authors have decrease the width of transistor to improve the linearity of LNA. And for maintaining noise figure authors have connected differentially. To overcome the problem of noise we use Differential circuits and these are an important part of integrated circuit design because they offer several important advantages over single-ended circuits. The significant and relevant benefit of using a differential circuit is noise reduction. Differential LNA can restrain common mode interference, so the noise of source voltage and underlay voltage can also be restrained. The schematic view of the proposed design is given in figure 3. Figure 3: Proposed design of LNA Simulation Results The proposed design is simulated over Cadence spectra, 0.18µm CMOS technology with 1.8V supply voltage. The simulated results are obtained and compared with earlier work, as shown in table 1. As per reported results it is found that the proposed circuit has reliable Voltage gain (maximum S 2,1 ) of 20.37dbs, Reverse Isolation is less than -43dbs, better Linearity shown in IIP 3 is dbm with input and output matching is -20dbs and -1.75dbs respectively. After applying differential technique, the improved Noise figure is obtained in the range of (3.12 to 4.12db) and their graphs are given in figure 4,5,6,7,8 and 9 respectively. 66

5 Figure 4: Voltage gain (S 21 ) Figure 5: Reverse Voltage gain (S 12 ) 67

6 Figure 6: Third order input intercept point (IIP 3 ) Figure 7: Input reflection coefficient (s 11 ) 68

7 Figure 8: Output reflection coefficient (S 22 ) Figure 9: Noise figure (NF) 69

8 Table 1: Comparison of the proposed results with earlier similar reported work Specification [12] [8] [11] This work Technology(µm) Frequency(GHz) 3.1 to to to to 10 Input return loss(s 11 ) < <-11db Voltage gain(s 21 ) Reverse isolation(s 12 ) <-45 <-23 <-38 <-43 Output return loss(s 22 ) < <-8db -3.5 Supply voltage Noise figure to to 3.9db 2.5 to IIP dbm 6 and 6.1GHz Power dissipation(mw) CONCLUSION This design employs current reuse technique with resistor feedback and source degeneration, the input is given differentially and similarly the output is taken, in order to obtained high gain, high linearity and minimum noise figure. The proposed design of Low Noise Amplifier is successfully extended to UWB application as per the result obtained, as shown in table 1. It is observed that this design is well suited for UWB application. ACKNOWLEDGEMENT This work has been carried out in SMDP VLSI laboratory of the Electronics and Instrumentation Engineering Department of, Shri G.S. Institute of Technology and Science, Indore, India. This SMDP VLSI project is funded by Ministry of Information and Communication Technology, Government of India. Authors are thankful to the Ministry for facilities provided under this project. REFERENCES [1] Muhammad Khurram and S.M. Rezaul Hasan, Novel analysis and optimization of gmboosted common-gate UWB LNA, Microelectronics Journal, vol. 42pp , November [2] C.P. Chang and W.-C. Chien et al., Linearity Improvement of Cascode CMOS LNA using a diode connected NMOS transistor with a parallel RC circuit, Progress in Electromagnetics Research C, Vol. 17, pp 29-38, [3] H.L. Kao, K.C. Chang et al., Very low-power CMOS LNA for UWB wireless receiver using current reuse topology. Solid-state electronics journal vol. 52, September [4] Jigisha Sureja and Jagdishoza, A 0.1 to 3GHz low power cascade LNA using 180nm technology. First conference on emerging technology trends in electronic, communication and technology [5] Yuh-Shyan Hwang, San-FuWang, Shou-ChungYan and Jiann-JongChen, An inductorless wideband noise-cancelling CMOS low noise amplifier with variable-gain technique for DTV tuner application. 70

9 [6] Abdelhalim Slimane, M. Trabelsi and M.T. Belaroussi et al., A 0.9-V, 7-mW UWB LNA for GHz wireless applications in 0.18-µm CMOS technology, Microelectronics Journal vol. 42 august [7] S. Toofan, A.R. Rahmati A. Abrishamifar, G. Roientan Lahiji et al., Low power and high gain current reuse LNA with modified input matching and inter-stage inductors Microelectronics Journal vol. 39, pp , September [8] Vikas Kumar and R.S Gamad, Design of broadband LNA using ffp. technique, vol. 2, pp.12-17, May [9] Fadi Riad Shahroury, Chung-Yu Wu et al. A 1-V RF-CMOS LNA design utilizing the technique of capacitive feedback matching network, INTEGRATION, the VLSI journal vol. 42, pp.83-88, September [10] Somesh Kumar and Kuldeepak, A 0.18µm and 2GHz CMOS Differential Low Noise Amplifier, International Journal of Electronics Communication and Computer Technology (IJECCT) Volume 2 Issue 4, July [11] A.I.I Galal, R. Pokharel, H. Kanaya, K. Yoshida, et al., High linearity technique for ultrawideband low noise amplifier in 0.18µm cmos technology, int. j. electron. Communication (AEU) vol. 66, pp May [12] quizhen wan, chunhua wang, Design of GHz ultra-wideband CMOS low noise amplifier with current reuse technique Int. j. electron. commun. (AEU) journal, vol. 65, pp , September [13] B. Razavi, RF Microelectronic, Englewood Cliffs, NJ: Prientce-Hall, [14] RF Circuit Design, theory and application, reinhold Ludwig and pavel bretchko. [15] CMOS Analog Circuit design, Second edition, by phillip E.Allen and Douglas m. Houlberg. AUTHOR S DETAIL Neeraj Malviya was born in He receives B.Eng. degree in electronics and communication engineering from Acropolis institute of technology and research, Indore, Madhya Pradesh, India in Currently he is pursuing M.Tech. degree from S.G.S.I.T.S Indore, Madhya Pradesh, India. His current research interest are low power and low noise LNAs. R.S Gamad receives his B.E. degree in Electronics and Communication Engineering from Government Engineering college, Ujjain, Madhya Pradesh, India in 1995 and M.E. in Digital Techniques and Instruments from S.G.S.I.T.S, Indore, Madhya Pradesh, India in 2003 and Ph.D. dynamic testing of an A/D converter in 2010 from RGPV Bhopal, Technical university of Madhya Pradesh, India. He worked as Assistant professor in Govt. engineering college, Ujjain, Madhya Pradesh from He is currently working as Associate professor in department of Electronics and Instrumentation Engineering, S.G.S.I.T.S, Indore, Madhya Pradesh, India. His field of specialisation is data converter, ADC design- testing, image processing and mixed signal VLSI design. He is actively participates in SMDP project in VLSI, a project funded by Ministry of Information and Communication Technology, Govt. of India. He has teaching experience of over 16 years at under graduate level and 9 year at post graduate level. He is associated with many professional societies. He is life member of Institution of Engineers (IE) and IETE. 71

CHAPTER 4 ULTRA WIDE BAND LOW NOISE AMPLIFIER DESIGN

CHAPTER 4 ULTRA WIDE BAND LOW NOISE AMPLIFIER DESIGN 93 CHAPTER 4 ULTRA WIDE BAND LOW NOISE AMPLIFIER DESIGN 4.1 INTRODUCTION Ultra Wide Band (UWB) system is capable of transmitting data over a wide spectrum of frequency bands with low power and high data

More information

A High Gain and Improved Linearity 5.7GHz CMOS LNA with Inductive Source Degeneration Topology

A High Gain and Improved Linearity 5.7GHz CMOS LNA with Inductive Source Degeneration Topology A High Gain and Improved Linearity 5.7GHz CMOS LNA with Inductive Source Degeneration Topology Ch. Anandini 1, Ram Kumar 2, F. A. Talukdar 3 1,2,3 Department of Electronics & Communication Engineering,

More information

International Journal of Pure and Applied Mathematics

International Journal of Pure and Applied Mathematics Volume 118 No. 0 018, 4187-4194 ISSN: 1314-3395 (on-line version) url: http://www.ijpam.eu ijpam.eu A 5- GHz CMOS Low Noise Amplifier with High gain and Low power using Pre-distortion technique A.Vidhya

More information

A Low Power Single Ended Inductorless Wideband CMOS LNA with G m Enhancement and Noise Cancellation

A Low Power Single Ended Inductorless Wideband CMOS LNA with G m Enhancement and Noise Cancellation 2017 International Conference on Electronic, Control, Automation and Mechanical Engineering (ECAME 2017) ISBN: 978-1-60595-523-0 A Low Power Single Ended Inductorless Wideband CMOS LNA with G m Enhancement

More information

A low noise amplifier with improved linearity and high gain

A low noise amplifier with improved linearity and high gain International Journal of Electronics and Computer Science Engineering 1188 Available Online at www.ijecse.org ISSN- 2277-1956 A low noise amplifier with improved linearity and high gain Ram Kumar, Jitendra

More information

A 3-6 Ghz Current Reuse Noise Cancelling Low Noise Amplifier For WLAN And WPAN Application

A 3-6 Ghz Current Reuse Noise Cancelling Low Noise Amplifier For WLAN And WPAN Application RESEARCH ARTICLE OPEN ACCESS A 3-6 Ghz Current Reuse Noise Cancelling Low Noise Amplifier For WLAN And WPAN Application Shivabhakt Mhalasakant Hanamant [1], Dr.S.D.Shirbahadurakar [2] M.E Student [1],

More information

Performance Analysis of a Low Power Low Noise 4 13 GHz Ultra Wideband LNA

Performance Analysis of a Low Power Low Noise 4 13 GHz Ultra Wideband LNA Performance Analysis of a Low Power Low Noise 4 13 GHz Ultra Wideband LNA J.Manjula #1, Dr.S.Malarvizhi #2 # ECE Department, SRM University, Kattangulathur, Tamil Nadu, India-603203 1 jmanjulathiyagu@gmail.com

More information

Int. J. Electron. Commun. (AEÜ)

Int. J. Electron. Commun. (AEÜ) Int. J. Electron. Commun. (AEÜ) 64 (200) 009 04 Contents lists available at ScienceDirect Int. J. Electron. Commun. (AEÜ) journal homepage: www.elsevier.de/aeue An inductorless wideband noise-cancelling

More information

LINEARITY IMPROVEMENT OF CASCODE CMOS LNA USING A DIODE CONNECTED NMOS TRANSISTOR WITH A PARALLEL RC CIRCUIT

LINEARITY IMPROVEMENT OF CASCODE CMOS LNA USING A DIODE CONNECTED NMOS TRANSISTOR WITH A PARALLEL RC CIRCUIT Progress In Electromagnetics Research C, Vol. 17, 29 38, 2010 LINEARITY IMPROVEMENT OF CASCODE CMOS LNA USING A DIODE CONNECTED NMOS TRANSISTOR WITH A PARALLEL RC CIRCUIT C.-P. Chang, W.-C. Chien, C.-C.

More information

CHAPTER 3 CMOS LOW NOISE AMPLIFIERS

CHAPTER 3 CMOS LOW NOISE AMPLIFIERS 46 CHAPTER 3 CMOS LOW NOISE AMPLIFIERS 3.1 INTRODUCTION The Low Noise Amplifier (LNA) plays an important role in the receiver design. LNA serves as the first block in the RF receiver. It is a critical

More information

HIGH-GAIN CMOS LOW NOISE AMPLIFIER FOR ULTRA WIDE-BAND WIRELESS RECEIVER

HIGH-GAIN CMOS LOW NOISE AMPLIFIER FOR ULTRA WIDE-BAND WIRELESS RECEIVER Progress In Electromagnetics Research C, Vol. 7, 183 191, 2009 HIGH-GAIN CMOS LOW NOISE AMPLIFIER FOR ULTRA WIDE-BAND WIRELESS RECEIVER A. Dorafshan and M. Soleimani Electrical Engineering Department Iran

More information

DESIGN OF LOW POWER CMOS LOW NOISE AMPLIFIER USING CURRENT REUSE METHOD-A REVIEW

DESIGN OF LOW POWER CMOS LOW NOISE AMPLIFIER USING CURRENT REUSE METHOD-A REVIEW DESIGN OF LOW POWER CMOS LOW NOISE AMPLIFIER USING CURRENT REUSE METHOD-A REVIEW Hardik Sathwara 1, Kehul Shah 2 1 PG Scholar, 2 Associate Professor, Department of E&C, SPCE, Visnagar, Gujarat, (India)

More information

Design technique of broadband CMOS LNA for DC 11 GHz SDR

Design technique of broadband CMOS LNA for DC 11 GHz SDR Design technique of broadband CMOS LNA for DC 11 GHz SDR Anh Tuan Phan a) and Ronan Farrell Institute of Microelectronics and Wireless Systems, National University of Ireland Maynooth, Maynooth,Co. Kildare,

More information

Int. J. Electron. Commun. (AEU)

Int. J. Electron. Commun. (AEU) Int. J. Electron. Commun. (AEÜ) 64 (2010) 978 -- 982 Contents lists available at ScienceDirect Int. J. Electron. Commun. (AEU) journal homepage: www.elsevier.de/aeue LETTER Linearization technique using

More information

A CMOS GHz UWB LNA Employing Modified Derivative Superposition Method

A CMOS GHz UWB LNA Employing Modified Derivative Superposition Method Circuits and Systems, 03, 4, 33-37 http://dx.doi.org/0.436/cs.03.43044 Published Online July 03 (http://www.scirp.org/journal/cs) A 3. - 0.6 GHz UWB LNA Employing Modified Derivative Superposition Method

More information

THE INTERNATIONAL JOURNAL OF SCIENCE & TECHNOLEDGE

THE INTERNATIONAL JOURNAL OF SCIENCE & TECHNOLEDGE THE INTERNATIONAL JOURNAL OF SCIENCE & TECHNOLEDGE Topology Comparison and Design of Low Noise Amplifier for Enhanced Gain Arul Thilagavathi M. PG Student, Department of ECE, Dr. Sivanthi Aditanar College

More information

A 2.4-Ghz Differential Low-noise Amplifiers using 0.18um CMOS Technology

A 2.4-Ghz Differential Low-noise Amplifiers using 0.18um CMOS Technology International Journal of Electronic and Electrical Engineering. ISSN 0974-2174, Volume 7, Number 3 (2014), pp. 207-212 International Research Publication House http://www.irphouse.com A 2.4-Ghz Differential

More information

A 2 GHz 20 dbm IIP3 Low-Power CMOS LNA with Modified DS Linearization Technique

A 2 GHz 20 dbm IIP3 Low-Power CMOS LNA with Modified DS Linearization Technique JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.16, NO.4, AUGUST, 2016 ISSN(Print) 1598-1657 http://dx.doi.org/10.5573/jsts.2016.16.4.443 ISSN(Online) 2233-4866 A 2 GHz 20 dbm IIP3 Low-Power CMOS

More information

1-13GHz Wideband LNA utilizing a Transformer as a Compact Inter-stage Network in 65nm CMOS

1-13GHz Wideband LNA utilizing a Transformer as a Compact Inter-stage Network in 65nm CMOS -3GHz Wideband LNA utilizing a Transformer as a Compact Inter-stage Network in 65nm CMOS Hyohyun Nam and Jung-Dong Park a Division of Electronics and Electrical Engineering, Dongguk University, Seoul E-mail

More information

Design of a Low Power 5GHz CMOS Radio Frequency Low Noise Amplifier Rakshith Venkatesh

Design of a Low Power 5GHz CMOS Radio Frequency Low Noise Amplifier Rakshith Venkatesh Design of a Low Power 5GHz CMOS Radio Frequency Low Noise Amplifier Rakshith Venkatesh Abstract A 5GHz low power consumption LNA has been designed here for the receiver front end using 90nm CMOS technology.

More information

Highly linear common-gate mixer employing intrinsic second and third order distortion cancellation

Highly linear common-gate mixer employing intrinsic second and third order distortion cancellation Highly linear common-gate mixer employing intrinsic second and third order distortion cancellation Mahdi Parvizi a), and Abdolreza Nabavi b) Microelectronics Laboratory, Tarbiat Modares University, Tehran

More information

A GHz High Gain LNA for Broadband Applications.

A GHz High Gain LNA for Broadband Applications. IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) Volume 5, Issue 6, Ver. II (Nov -Dec. 2015), PP 74-80 e-issn: 2319 4200, p-issn No. : 2319 4197 www.iosrjournals.org A 2.4-6.0 GHz High Gain LNA for

More information

A Review of CMOS Low Noise Amplifier for UWB System

A Review of CMOS Low Noise Amplifier for UWB System A Review of CMOS Low Noise Amplifier for UWB System R. Sapawi, D.S.A.A. Yusuf, D.H.A. Mohamad, S. Suhaili, N. Junaidi Department of Electrical and Electronic Engineering Faculty of Engineering, Universiti

More information

High Gain CMOS UWB LNA Employing Thermal Noise Cancellation

High Gain CMOS UWB LNA Employing Thermal Noise Cancellation ICUWB 2009 (September 9-11, 2009) High Gain CMOS UWB LNA Employing Thermal Noise Cancellation Mehdi Forouzanfar and Sasan Naseh Electrical Engineering Group, Engineering Department, Ferdowsi University

More information

Low-Power RF Integrated Circuit Design Techniques for Short-Range Wireless Connectivity

Low-Power RF Integrated Circuit Design Techniques for Short-Range Wireless Connectivity Low-Power RF Integrated Circuit Design Techniques for Short-Range Wireless Connectivity Marvin Onabajo Assistant Professor Analog and Mixed-Signal Integrated Circuits (AMSIC) Research Laboratory Dept.

More information

Layout Design of LC VCO with Current Mirror Using 0.18 µm Technology

Layout Design of LC VCO with Current Mirror Using 0.18 µm Technology Wireless Engineering and Technology, 2011, 2, 102106 doi:10.4236/wet.2011.22014 Published Online April 2011 (http://www.scirp.org/journal/wet) 99 Layout Design of LC VCO with Current Mirror Using 0.18

More information

Design of a Low Noise Amplifier using 0.18µm CMOS technology

Design of a Low Noise Amplifier using 0.18µm CMOS technology The International Journal Of Engineering And Science (IJES) Volume 4 Issue 6 Pages PP.11-16 June - 2015 ISSN (e): 2319 1813 ISSN (p): 2319 1805 Design of a Low Noise Amplifier using 0.18µm CMOS technology

More information

DESIGN OF 3 TO 5 GHz CMOS LOW NOISE AMPLIFIER FOR ULTRA-WIDEBAND (UWB) SYSTEM

DESIGN OF 3 TO 5 GHz CMOS LOW NOISE AMPLIFIER FOR ULTRA-WIDEBAND (UWB) SYSTEM Progress In Electromagnetics Research C, Vol. 9, 25 34, 2009 DESIGN OF 3 TO 5 GHz CMOS LOW NOISE AMPLIFIER FOR ULTRA-WIDEBAND (UWB) SYSTEM S.-K. Wong and F. Kung Faculty of Engineering Multimedia University

More information

A 2-12 GHz Low Noise Amplifier Design for Ultra Wide Band Applications

A 2-12 GHz Low Noise Amplifier Design for Ultra Wide Band Applications American Journal of Applied Sciences 9 (8): 1158-1165, 01 ISSN 1546-939 01 Science Publications A -1 GHz Low Noise Amplifier Design for Ultra Wide Band Applications 1 V. Vaithianathan, J. Raja and 3 R.

More information

Designing a 960 MHz CMOS LNA and Mixer using ADS. EE 5390 RFIC Design Michelle Montoya Alfredo Perez. April 15, 2004

Designing a 960 MHz CMOS LNA and Mixer using ADS. EE 5390 RFIC Design Michelle Montoya Alfredo Perez. April 15, 2004 Designing a 960 MHz CMOS LNA and Mixer using ADS EE 5390 RFIC Design Michelle Montoya Alfredo Perez April 15, 2004 The University of Texas at El Paso Dr Tim S. Yao ABSTRACT Two circuits satisfying the

More information

CMOS LNA Design for Ultra Wide Band - Review

CMOS LNA Design for Ultra Wide Band - Review International Journal of Innovation and Scientific Research ISSN 235-804 Vol. No. 2 Nov. 204, pp. 356-362 204 Innovative Space of Scientific Research Journals http://www.ijisr.issr-journals.org/ CMOS LNA

More information

DESIGN ANALYSIS AND COMPARATIVE STUDY OF RF RECEIVER FRONT-ENDS IN 0.18-µM CMOS

DESIGN ANALYSIS AND COMPARATIVE STUDY OF RF RECEIVER FRONT-ENDS IN 0.18-µM CMOS International Journal of Electrical and Electronics Engineering Research Vol.1, Issue 1 (2011) 41-56 TJPRC Pvt. Ltd., DESIGN ANALYSIS AND COMPARATIVE STUDY OF RF RECEIVER FRONT-ENDS IN 0.18-µM CMOS M.

More information

Design of Low Power Linear Multi-band CMOS Gm-C Filter

Design of Low Power Linear Multi-band CMOS Gm-C Filter Design of Low Power Linear Multi-band CMOS Gm-C Filter Riyas T M 1, Anusooya S 2 PG Student [VLSI & ES], Department of Electronics and Communication, B.S.AbdurRahman University, Chennai-600048, India 1

More information

Chapter 5. Operational Amplifiers and Source Followers. 5.1 Operational Amplifier

Chapter 5. Operational Amplifiers and Source Followers. 5.1 Operational Amplifier Chapter 5 Operational Amplifiers and Source Followers 5.1 Operational Amplifier In single ended operation the output is measured with respect to a fixed potential, usually ground, whereas in double-ended

More information

Implementation of Current Reuse Structure in LNAUsing 90nm VLSI Technology for ISM Radio Frequency System

Implementation of Current Reuse Structure in LNAUsing 90nm VLSI Technology for ISM Radio Frequency System Implementation of Current Reuse Structure in LNAUsing 90nm VLSI Technology for ISM Radio Frequency System 1 Poonam Yadav, 2 Rajesh Mehra ME Scholar ECE Deptt. NITTTR, Chandigarh, India Associate Professor

More information

A 3 8 GHz Broadband Low Power Mixer

A 3 8 GHz Broadband Low Power Mixer PIERS ONLINE, VOL. 4, NO. 3, 8 361 A 3 8 GHz Broadband Low Power Mixer Chih-Hau Chen and Christina F. Jou Institute of Communication Engineering, National Chiao Tung University, Hsinchu, Taiwan Abstract

More information

SP 22.3: A 12mW Wide Dynamic Range CMOS Front-End for a Portable GPS Receiver

SP 22.3: A 12mW Wide Dynamic Range CMOS Front-End for a Portable GPS Receiver SP 22.3: A 12mW Wide Dynamic Range CMOS Front-End for a Portable GPS Receiver Arvin R. Shahani, Derek K. Shaeffer, Thomas H. Lee Stanford University, Stanford, CA At submicron channel lengths, CMOS is

More information

RF CMOS 0.5 µm Low Noise Amplifier and Mixer Design

RF CMOS 0.5 µm Low Noise Amplifier and Mixer Design RF CMOS 0.5 µm Low Noise Amplifier and Mixer Design By VIKRAM JAYARAM, B.Tech Signal Processing and Communication Group & UMESH UTHAMAN, B.E Nanomil FINAL PROJECT Presented to Dr.Tim S Yao of Department

More information

Noise Analysis for low-voltage low-power CMOS RF low noise amplifier. Mai M. Goda, Mohammed K. Salama, Ahmed M. Soliman

Noise Analysis for low-voltage low-power CMOS RF low noise amplifier. Mai M. Goda, Mohammed K. Salama, Ahmed M. Soliman International Journal of Scientific & Engineering Research, Volume 6, Issue 3, March-205 ISSN 2229-558 536 Noise Analysis for low-voltage low-power CMOS RF low noise amplifier Mai M. Goda, Mohammed K.

More information

High-Linearity CMOS. RF Front-End Circuits

High-Linearity CMOS. RF Front-End Circuits High-Linearity CMOS RF Front-End Circuits Yongwang Ding Ramesh Harjani iigh-linearity CMOS tf Front-End Circuits - Springer Library of Congress Cataloging-in-Publication Data A C.I.P. Catalogue record

More information

ANALYSIS AND DESIGN OF HIGH CMRR INSTRUMENTATION AMPLIFIER FOR ECG SIGNAL ACQUISITION SYSTEM USING 180nm CMOS TECHNOLOGY

ANALYSIS AND DESIGN OF HIGH CMRR INSTRUMENTATION AMPLIFIER FOR ECG SIGNAL ACQUISITION SYSTEM USING 180nm CMOS TECHNOLOGY International Journal of Electronics and Communication Engineering (IJECE) ISSN 2278-9901 Vol. 2, Issue 4, Sep 2013, 67-74 IASET ANALYSIS AND DESIGN OF HIGH CMRR INSTRUMENTATION AMPLIFIER FOR ECG SIGNAL

More information

Research Article CMOS Ultra-Wideband Low Noise Amplifier Design

Research Article CMOS Ultra-Wideband Low Noise Amplifier Design Microwave Science and Technology Volume 23 Article ID 32846 6 pages http://dx.doi.org/.55/23/32846 Research Article CMOS Ultra-Wideband Low Noise Amplifier Design K. Yousef H. Jia 2 R. Pokharel 3 A. Allam

More information

Design of a Magnetically Tunable Low Noise Amplifier in 0.13 um CMOS Technology

Design of a Magnetically Tunable Low Noise Amplifier in 0.13 um CMOS Technology Graduate Theses and Dissertations Iowa State University Capstones, Theses and Dissertations 2012 Design of a Magnetically Tunable Low Noise Amplifier in 0.13 um CMOS Technology Jeremy Brown Iowa State

More information

Performance Analysis of Narrowband and Wideband LNA s for Bluetooth and IR-UWB

Performance Analysis of Narrowband and Wideband LNA s for Bluetooth and IR-UWB IJSRD International Journal for Scientific Research & Development Vol., Issue 03, 014 ISSN (online): 310613 Performance Analysis of Narrowband and Wideband s for Bluetooth and IRUWB Abhishek Kumar Singh

More information

A 130-NM CMOS 400 MHZ 8-BIT LOW POWER BINARY WEIGHTED CURRENT STEERING DAC

A 130-NM CMOS 400 MHZ 8-BIT LOW POWER BINARY WEIGHTED CURRENT STEERING DAC A 130-NM CMOS 400 MHZ 8-BIT LOW POWER BINARY WEIGHTED CURRENT STEERING DAC Ashok Kumar Adepu and Kiran Kumar Kolupuri Department of Electronics and communication Engineering,MVGR College of Engineering,

More information

Simulation and Design Analysis of Integrated Receiver System for Millimeter Wave Applications

Simulation and Design Analysis of Integrated Receiver System for Millimeter Wave Applications Simulation and Design Analysis of Integrated Receiver System for Millimeter Wave Applications Rekha 1, Rajesh Kumar 2, Dr. Raj Kumar 3 M.R.K.I.E.T., REWARI ABSTRACT This paper presents the simulation and

More information

CMOS Dual Band Receiver GSM 900-Mhz / DSS-GSM1800-GHz

CMOS Dual Band Receiver GSM 900-Mhz / DSS-GSM1800-GHz CMOS Dual Band Receiver GSM 900-Mhz / DSS-GSM1800-GHz By : Dhruvang Darji 46610334 Transistor integrated Circuit A Dual-Band Receiver implemented with a weaver architecture with two frequency stages operating

More information

CMOS Design of Wideband Inductor-Less LNA

CMOS Design of Wideband Inductor-Less LNA IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) Volume 8, Issue 3, Ver. I (May.-June. 2018), PP 25-30 e-issn: 2319 4200, p-issn No. : 2319 4197 www.iosrjournals.org CMOS Design of Wideband Inductor-Less

More information

High Gain Low Noise Amplifier Design Using Active Feedback

High Gain Low Noise Amplifier Design Using Active Feedback Chapter 6 High Gain Low Noise Amplifier Design Using Active Feedback In the previous two chapters, we have used passive feedback such as capacitor and inductor as feedback. This chapter deals with the

More information

DESIGN OF CMOS BASED FM MODULATOR USING 90NM TECHNOLOGY ON CADENCE VIRTUOSO TOOL

DESIGN OF CMOS BASED FM MODULATOR USING 90NM TECHNOLOGY ON CADENCE VIRTUOSO TOOL DESIGN OF CMOS BASED FM MODULATOR USING 90NM TECHNOLOGY ON CADENCE VIRTUOSO TOOL 1 Parmjeet Singh, 2 Rekha Yadav, 1, 2 Electronics and Communication Engineering Department D.C.R.U.S.T. Murthal, 1, 2 Sonepat,

More information

Design of a Broadband HEMT Mixer for UWB Applications

Design of a Broadband HEMT Mixer for UWB Applications Indian Journal of Science and Technology, Vol 9(26), DOI: 10.17485/ijst/2016/v9i26/97253, July 2016 ISSN (Print) : 0974-6846 ISSN (Online) : 0974-5645 Design of a Broadband HEMT Mixer for UWB Applications

More information

Performance Evaluation of Different Types of CMOS Operational Transconductance Amplifier

Performance Evaluation of Different Types of CMOS Operational Transconductance Amplifier Performance Evaluation of Different Types of CMOS Operational Transconductance Amplifier Kalpesh B. Pandya 1, Kehul A. shah 2 1 Gujarat Technological University, Department of Electronics & Communication,

More information

A 3.5 GHz Low Noise, High Gain Narrow Band Differential Low Noise Amplifier Design for Wi-MAX Applications

A 3.5 GHz Low Noise, High Gain Narrow Band Differential Low Noise Amplifier Design for Wi-MAX Applications International Journal of Electronics Engineering Research. ISSN 0975-6450 Volume 9, Number 4 (2017) pp. 505-516 Research India Publications http://www.ripublication.com A 3.5 GHz Low Noise, High Gain Narrow

More information

CHAPTER 1 INTRODUCTION

CHAPTER 1 INTRODUCTION 1 CHAPTER 1 INTRODUCTION 1.1 INTRODUCTION TO RF FRONT END DESIGN Rapid growth of wireless market emerges various wireless communication systems, which demands a low power, low cost and compact transceivers

More information

IJSRD - International Journal for Scientific Research & Development Vol. 4, Issue 02, 2016 ISSN (online):

IJSRD - International Journal for Scientific Research & Development Vol. 4, Issue 02, 2016 ISSN (online): IJSRD - International Journal for Scientific Research & Development Vol. 4, Issue 02, 2016 ISSN (online): 2321-0613 Design & Analysis of CMOS Telescopic Operational Transconductance Amplifier (OTA) with

More information

ETI , Good luck! Written Exam Integrated Radio Electronics. Lund University Dept. of Electroscience

ETI , Good luck! Written Exam Integrated Radio Electronics. Lund University Dept. of Electroscience und University Dept. of Electroscience EI170 Written Exam Integrated adio Electronics 2010-03-10, 08.00-13.00 he exam consists of 5 problems which can give a maximum of 6 points each. he total maximum

More information

A 3 5 GHz CMOS High Linearity Ultra Wideband Low Noise Amplifier in 0.18µ CMOS

A 3 5 GHz CMOS High Linearity Ultra Wideband Low Noise Amplifier in 0.18µ CMOS Proceedings of the 5th WSEAS Int. Conf. on CIRCUITS, SYSTEMS, ELECTRONICS, CONTROL & SIGNAL PROCESSING, Dallas, USA, November -, 6 5 A 5 GHz CMOS High Linearity Ultra Wideband Low Noise Amplifier in.8µ

More information

ISSN: X Impact factor: 4.295

ISSN: X Impact factor: 4.295 ISSN: 2454-132X Impact factor: 4.295 (Volume2, Issue6) Available online at: www.ijariit.com An Approach for Reduction in Power Consumption in Low Voltage Dropout Regulator Shivani.S. Tantarpale 1 Ms. Archana

More information

Linearity Enhancement of Folded Cascode LNA for Narrow Band Receiver

Linearity Enhancement of Folded Cascode LNA for Narrow Band Receiver Linearity Enhancement of Folded Cascode LNA for Narrow Band Receiver K.Parimala 1, K.Raju 2 P.G. Student, Department of ECE, GPREC (Autonomous), Kurnool, A.P, India 1 Assistant Professor, Department of

More information

Design of CMOS LNA for Radio Receiver using the Cadence Simulation Tool

Design of CMOS LNA for Radio Receiver using the Cadence Simulation Tool MIT International Journal of Electronics and Communication Engineering, Vol. 3, No. 2, August 2013, pp. 63 68 63 Design of CMOS LNA for Radio Receiver using the Cadence Simulation Tool Neha Rani M.Tech.

More information

Microelectronics Journal

Microelectronics Journal Microelectronics Journal 44 (2013) 821-826 Contents lists available at ScienceDirect Microelectronics Journal journal homepage: www.elsevier.com/locate/mejo Design of low power CMOS ultra wide band low

More information

Low-Noise Amplifiers

Low-Noise Amplifiers 007/Oct 4, 31 1 General Considerations Noise Figure Low-Noise Amplifiers Table 6.1 Typical LNA characteristics in heterodyne systems. NF IIP 3 db 10 dbm Gain 15 db Input and Output Impedance 50 Ω Input

More information

Broadband CMOS LNA Design and Performance Evaluation

Broadband CMOS LNA Design and Performance Evaluation International Journal of Computer Sciences and Engineering Open Access Research Paper Vol.-1(1) E-ISSN: 2347-2693 Broadband CMOS LNA Design and Performance Evaluation Mayank B. Thacker *1, Shrikant S.

More information

Design of Rail-to-Rail Op-Amp in 90nm Technology

Design of Rail-to-Rail Op-Amp in 90nm Technology IJSTE - International Journal of Science Technology & Engineering Volume 1 Issue 2 August 2014 ISSN(online) : 2349-784X Design of Rail-to-Rail Op-Amp in 90nm Technology P R Pournima M.Tech Electronics

More information

Design of Single to Differential Amplifier using 180 nm CMOS Process

Design of Single to Differential Amplifier using 180 nm CMOS Process Design of Single to Differential Amplifier using 180 nm CMOS Process Bhoomi Patel 1, Amee Mankad 2 P.G. Student, Department of Electronics and Communication Engineering, Shantilal Shah Engineering College,

More information

The Analysis of Low Phase Nonlinearity GHz CMOS Power Amplifier for UWB System

The Analysis of Low Phase Nonlinearity GHz CMOS Power Amplifier for UWB System The Analysis of Low Phase Nonlinearity 3.1-6 GHz CMOS Power Amplifier for UWB System R. Sapawi 1, D.N.S.D.A. Salleh 1, S.K. Sahari 1, S.M.W.Masra 1, D.A.A. Mat 1, K. Kipli 1, S.A.Z. Murad 1 Department

More information

Design and Implementation of less quiescent current, less dropout LDO Regulator in 90nm Technology Madhukumar A S #1, M.

Design and Implementation of less quiescent current, less dropout LDO Regulator in 90nm Technology Madhukumar A S #1, M. Design and Implementation of less quiescent current, less dropout LDO Regulator in 90nm Technology Madhukumar A S #1, M.Nagabhushan #2 #1 M.Tech student, Dept. of ECE. M.S.R.I.T, Bangalore, INDIA #2 Asst.

More information

Quadrature GPS Receiver Front-End in 0.13μm CMOS: The QLMV cell

Quadrature GPS Receiver Front-End in 0.13μm CMOS: The QLMV cell 1 Quadrature GPS Receiver Front-End in 0.13μm CMOS: The QLMV cell Yee-Huan Ng, Po-Chia Lai, and Jia Ruan Abstract This paper presents a GPS receiver front end design that is based on the single-stage quadrature

More information

A Compact GHz Ultra-Wideband Low-Noise Amplifier in 0.13-m CMOS Po-Yu Chang and Shawn S. H. Hsu, Member, IEEE

A Compact GHz Ultra-Wideband Low-Noise Amplifier in 0.13-m CMOS Po-Yu Chang and Shawn S. H. Hsu, Member, IEEE IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 58, NO. 10, OCTOBER 2010 2575 A Compact 0.1 14-GHz Ultra-Wideband Low-Noise Amplifier in 0.13-m CMOS Po-Yu Chang and Shawn S. H. Hsu, Member,

More information

Design and Performance Analysis of 1.8 GHz Low Noise Amplifier for Wireless Receiver Application

Design and Performance Analysis of 1.8 GHz Low Noise Amplifier for Wireless Receiver Application Indonesian Journal of Electrical Engineering and Computer Science Vol. 6, No. 3, June 2017, pp. 656 ~ 662 DOI: 10.11591/ijeecs.v6.i3.pp656-662 656 Design and Performance Analysis of 1.8 GHz Low Noise Amplifier

More information

FOR digital circuits, CMOS technology scaling yields an

FOR digital circuits, CMOS technology scaling yields an IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, NO. 6, JUNE 2005 1259 A Low-Voltage Folded-Switching Mixer in 0.18-m CMOS Vojkan Vidojkovic, Johan van der Tang, Member, IEEE, Arjan Leeuwenburgh, and Arthur

More information

Performance Comparison of RF CMOS Low Noise Amplifiers in 0.18-µm technology scale

Performance Comparison of RF CMOS Low Noise Amplifiers in 0.18-µm technology scale Performance Comparison of RF CMOS Low Noise Amplifiers in 0.18-µm technology scale M.Sumathi* 1, S.Malarvizhi 2 *1 Research Scholar, Sathyabama University, Chennai -119,Tamilnadu sumagopi206@gmail.com

More information

Co-design Approach of RMSA with CMOS LNA for Millimeter Wave Applications

Co-design Approach of RMSA with CMOS LNA for Millimeter Wave Applications International Journal of Electronic and Electrical Engineering. ISSN 0974-2174, Volume 7, Number 3 (2014), pp. 307-312 International Research Publication House http://www.irphouse.com Co-design Approach

More information

Design of Low Noise Amplifier at 8.72 GHZ

Design of Low Noise Amplifier at 8.72 GHZ MIT International Journal of Electronics and Communication Engineering, Vol. 3, No. 2, August 2013, pp. 69 75 69 Design of Low Noise Amplifier at 8.72 GHZ Dwijendra Parashar M.Tech (Communication Engg.)

More information

High Speed CMOS Comparator Design with 5mV Resolution

High Speed CMOS Comparator Design with 5mV Resolution High Speed CMOS Comparator Design with 5mV Resolution Raghava Garipelly Assistant Professor, Dept. of ECE, Sree Chaitanya College of Engineering, Karimnagar, A.P, INDIA. Abstract: A high speed CMOS comparator

More information

A 2.5V operation Wideband CMOS Active-RC filter for Wireless LAN

A 2.5V operation Wideband CMOS Active-RC filter for Wireless LAN , pp.9-13 http://dx.doi.org/10.14257/astl.2015.98.03 A 2.5V operation Wideband CMOS Active-RC filter for Wireless LAN Mi-young Lee 1 1 Dept. of Electronic Eng., Hannam University, Ojeong -dong, Daedeok-gu,

More information

ULTRA WIDEBAND RECEIVER FRONT-END AHMAD MAHMOUD SHEREEF HASSAN ELHEMEILY AHMED MOHAMMED AHMED SAYED A THESIS

ULTRA WIDEBAND RECEIVER FRONT-END AHMAD MAHMOUD SHEREEF HASSAN ELHEMEILY AHMED MOHAMMED AHMED SAYED A THESIS ULTRA WIDEBAND RECEIVER FRONT-END by AHMAD MAHMOUD SHEREEF HASSAN ELHEMEILY AHMED MOHAMMED AHMED SAYED A THESIS Submitted in partial fulfillment of the requirements for the degree BACHELOR OF SCIENCE Electronics

More information

FD-SOI FOR RF IC DESIGN. SITRI LETI Workshop Mercier Eric 08 september 2016

FD-SOI FOR RF IC DESIGN. SITRI LETI Workshop Mercier Eric 08 september 2016 FD-SOI FOR RF IC DESIGN SITRI LETI Workshop Mercier Eric 08 september 2016 UTBB 28 nm FD-SOI : RF DIRECT BENEFITS (1/2) 3 back-end options available Routing possible on the AluCap level no restriction

More information

Comparative Analysis of Compensation Techniques for improving PSRR of an OPAMP

Comparative Analysis of Compensation Techniques for improving PSRR of an OPAMP Comparative Analysis of Compensation Techniques for improving PSRR of an OPAMP 1 Pathak Jay, 2 Sanjay Kumar M.Tech VLSI and Embedded System Design, Department of School of Electronics, KIIT University,

More information

A 3 TO 5GHZ COMMON SOURCE LOW NOISE AMPLIFIER USING 180NM CMOS TECHNOLOGY FOR WIRELESS SYSTEMS

A 3 TO 5GHZ COMMON SOURCE LOW NOISE AMPLIFIER USING 180NM CMOS TECHNOLOGY FOR WIRELESS SYSTEMS International Journal of Computer Engineering and Applications, Volume V, Issue III, March 14 www.ijcea.com ISSN 2321-3469 A 3 TO 5GHZ COMMON SOURCE LOW NOISE AMPLIFIER USING 180NM CMOS TECHNOLOGY FOR

More information

760 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 6, JUNE A 0.8-dB NF ESD-Protected 9-mW CMOS LNA Operating at 1.23 GHz

760 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 6, JUNE A 0.8-dB NF ESD-Protected 9-mW CMOS LNA Operating at 1.23 GHz 760 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 6, JUNE 2002 Brief Papers A 0.8-dB NF ESD-Protected 9-mW CMOS LNA Operating at 1.23 GHz Paul Leroux, Johan Janssens, and Michiel Steyaert, Senior

More information

Design and Analysis of High Gain Differential Amplifier Using Various Topologies

Design and Analysis of High Gain Differential Amplifier Using Various Topologies Design and Analysis of High Gain Amplifier Using Various Topologies SAMARLA.SHILPA 1, J SRILATHA 2 1Assistant Professor, Dept of Electronics and Communication Engineering, NNRG, Ghatkesar, Hyderabad, India.

More information

A 2-V 10.7-MHz CMOS Limiting Amplifier/RSSI

A 2-V 10.7-MHz CMOS Limiting Amplifier/RSSI 1474 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 35, NO. 10, OCTOBER 2000 A 2-V 10.7-MHz CMOS Limiting Amplifier/RSSI Po-Chiun Huang, Yi-Huei Chen, and Chorng-Kuang Wang, Member, IEEE Abstract This paper

More information

Due to the absence of internal nodes, inverter-based Gm-C filters [1,2] allow achieving bandwidths beyond what is possible

Due to the absence of internal nodes, inverter-based Gm-C filters [1,2] allow achieving bandwidths beyond what is possible A Forward-Body-Bias Tuned 450MHz Gm-C 3 rd -Order Low-Pass Filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V Supply Joeri Lechevallier 1,2, Remko Struiksma 1, Hani Sherry 2, Andreia Cathelin

More information

Simulation of GaAs phemt Ultra-Wideband Low Noise Amplifier using Cascaded, Balanced and Feedback Amplifier Techniques

Simulation of GaAs phemt Ultra-Wideband Low Noise Amplifier using Cascaded, Balanced and Feedback Amplifier Techniques 2011 International Conference on Circuits, System and Simulation IPCSIT vol.7 (2011) (2011) IACSIT Press, Singapore Simulation of GaAs phemt Ultra-Wideband Low Noise Amplifier using Cascaded, Balanced

More information

An Asymmetrical Bulk CMOS Switch for 2.4 GHz Application

An Asymmetrical Bulk CMOS Switch for 2.4 GHz Application Progress In Electromagnetics Research Letters, Vol. 66, 99 104, 2017 An Asymmetrical Bulk CMOS Switch for 2.4 GHz Application Lang Chen 1, * and Ye-Bing Gan 1, 2 Abstract A novel asymmetrical single-pole

More information

An up-conversion TV receiver front-end with noise canceling body-driven pmos common gate LNA and LC-loaded passive mixer

An up-conversion TV receiver front-end with noise canceling body-driven pmos common gate LNA and LC-loaded passive mixer LETTER IEICE Electronics Express, Vol.14, No.9, 1 11 An up-conversion TV receiver front-end with noise canceling body-driven pmos common gate LNA and LC-loaded passive mixer Donggu Im 1 and Ilku Nam 2a)

More information

Design and Implementation of a 1-5 GHz UWB Low Noise Amplifier in 0.18 um CMOS

Design and Implementation of a 1-5 GHz UWB Low Noise Amplifier in 0.18 um CMOS Downloaded from vbn.aau.dk on: marts 20, 2019 Aalborg Universitet Design and Implementation of a 1-5 GHz UWB Low Noise Amplifier in 0.18 um CMOS Shen, Ming; Tong, Tian; Mikkelsen, Jan H.; Jensen, Ole Kiel;

More information

Wideband Active-RC Channel Selection Filter for 5-GHz Wireless LAN

Wideband Active-RC Channel Selection Filter for 5-GHz Wireless LAN , pp. 227-236 http://dx.doi.org/10.14257/ijca.2015.8.7.24 Wideband Active-RC Channel Selection Filter for 5-GHz Wireless LAN Mi-young Lee 1 Dept. of Electronic Eng., Hannam University, Ojeong -dong, Daedeok-gu,

More information

A GSM Band Low-Power LNA 1. LNA Schematic

A GSM Band Low-Power LNA 1. LNA Schematic A GSM Band Low-Power LNA 1. LNA Schematic Fig1.1 Schematic of the Designed LNA 2. Design Summary Specification Required Simulation Results Peak S21 (Gain) > 10dB >11 db 3dB Bandwidth > 200MHz (

More information

Document Version Publisher s PDF, also known as Version of Record (includes final page, issue and volume numbers)

Document Version Publisher s PDF, also known as Version of Record (includes final page, issue and volume numbers) A 2V Iductorless Receiver Front-End for Multi-Standard Wireless Applications Vidojkovic, V; Sanduleanu, MAT; van der Tang, JD; Baltus, PGM; van Roermund, AHM Published in: IEEE Radio and Wireless Symposium,

More information

Pankaj Naik Electronic and Instrumentation Deptt. SGSITS, Indore, India. Priyanka Sharma Electronic and. SGSITS, Indore, India

Pankaj Naik Electronic and Instrumentation Deptt. SGSITS, Indore, India. Priyanka Sharma Electronic and. SGSITS, Indore, India Designing Of Current Mode Instrumentation Amplifier For Bio-Signal Using 180nm CMOS Technology Sonu Mourya Electronic and Instrumentation Deptt. SGSITS, Indore, India Pankaj Naik Electronic and Instrumentation

More information

DESIGN OF A NOVEL CURRENT MIRROR BASED DIFFERENTIAL AMPLIFIER DESIGN WITH LATCH NETWORK. Thota Keerthi* 1, Ch. Anil Kumar 2

DESIGN OF A NOVEL CURRENT MIRROR BASED DIFFERENTIAL AMPLIFIER DESIGN WITH LATCH NETWORK. Thota Keerthi* 1, Ch. Anil Kumar 2 ISSN 2277-2685 IJESR/October 2014/ Vol-4/Issue-10/682-687 Thota Keerthi et al./ International Journal of Engineering & Science Research DESIGN OF A NOVEL CURRENT MIRROR BASED DIFFERENTIAL AMPLIFIER DESIGN

More information

A Low Noise, Voltage Control Ring Oscillator Based on Pass Transistor Delay Cell

A Low Noise, Voltage Control Ring Oscillator Based on Pass Transistor Delay Cell A Low Noise, Voltage Control Ring Oscillator Based on Pass Transistor Delay Cell Devi Singh Baghel 1, R.C. Gurjar 2 M.Tech Student, Department of Electronics and Instrumentation, Shri G.S. Institute of

More information

Design of High Gain and Low Noise CMOS Gilbert Cell Mixer for Receiver Front End Design

Design of High Gain and Low Noise CMOS Gilbert Cell Mixer for Receiver Front End Design 2016 International Conference on Information Technology Design of High Gain and Low Noise CMOS Gilbert Cell Mixer for Receiver Front End Design Shasanka Sekhar Rout Department of Electronics & Telecommunication

More information

A Low Power 900MHz Superheterodyne Compressive Sensing Receiver for Sparse Frequency Signal Detection

A Low Power 900MHz Superheterodyne Compressive Sensing Receiver for Sparse Frequency Signal Detection A Low Power 900MHz Superheterodyne Compressive Sensing Receiver for Sparse Frequency Signal Detection Hamid Nejati and Mahmood Barangi 4/14/2010 Outline Introduction System level block diagram Compressive

More information

SALLEN-KEY FILTERS USING OPERATIONAL TRANSCONDUCTANCE AMPLIFIER

SALLEN-KEY FILTERS USING OPERATIONAL TRANSCONDUCTANCE AMPLIFIER International Journal of Electronics and Communication Engineering and Technology (IJECET) Volume 8, Issue 3, May-June 2017, pp. 52 58, Article ID: IJECET_08_03_006 Available online at http://www.iaeme.com/ijecet/issues.asp?jtypeijecet&vtype8&itype3

More information

Gain Boosted Telescopic OTA with 110db Gain and 1.8GHz. UGF

Gain Boosted Telescopic OTA with 110db Gain and 1.8GHz. UGF International Journal of Electronic Engineering Research ISSN 0975-6450 Volume 2 Number 2 (2010) pp. 159 166 Research India Publications http://www.ripublication.com/ijeer.htm Gain Boosted Telescopic OTA

More information

Fully integrated CMOS transmitter design considerations

Fully integrated CMOS transmitter design considerations Semiconductor Technology Fully integrated CMOS transmitter design considerations Traditionally, multiple IC chips are needed to build transmitters (Tx) used in wireless communications. The difficulty with

More information

A 900MHz / 1.8GHz CMOS Receiver for Dual Band Applications*

A 900MHz / 1.8GHz CMOS Receiver for Dual Band Applications* FA 8.2: S. Wu, B. Razavi A 900MHz / 1.8GHz CMOS Receiver for Dual Band Applications* University of California, Los Angeles, CA This dual-band CMOS receiver for GSM and DCS1800 applications incorporates

More information