Optical Sensor Product Data Sheet LTR-308ALS-01 Spec No.: DS Effective Date: 04/19/2016 LITE-ON DCC RELEASE

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1 Optical ensor Product Data heet LTR-308L-01 pec No.: D Effective Date: 04/19/2016 Revision: - LITE-ON D RELEE BN-OD-F001/4 LITE-ON Technology orp. / Optoelectronics No.90,hien 1 Road, hung Ho, New Taipei ity 23585, Taiwan, R.O.. Tel: Fax: /

2 OPTIL ENOR LTR-308L-01 Description The LTR-308L-01 is an integrated low voltage I2 ambient light sensor (L) in a single 2x2mm miniature chipled lead-free surface mount package. The L provides a linear response over a wide dynamic range, which is well suited to applications under very low or bright ambient brightness. Very low power consumption with sleep mode capability Operating voltage ranges: 1.7V to 3.6V Operating temperature ranges: -40 to +85 º Built-in temperature compensation circuit Programmable interrupt function for L with upper and lower thresholds RoH and Halogen free compliant The sensor has a programmable interrupt with hysteresis to response to events and that removes the need to poll the sensor for a reading which improves system efficiency. This MO design and factory-set one time trimming capability ensure minimal sensor-to-sensor variations for ease of manufacturability to the end customers. pplication ontrol brightness of display panel in mobile, computing, and consumer devices. L Features 16 to 20 bits effective resolution Wide dynamic range (0.01 to 157K lux) with linear response lose to human eye spectral response utomatic rejection for 50Hz/60Hz lighting flicker Features I 2 interface (tandard or Fast mbient Light in ultra-small chipled package Ordering Information Part Number Packaging Type Package Quantity LTR-308L-01 Tape and Reel 6-pin chipled package /29 Part No. : LTR-308L-01 BN-OD-F002/4

3 OPTIL ENOR LTR-308L Outline Dimensions 2/29 Part No. : LTR-308L-01 BN-OD-F002/4

4 OPTIL ENOR LTR-308L Functional Block Diagram LTR-308L-01 contains photodiode for respective photocurrent measurement. The photodiode currents are converted to digital values by Ds. The sensor also includes some peripheral circuits such as an internal oscillator, a current course, voltage reference, and internal fuses to store trimming information. 3. pplication ircuit 3/29 Part No. : LTR-308L-01 BN-OD-F002/4

5 OPTIL ENOR LTR-308L-01 I/O Pins onfiguration Table Pin I/O Type ymbol Description 1 VDD Power upply Voltage 2 N No connection to this pin 3 GND Ground 4 I L* I 2 serial clock. This pin is an open drain input. 5 O INT* Level Interrupt Pin. This pin is an open drain output. 6 I/O D* I 2 serial data. This pin is an open drain input / output. * Note: For noisy environment, add 10pF capacitor from signal to GND for additional noise filtering. Recommended pplication ircuit omponents omponent Rp1, Rp2, Rp3 [1] 1 2 Recommended Value 1 k to 10 k 0.1uF 4.7uF Notes: [1] election of pull-up resistors value is dependent on bus capacitance values. For more details, please refer to I2 pecifications: 4/29 Part No. : LTR-308L-01 BN-OD-F002/4

6 OPTIL ENOR LTR-308L Rating and pecification 4.1. bsolute Maximum Rating at Ta=25 Parameter ymbol Min. Max. Unit upply Voltage VDD 4.0 V Digital Voltage Range L, D, INT V torage Temperature T stg Electrostatic Discharge Protection (Human Body Model JED22-114) V HBM 2000 V Note: Exceeding these ratings could cause damage to the sensor. ll voltages are with respect to ground. urrents are positive into, negative out of the specified terminal Recommended Operating onditions Description ymbol Min. Typ. Max. Unit upply Voltage VDD V Interface signal input high V I2high 1.5 VDD V Interface signal input low V I2low V Operating Temperature T ope Electrical pecifications (VDD = 1.8V, Ta=25, unless otherwise noted) Parameter Min. Typ. Max. Unit ondition ctive upply urrent 110 u Max. duty cycle, Vdd=1.8V, Gain 3x tandby urrent 1 u hutdown Mode Wakeup Time from tandby 5 10 ms From tandby to ctive mode where measurement can start 4.4. haracteristics mbient Light Parameter Min. Typ. Max. Unit ondition L Resolution Bit Programmable for 16, 17, 18, 19, 20 Bit L Lux accuracy % White LED, 5000K, Ta = 25 Dark Level ount 0 5 ount 0 Lux, 18-bit resolution Integration time ms With 50/60Hz Rejection 50/60 Hz flicker noise error % 5/29 Part No. : LTR-308L-01 BN-OD-F002/4

7 OPTIL ENOR LTR-308L Typical Device Parameter (VDD = 2.8V, Ta=25, Default power-up settings, unless otherwise noted) L pectral Response ngular of Incidence Figure 4.1 pectral Response of L Figure 4.2 L ensitivity vs. ngular of Incidence 6/29 Part No. : LTR-308L-01 BN-OD-F002/4

8 OPTIL ENOR LTR-308L Electrical haracteristics ll specifications are at VBus = 1.7V, T ope = 25, unless otherwise noted. Parameter L clock frequency Bus free time between a TOP and TRT condition Hold time (repeated) TRT condition. fter this period, the first clock pulse is generated LOW period of the L clock HIGH period of the L clock et-up time for a repeated TRT condition et-up time for TOP condition Rise time of both D and L signals Fall time of both D and L signals Data hold time Data setup time Pulse width of spikes which must be suppressed by the input filter ymbol Min. Max. Unit f khz L t 1.3 us BUF t ; 0.6 us HD T t 1.3 us LOW t 0.6 us HIGH t ; 0.6 us U U T t ; 0.6 us TO t ns r t f ns t ; us HD DT t ; 100 ns U DT t P 0 50 ns Definition of timing for I 2 bus 7/29 Part No. : LTR-308L-01 BN-OD-F002/4

9 OPTIL ENOR LTR-308L Principle of Operation I 2 Protocols.I 2 Write Protocol (type 1): lave address W Register ddress P lave ID (Write) lave ID (Write) L D lave address W Register ddress P.I 2 Write Protocol (type 2): lave address W Register ddress Register ommand P lave ID (Write) lave ID (Write) L D lave address W Register ddress Register ommand P.I 2 Read Protocol: lave address R Register ommand N lave ID (Read) 1 P lave ID (Read) L D lave address R Register ommand N P 8/29 Part No. : LTR-308L-01 BN-OD-F002/4

10 OPTIL ENOR LTR-308L-01.I 2 Read (ombined format) Protocol: lave address W Register ddress r lave ID (Write) lave address R Register ommand N lave ID (Read) 1 P lave ID (Write) lave ID (Read) L D lave address W Register ddress r lave address R Register ommand N P cknowledge (0 for an K) N Non-cknowledge(1 for an NK) tart condition r Repeated tart condition P top condition W Write (0 for writing) R Read (1 for read) lave-to-master Master-to-lave I2 lave ddress The device has a 7-bit slave address of 0x53. read/write bit should be appended to the slave address by the master device to properly communicate with the device. I 2 lave ddress (Default) ommand Type (0x53) W/R Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 value Write x6H Read x7H 9/29 Part No. : LTR-308L-01 BN-OD-F002/4

11 OPTIL ENOR LTR-308L Register et ddr R/W Register Name Description Reset Value 0x00 RW MIN_TRL L operation mode control, W reset 0x00 0x01~0x03 R Reserved x04 R/W L_ME_RTE L measurement rate and resolution in ctive Mode 0x22 0x05 R/W L_GIN L analog Gain 0x01 0x06 R PRT_ID Part number ID and revision ID 0xB1 0x07 R MIN_TTU Power-On status, Interrupt status, Data status 0x20 0x08~0x0 R Reserved x0D R L_DT_0 L D measurement data, LB 0x00 0x0E R L_DT_1 L D measurement data 0x00 0x0F R L_DT_2 L D measurement data, MB 0x00 0x10~0x18 R Reserved -- 0x00 0x19 R/W INT_FG Interrupt configuration 0x10 0x1 R/W INT_PT Interrupt persist setting 0x00 0x1B~0x20 R Reserved x21 R/W L_THRE_UP_0 L interrupt upper threshold, LB 0xFF 0x22 R/W L_THRE_UP_1 L interrupt upper threshold, intervening bits 0xFF 0x23 R/W L_THRE_UP_2 L interrupt upper threshold, MB 0x0F 0x24 R/W L_THRE_LOW_0 L interrupt lower threshold, LB 0x00 0x25 R/W L_THRE_LOW_1 L interrupt lower threshold, intervening bits 0x00 0x26 R/W L_THRE_LOW_2 L interrupt lower threshold, MB 0x00 MIN_TRL Register (0x00) (Read/Write) This register controls the operation modes of L, which can be set to either standby or active mode. When writing to this register, it will cause a stop to any ongoing measurements and start new measurement. 0x00 MIN_TRL (default = 0x00) Reserved oftwar e Reset Reserved L Enable Reserved 10/29 Part No. : LTR-308L-01 BN-OD-F002/4

12 OPTIL ENOR LTR-308L-01 Field Bits Default Description Reserved 7: Must write oftware reset is NOT triggered (default) W Reset oftware reset is triggered Reserved 2: Must Write 00 0 L standby(default) L Enable L active Reserved Must write 0 L_ME_RTE Register (0x04) (Read/Write) This register controls L measurement resolution, Gain setting and measurement rate. When the measurement rate is programmed to be faster than possible for the programmed D measurement, the rate will be lowered than programmed (maximum speed). 0x04 L _ME_RTE (default = 0x22) Reserved L/ Resolution/Bit Width Reserve d L Measurement Rate Field Bits Default Description Reserved 7 0 Must write 0 L Resolution 6: Bit, onversion time = 400ms Bit, onversion time = 200ms Bit, onversion time = 100ms(default) Bit, onversion time = 50ms Bit, onversion time = 25ms 101/110/111 Reserved Reserved L Measurement Rate 2: ms ms ms (default) ms ms 110/ ms 11/29 Part No. : LTR-308L-01 BN-OD-F002/4

13 OPTIL ENOR LTR-308L-01 L_ GIN Register (0x05) (Read/Write) This register controls L measurement Gain Range. 0x05 L_GIN (default = 0x01) Reserved L Gain Range Field Bits Default Description Reserved 7: Must write Gain Range: Gain Range: 3 (default) L Gain Range 2: Gain Range: Gain Range: Gain Range: 18 PRT_ID Register (0x06) (Read Only) This register defines the part number and revision identification of the sensor. 0x06 PRT_ID (default = 0xB1) Part Number ID Revision ID 12/29 Part No. : LTR-308L-01 BN-OD-F002/4

14 OPTIL ENOR LTR-308L-01 Field Bits Default Description Part Number ID 7: Part Number ID Revision ID 3: Revision ID MIN_TTU Register (0x07) (Read Only) This register stores the information about the L interrupts and data status. The interrupt status in Bit 4 determines if the L interrupt criteria are met in Normal Interrupt Mode. It triggers when the L data is above the upper or below the lower threshold for a specified number of consecutive measurements in respective interrupt persist settings. For details interrupt behavior, refer to ection 10. 0x07 MIN_TTU (default = 0x20) Reserved Power ON tatus L Interrup t tatus L Data tatus Reserved Field Bits Default Description Reserved 7: Must write 00 Power On tatus L Interrupt tatus L Data tatus Power on event and ll interrupt threshold settings in the registers have been rest to power on default states (either due to part turned on or power supply voltage glitch). Flag is cleared after read. 0 Interrupt is NOT triggered (default) 1 Interrupt is triggered and will be cleared after read 0 L data is old data (Data has been read) 1 L data is new data (Data has not been read and will be cleared after read) Reserved 2: Must write /29 Part No. : LTR-308L-01 BN-OD-F002/4

15 OPTIL ENOR LTR-308L-01 L_DT Register (0x0D / 0x0E / 0x0F) (Read Only) The L hannel digital output data are expressed as a 16 to 20 bit unsigned integer data. When I2 read operation is active and points to any of the register address between 0x07 and 0x18, all 3 registers will be locked until the I2 read operation has been completed or the specified address range is left. This is to ensure that the data in the registers is from the same measurement even if an additional measurement cycle ends during the read operation. New measurement data is stored into temporary registers and the L_DT registers will be updated as soon as there is no on-going I2 read operation to the address range 0x07 to 0x18. 0x0D L_DT _0 (default = 0x00) L DT, Low 0x0E L DT_ 1 (default = 0x00) L DT, Middle 0x0F L_DT_ 2 (default = 0x00) Reserved L DT, High Field ddress Bits Default Description L Data, Low 0x0D 7: L Data lower byte data L Data, Middle 0x0E 7: L Data Middle byte data 7: Reserved L Data, High 0x0F 3: L Data Higher byte data 14/29 Part No. : LTR-308L-01 BN-OD-F002/4

16 OPTIL ENOR LTR-308L-01 INT_FG Register (0x19) (Read/Write) This register controls the operation of the interrupt pin and functions. L has independent interrupt signal and L interrupt is active low. L interrupt is enabled by Bit 2. Under Normal Interrupt Mode, the edge-triggered interrupt signal output will be maintains at active level until MIN_TTU register is read. 0x19 INT_FG (default = 0x10) Reserved L INT ELET Reserved L INT PIN ENBLE Reserved Field Bits Default Description Reserved 7: Must write 00 L Interrupt elect 4: Reserved 01 L hannel(default) Reserved Must be 0 L Interrupt Pin Enable L interrupt disabled (default) 1 L interrupt enabled Reserved 1: Must write 00 INT_PT Register (0x1) (Read/Write) This register controls the N number of times the measurement data is outside the range defined by the upper and lower threshold limits before asserting the interrupt. 0x1 INT_PT (default = 0x00) L Persist Reserved 15/29 Part No. : LTR-308L-01 BN-OD-F002/4

17 Field Bits Default Description OPTIL ENOR LTR-308L Every L value out of threshold range asserts an interrupt (default) L Persist 7: consecutive L values out of threshold range assert an interrupt consecutive L values out of threshold range assert an interrupt Reserved 3: Must write 0000 L_THRE Register (0x21 / 0x22 / 0x23 / 0x24 / 0x25 / 0x26) (Read/Write) The L_THRE_UP (up to 20-bits) and L_THRE_LOW (up to 20-bits) registers determines the upper and lower limit of the interrupt threshold value respectively. Interrupt will be triggered if measurement data in L_DT is exceeding the upper and lower limits. 0x21 L_THRE_UP_0 (default = 0xFF) L Upper Threshold, Low 0x22 L_THRE_UP_1 (default = 0xFF) L Upper Threshold, Mid 0x23 L_THRE_UP_2 (default = 0x0F) Reserved L Upper Threshold, High 0x24 L_THRE_LOW_0 (default = 0x00) 16/29 Part No. : LTR-308L-01 BN-OD-F002/4

18 OPTIL ENOR LTR-308L-01 L Lower Threshold, Low 0x25 L_THRE_LOW_1 (default = 0x00) L Lower Threshold, Mid 0x26 L_THRE_LOW_2 (default = 0x00) Reserved L Lower Threshold, High Field ddress Bits Default Description L Upper Threshold, Low L Upper Threshold, Mid L Upper Threshold, High L Lower Threshold, Low L Lower Threshold, Mid L Lower Threshold, High 0x21 7: L upper interrupt threshold, Low byte 0x22 7: L upper interrupt threshold, Mid byte 0x23 7: Reserved 3: L upper interrupt threshold, High byte 0x24 7: L lower interrupt threshold, Low byte 0x25 7: L lower interrupt threshold, Mid byte 0x26 7: Reserved 3: L lower interrupt threshold, High byte 7. pplication Information 7.1 Lux Formula Lux_alc is the calculated lux reading and L DT is the digital representation (output D) of ambient light level stored in the registers (ddress: 0x0D-0x0F) regardless of light sources. 17/29 Part No. : LTR-308L-01 BN-OD-F002/4

19 OPTIL ENOR LTR-308L-01 For no window (lear window) For device under window (eg: Tinted window) Window Factor is needed when device under Window glass with coated tinted ink. This is to compensate the light loss due to the lower transmission rate of the window glass. Where: L Gain GIN Resolution (bit) / Integration Time (ms) INT X bit, 25ms 0.25 X bit, 50ms 0.5 X bit, 100ms 1 X bit, 200ms 2 X bit, 400ms 4 Note : 1. For low lux detection (0.01 lux to lux, under bare die condition), it is recommended to use highest Gain (Gain x18) and highest resolution bit (20 bit). 2. For default setting Gain 3x, 18-bits, 100ms integration time, detectable lux 0.2 to 52K lux 7.2 Device Operation (tate Machine and Interrupt Features) tate Machine Below diagram is the main state machine of LTR-308L. 18/29 Part No. : LTR-308L-01 BN-OD-F002/4

20 OPTIL ENOR LTR-308L-01 During the L Operation, L measurements can be activated by setting the L_Enable bit to 1. s soon as the L sensors become activated through an I2 command, the internal support blocks are powered on. Once the voltages and currents are settled (typically after 5ms), the state machine checks for trigger events from a measurement scheduler to start L conversions according to the selected measurement repeat rates. Once L_Enable is changed back to 0, a running conversion on the respective channel will be completed and the relevant Ds and support blocks will move to power-down state. Interrupt Features This device generates independent L interrupt signal that can be multiplexed and output to the INT output pin. The interrupt conditions are always evaluated after completion of a new conversion of the L channels. L interrupts is active low at the INT pin. L Interrupt The L interrupt is enabled by Bit 2 (L INT Pin Enabled) of INT_FG register (0x19). The source is selected by Bit 4 and 5 (L INT elect) of INT_FG register. 19/29 Part No. : LTR-308L-01 BN-OD-F002/4

21 OPTIL ENOR LTR-308L-01 The INT is set when the data of the selected interrupt source is above the upper or below the lower threshold for a specified number of consecutive measurements set in L Persist in INT_PT register (0x1). The Interrupt signal is also stored in MIN_TTU register (0x07) as flag bit in Bit 4 (L INT tatus). This status flag bit is cleared by reading the MIN_TTU register. cleared flag will also clear the interrupt signal on the INT pin. 20/29 Part No. : LTR-308L-01 BN-OD-F002/4

22 OPTIL ENOR LTR-308L Pseudo odes Examples lave address lave_ddr = 0x6 MIN_TRL Register // This defines the operating modes of the L // Default settings is 0x00 ( L standby) Register_ddr = 0x00 ommand = 0x03 WriteByte(lave_ddr, Register_ddr, ommand); // MIN_TRL register // L in ctive Mode // ommand = 0x07, L in ctive Mode, L_ME_RTE Register // This controls the L measurement resolution and measurement rate. // Default setting of the register is 0x22 (Resolution = 18 Bit, Measurement rate of 100ms) Register_ddr = 0x04 ommand = 0x41 WriteByte(lave_ddr, Register_ddr, ommand) // L_ME_RTE register // Resolution = 16 bit, Meas Rate =50ms // ommand =0x25,Resolution = 18 bit, Meas Rate =1000ms // ommand =0x02, Resolution = 20 bit, Meas Rate =100ms L_GIN Register // This controls the L Gain Range. // Default setting of the register is 0x01 (Gain Range = 3) Register_ddr = 0x05 // L_GIN register ommand = 0x00 // Gain = 1 // ommand =0x04, Gain = 18 WriteByte(lave_ddr, Register_ddr, ommand) MIN_TTU Register (Read Only) // This Register contains the information on Interrupt, L data status. Register_ddr = 0x07 Data = ReadByte(lave_ddr, Register_ddr) Power_ON_tatus = Data & 0x20 L_Interrupt_tatus = Data & 0x10 L_Data_tatus = Data & 0x08 // MIN_TTU register address // If 0x20 Part went through power-up event // If 0x00 Normal // If 0x10 Interrupt triggered // If 0x00 Interrupt condition not fulfilled // If 0x08 L data is new // If 0x00 Old (previously read) Data L_DT Registers (Read Only) // The register 0x0D contains L_D 0 lower byte data. // The register 0x0E contains L _D 1 upper byte data. // The register 0x0F contains L_D 2 (top) upper byte data. // These registers should be read as a group, with the lower address being read first. 21/29 Part No. : LTR-308L-01 BN-OD-F002/4

23 OPTIL ENOR LTR-308L-01 Register_ddr = 0x0D Data0=ReadByte(lave_ddr, Register_ddr) Register_ddr = 0x0E Data1=ReadByte(lave_ddr, Register_ddr) Register_ddr = 0x0F Data2=ReadByte(lave_ddr, Register_ddr) L_D_Data =(Data2<<16) (Data1 << 8) Data0 // L_DT 0 low byte address // L_DT_1 middle byte address // L_DT_2 upper byte address // hift and combine all registers to get L_D Data INT_FG Register //This register controls the operation of the interrupt pins and options to trigger interrupt for L. //The default value for this INT_FG register is 0x10 (Interrupts inactive for both L) Register_ddr = 0x19 ommand = 0x14 // INT_FG Register address // Interrupt H = L, L Interrupt Enable, Normal Trigger Mode WriteByte(lave_ddr, Register_ddr, ommand) INTERRUPT_PERIT Register // This register sets the L persist level. // The default setting is 0x00. Interrupt at every L reading outside set thresholds. Register_ddr = 0x1 ommand = 0x00 // INT_PT register // Interrupt for every L value outside threshold // ommand =0x10, ubsequent 2 L outside threshold range WriteByte(lave_ddr, Register_ddr, ommand) L_THRE Registers //The register 0x21 contains L Interrupt upper threshold lower byte data (L_THRE_UP_0) //The register 0x22 contains L Interrupt upper threshold 1 upper byte data (L_THRE_UP_1) //The register 0x23 contains L Interrupt upper threshold 2 upper byte data (L_THRE_UP_2) //The register 0x24 contains L Interrupt lower threshold lower byte data (L_THRE_LOW_0) //The register 0x25 contains L Interrupt lower threshold 1 upper byte data (L_THRE_LOW_1) //The register 0x26 contains L Interrupt lower threshold 2 upper byte data (L_THRE_LOW_2) // To set L Upper threshold for Interrupt Upper_Threshold_Value=1000 // Example 1000 Data2 = Upper_Threshold_Value >> 16 // hift right to extract the 2 upper byte Data1 = Upper_Threshold_Value >> 8 // hift right to extract the 1 upper byte Data0 = Upper_Threshold_Value & 0xFF // Mask to extract lower byte. Register_ddr = 0x21 WriteByte(lave_ddr, Register_ddr, Data0) Register_ddr = 0x22 WriteByte(lave_ddr, Register_ddr, Data1) Register_ddr = 0x23 WriteByte(lave_ddr, Register_ddr, Data2) // L_THRE_UP_0 Register address // L_THRE_UP_1 Register address // L_THRE_UP_2 Register address // To set L Lower threshold for Interrupt Lower_Threshold_Value=100 // Example 100 Data2 = Lower_Threshold_Value >> 16 // hift right to extract the 2 upper byte Data1 = Lower_Threshold_Value >> 8 // hift right to extract the 1 upper byte Data0 = Lower_Threshold_Value & 0xFF // Mask to extract lower byte. Register_ddr = 0x24 // L_THRE_LOW_0 Register address 22/29 Part No. : LTR-308L-01 BN-OD-F002/4

24 OPTIL ENOR LTR-308L-01 WriteByte(lave_ddr, Register_ddr, Data0) Register_ddr = 0x25 WriteByte(lave_ddr, Register_ddr, Data1) Register_ddr = 0x26 WriteByte(lave_ddr, Register_ddr, Data2) // L_THRE_LOW_1 Register address // L_THRE_LOW_2 Register address 23/29 Part No. : LTR-308L-01 BN-OD-F002/4

25 T - TEMPERTURE ( ) OPTIL ENOR LTR-308L Recommended Leadfree Reflow Profile R1 R2 R3 MX 260 R4 60 sec to 90 sec bove 217 R P1 HET UP P2 P4 OLDER PTE DRY OOL DOWN P3 OLDER REFLOW t-time (EOND) Process Zone ymbol T Maximum T/ time or Duration Heat Up P1, R1 25 to /s older Paste Dry P2, R2 150 to s to 180s older Reflow P3, R3 P3, R4 200 to to /s -6 /s ool Down P4, R5 200 to 25-6 /s Time maintained above liquid s point, 217 > s to 90s Peak Temperature Time within 5 of actual Peak Temperature > s Time 25 to Peak Temperature 25 to 260 8mins It is recommended to perform reflow soldering no more than twice. 24/29 Part No. : LTR-308L-01 BN-OD-F002/4

26 OPTIL ENOR LTR-308L Moisture Proof Packaging ll LTR-308L-01 are shipped in moisture proof package. Once opened, moisture absorption begins. This part is compliant to JEDE J-TD-033 Level 3. Time from Unsealing to oldering fter removal from the moisture barrier bag, the parts should be stored at the recommended storage conditions and soldered within seven days. When the moisture barrier bag is opened and the parts are exposed to the recommended storage conditions for more than seven days, the parts must be baked before reflow to prevent damage to the parts. Recommended torage onditions torage Temperature Relative Humidity 10 to 30 Below 60% RH Baking onditions Package Temperature Time In Reels hours In Bulk hours Baking should only be done once. 25/29 Part No. : LTR-308L-01 BN-OD-F002/4

27 Recommended Land Pattern OPTIL ENOR LTR-308L-01 Recommended Land Pattern for LTR-308L-01 Note: ll dimensions are in millimeters 26/29 Part No. : LTR-308L-01 BN-OD-F002/4

28 OPTIL ENOR LTR-308L Metal tencil perture It is recommended that the metal stencil used for solder paste printing has a thickness (t) of 0.11mm (0.004 inches / 4 mils) or 0.127mm (0.005 inches / 5 mils). The stencil aperture opening is recommended to be 0.3mm x 0.65mm which has the same dimension as the land pattern. This is to ensure adequate printed solder paste volume and yet no shorting. Note: 1. ll dimensions are in millimeters 27/29 Part No. : LTR-308L-01 BN-OD-F002/4

29 OPTIL ENOR LTR-308L Tape and Reel Dimensions Notes: 1. ll dimensions are in millimeters (inches) 2. Empty component pockets sealed with top cover tape 3. 7 inch reel pieces per reel 4. In accordance with NI/EI specifications 28/29 Part No. : LTR-308L-01 BN-OD-F002/4

30 OPTIL ENOR LTR-308L-01 Revision Table: Version Update Page Date 1.0 Final Datasheet as created Total Mar Update Part ID from 0xB2 to 0xB Mar-16 29/29 Part No. : LTR-308L-01 BN-OD-F002/4

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