Texas Instruments THS7530PWP Gain Amplifier Structural Analysis

Transcription

1 March 1, 2005 Texas Instruments THS7530PWP Gain Amplifier Structural Analysis For comments, questions, or more information about this report, or for any additional technical needs concerning semiconductor technology, please call Sales at Chipworks Richmond Road, Suite 500, Ottawa, ON K2H 5B7, Canada Tel: Fax:

2 Structural Analysis Table of Contents 1 Overview 1.1 List of Figures 1.2 List of Tables 1.3 Introduction 1.4 Device Summary 1.5 Major Findings 2 Device Overview 2.1 Package and Die 2.2 Die Features 3 Process 3.1 General 3.2 Bond Pads 3.3 Dielectrics 3.4 Metallization 3.5 Vias and Contacts 3.6 Thin Film Resistors 3.7 Fuses 3.8 Polysilicon Resistors 3.9 Polysilicon Capacitors 3.10 NPN Bipolar Transistors 3.11 PNP Bipolar Transistors 3.12 Isolation and Substrate 3.13 References 4 Materials Analysis 4.1 SIMS Analysis 4.2 FESEM-EDS Materials Analysis 4.3 TEM-EDS Analysis of Transistor Metals 5 Critical Dimensions 5.1 Horizontal Dimensions 5.2 Vertical Dimensions

3 Structural Analysis 6 References Report Evaluation

4 Overview Overview 1.1 List of Figures 2 Device Overview Pin Layout Top Package Photograph Bottom Package Photograph Package X-Ray Top View Die Photograph Die Markings a Die Photograph at Metal Die Photograph at Metal Die Photograph at Poly Die Photograph at Substrate Die Corner a Die Corner b Die Corner c Die Corner d Bond Pad Minimum Pitch Bond Pads 3 Process Die Photograph Showing Location of Cross-Sections and Features Analyzed General Structure Die Edge Die Seal Structure Plan-View Image of Bond Pad and ESD Structure Bond Pad and Ball Bond Overview Inter-Metallic Detail Bond Pad Left Edge Bond Pad Right Edge Plan-View Image of ESD Protection Structure ESD Protection Structure ESD Protection Structure Detail Passivation IMD IMD 1

5 Overview PMD PMD, STI, DTI and BOX Plan-View Image of Minimum Pitch Metal Metal Minimum Pitch Metal Minimum Pitch Metal TEM Image of Metal Minimum Pitch Via 2 s Minimum Pitch Via 1 s Minimum Pitch Contacts to Poly Typical Contacts to Substrate and Poly Plan-View Image of NiCr Thin Film Resistor NiCr Thin Film Resistor NiCr Thin Film Resistor Contact Detail NiCr Thin Film Resistor Detail Plan-View Image of Metal 2 Fuse Metal 2 Fuse Plan-View Image of Polysilicon Resistors Polysilicon Resistors Polysilcion Resistors Detail Polysilicon Resistor Lengthwise Polysilicon Resistor Contact TEM Image of Polysilicon Resistor Contact Plan-View Image of Poly Capacitors Poly Capacitors SCM Image of Poly Capacitor NBL Poly Capacitor Contact to Poly Plan-View Image NPN and PNP Transistors (Metal 3) NPN and PNP Transistor General Structure Plan-View Image of NPN Transistors (Metal 1) Plan-View Image of NPN Transistors (Poly) Plan-View Image of NPN Transistors (Substrate) NPN Transistor Overview: Emitter Contact SCM Image of NPN Transistor: Emitter Contact NPN Transistor: Emitter Contact and Base NPN Transistor: Emitter Contact and Base Detail TEM Image of NPN R

6 Overview TEM Image of NPN Transistor: Emitter Contact and Base Detail TEM Image of Emitter and Extrinsic Base SCM Image of NPN Transistor: Emitter Contact and Base Detail NPN Transistor Overview: Base and Collector Contacts SCM Image of NPN Transistor Overview: Base and Collector Contacts NPN Transistor: Base and Collector Contacts Detail NPN Transistor: Base Contact Detail TEM Image of Collector TEM Image of Collector Detail Plan-View Image of NPN Transistor with Four Emitter Stripes (Metal 1) NPN Transistor with Four Emitters Overview SCM Image of Multiple-Emitter NPN Transistor with Four Emitters Overview Plan-View Image of PNP Transistors (Metal 1) Plan-View Image of PNP Transistors (Poly) Plan-View Image of PNP Transistors (Substrate) PNP Transistor: Emitter Contact PNP Transistor: Base and Collector Contacts TEM Image of PNP Transistor Overview: Emitter Contact SCM Image of PNP Transistor PNP Transistor: Base and Emitter Contact PNP Transistor: Base and Emitter Contact Detail TEM Image of PNP Transistor: Base and Emitter Contact TEM Image of PNP Transistor: Base and Emitter Contact Detail TEM Image of PNP Transistor: Base and Emitter Detail TEM Image of PNP Transistor: Extrinsic Base SCM Image of PNP Transistor: Base and Emitter Contact PNP Transistor: Base and Collector Contacts Detail TEM Image of PNP Transistor: Collector Contact PNP Transistor Base Contact Lengthwise Plan-View Image of PN Diode PN Diode Minimum Width STI DTI and BOX TEM Image of DTI and BOX

7 Overview Materials Analysis Cross-Section Through Dielectrics SIMS Profile of the Dielectric Layers FESEM-EDS Spectrum of Ball Bond FESEM-EDS Spectrum of NiCr Thin Film Resistor FESEM-EDS Spectrum of NiCr Contact Pad FESEM-EDS Spectrum of Metal FESEM-EDS Spectrum for Metal 1 Cap FESEM-EDS Spectrum for Metal 1 Barrier FESEM-EDS Spectrum for a Tungsten Contact FESEM-EDS Spectrum of NPN SiGe Base FESEM-EDS Spectrum of PNP SiGe Base TEM-EDS Spectrum of Emitter Window Nitride TEM-EDS Spectrum of Base Silicide TEM-EDS Spectrum of NPN Base (Emitter vs Collector Side) TEM-EDS Spectrum of PNP Base 5 Critical Dimensions 6 References Report Evaluation 1.2 List of Tables Pin Assignments Package and Die Dimensions Dielectric Composition and Vertical Dimensions Metallization Vertical Dimensions Minimum Metallization Horizontal Dimensions Minimum Via and Contact Horizontal Dimensions Minimum Polysilicon Vertical Dimensions NPN Transistor Vertical Dimensions PNP Transistor Vertical Dimensions Isolation Horizontal Dimensions Summary Dielectric Composition from SIMS and FESEMS R

8 About Chipworks Chipworks is the recognized leader in reverse engineering and patent infringement analysis of semiconductors and electronic systems. The company s ability to analyze the circuitry and physical composition of these systems makes them a key partner in the success of the world s largest semiconductor and microelectronics companies. Intellectual property groups and their legal counsel trust Chipworks for success in patent licensing and litigation earning hundreds of millions of dollars in patent licenses, and saving as much in royalty payments. Research & Development and Product Management rely on Chipworks for success in new product design and launch, saving hundreds of millions of dollars in design, and earning even more through superior product design and faster launches. Contact Chipworks To find out more information on this report, or any other reports in our library, please contact Chipworks at: Chipworks 3685 Richmond Rd. Suite 500 Ottawa, Ontario K2H 5B7 Canada T: F: Web site: info@chipworks.com Please send any feedback to feedback@chipworks.com