Step Down / Step Up / Inverting DC-DC Converter

Transcription

1 MC0C FEATUE Operating from V to 0V Low tandby Current Current Limiting Output witch Current to.a Output Voltage Adjustable Operation Frequency up to 0kHz (C T =00pF) Precision % Available in OP and DIP Packages Moisture ensitivity Level for MD Package OP PKG DIP PKG APPLICATION Battery Chargers NICs / witches / Hubs ADL Modems Negative Voltage Power upplies ODEING INFOMATION Device MC0CD MC0CN Package OP DIP DECIPTION The 0C is a monolithic switching regulator control circuit containing the primary functions required for DCDC converters. This device consists of internal temperature compensated reference, voltage comparator, controlled duty cycle oscillator with active current limit circuit, driver and high current output switch. The device is specifically designed to be used in tepdown, tepup and VoltageInverting applications with a minimum number of external components. The MC0C is the enhanced version of MC0A/B with the ability to work in higher frequency. (Note ) Absolute Maximum atings CHAACTEITIC YMBOL MIN. MAX. UNIT Power upply Voltage V CC 0 V Input Voltage ange V I 0. 0 V witch Collector Voltage V WC 0 V witch Emitter Voltage (V WC =0V) V WE 0 V witch Collector to Emitter Voltage V CE 0 V Driver Collector Voltage V dc 0 V Driver Collector Current (Note ) I dc 00 ma witch Current I W. A Apr. 0 ev.. HTC

2 MC0C Absolute Maximum atings (Continued) CHAACTEITIC YMBOL MIN. MAX. UNIT Power Dissipation (at T A = C) Thermal esistance OP PD MAX_OP.0 W DIP PD MAX_DIP 0. W OP θ JAOP 00 C/W DIP θ JADIP 0 C/W Operating Junction Temperature ange T J 0 0 C torage Temperature ange T TG 0 C Note. Absolute Maximum atings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. ECOMMENDED OPEATING CONDITION CHAACTEITIC YMBOL MIN. MAX. UNIT upply Voltage V CC 0 V Operating Ambient Temperature T A 0 C Ordering Information Package Order No. Description upplied As tatus OP MC0CD.A, 0kHz eel Active DIP MC0CN.A, 0kHz Tube Active MC 0 Package Type D : OP N : DIP witch Current : C :.A oot Name Product Code Apr. 0 ev.. HTC

3 MC0C PIN CONFIGUATION OP DIP PIN DECIPTION Pin No. Name OP / DIP PKG Function witch Collector Internal switch transistor collector witch Emitter Internal switch transistor emitter Timing Capacitor Timing Capacitor to control the switching frequency GND Ground pin for all internal circuits Inverting Input Inverting input pin for internal comparator V CC Voltage supply ense Peak Current ense Input by monitoring the voltage drop across an external I sense resistor to limit the peak current through the switch Driver Collector Voltage driver collector BLOCK DIAGAM Driver Collector witch Collector ense witch Emitter Timing Capacitor V CC Inverting Input.V GND Apr. 0 ev.. HTC

4 MC0C ELECTICAL CHAACTEITIC V CC = V, T A = 0 C to C, unless otherwise specified. YMBOL PAAMETE Test Conditions MIN. TYP. MAX. UNIT OCILLATO F OC Frequency Vpin= 0V,C T = 00pF,T A = C khz I CHG Charge Current V CC = to 0V, T A = C 0 ua I DICHG Discharge Current V CC = to 0V, T A = C ua I DICHG /I CHG V IPK(ENE) Output witch V CE(AT) Discharge to Charge Current atio Current Limit ense Voltage (Note ) aturation Voltage, Darlington connection V CE(AT) aturation Voltage (Note ) I W = A, pin = Ω to V CC, Forced β ~ 0 Pin = V CC, T A = C... I CHG = I DICHG, T A = C mv I W = A, Pins, connected. V h FE DC Current Gain I W = A, V CE = V, T A = C V I C(OFF) Collector Offstate Current V CE = 0V ua V TH EG Line Threshold Voltage Threshold Voltage Line egulation T A = C... V T A = T LOW to T HIGH..9 V V CC = to 0V. mv I IB Input Bias Current =0V 0 00 na TOTAL DEVICE I CC upply Current V CC = to 0V, C T = nf, Pin = V CC. Vpin > V TH, Pin = GND, Other pins open ma Note. tresses greater than those listed under "Absolute Maximum atings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "ecommended Operating Conditions" is not implied. Exposure to "Absolute Maximum atings" for extended periods may affect device reliability. Note. Maximum package power dissipation limits must be observed. Note. Low duty cycle pulse technique are used during test to maintain junction temperature as close to ambient temperature as possible. Note. If the output switch is driven into hard saturation (nondarlington configuration) at low switch currents ( 00mA) and high driver currents ( 0mA), it may take up to.0us for it to come out of saturation. This condition will shorten the off time at frequencies 0 khz, and is magnified at high temperatures. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a nondarlington configuration is used, the following output drive condition is recommended: ΙC(OUTPUT) Forced β of output switch : 0 Ι.0mΑ* C(DIVE) * The 00Ω resistor in the emitter of the driver device requires about ma before the output switch conducts. Apr. 0 ev.. HTC

5 MC0C TYPICAL OPEATING CHAACTEITIC OUTPUT WITCH ONOFF TIME vs. OCILLATO TIMING CAPACITO TIMING CAPACITO WAVEFOM OCILLATO FEUENCY vs. TIMING CAPACITO TANDBY UPPLY CUENT vs. UPPLY VOLTAGE EMITTE FOLLOWE CONFIGUATION OUTPUT ATUATION VOLTAGE vs. EMITTE CUENT COMMON EMITTE CONFIGUATION OUTPUT WITCH ATUATION VOLTAGE vs. COLLECTO CUENT Apr. 0 ev.. HTC

6 MC0C CUENT LIMIT ENE VOLTAGE vs. TEMPEATUE Apr. 0 ev.. HTC

7 MC0C TYPICAL APPLICATION tepup Converter L 0uH 0Ω DC WC 0.Ω V CC WE TC D IN9 V C 00uF CII GND C 00pF V / ma.kω kω C 0uF tepdown Converter 0.Ω DC WC WE D IN9 V CC TC V C 00uF CII GND C 0pF L 0uH.kΩ.kΩ C 0uF V / 0.A Apr. 0 ev.. HTC

8 MC0C tepup with External NPN witch.v tepdown with External PNP witch.v Apr. 0 ev.. HTC

9 MC0C Voltage Inverting with External NPN witch.v Voltage Inverting with External PNP aturated witch.v Apr. 0 ev.. 9 HTC

10 MC0C Dual Output Voltage V GND V IPK.V Higher Output Power, Higher Input Voltage Isolated from input IPK.V Apr. 0 ev.. 0 HTC