Implementing Audio Digital Feedback Loop Using the National Instruments RIO System

Transcription

1 Implementing Audio Digital Feedback Loop Using the National Instruments RIO System G. Huang, J. M. Byrd LBNL. One cyclotron Rd. Berkeley,CA,94720 Abstract. Development of system for high precision RF distribution and laser synchronization at Berkeley Lab has been ongoing for several years. Successful operation of these systems requires multiple audio bandwidth feedback loops running at relatively high gains. Stable operation of the feedback loops requires careful design of the feedback transfer function. To allow for flexible and compact implementation, we have developed digital feedback loops on the National Instruments Reconfigurable Input/Output (RIO) platform. This platform uses an FPGA and multiple I/Os that can provide eight parallel channels running different filters. We present the design and preliminary experimental results of this system. Keywords: synchronization, digital feedback, reconfigurable I/O, FPGA INTRODUCTION Development of systems for high precision RF distribution and laser synchronization at Berkeley Lab has been ongoing for several years [1]. These systems are based on distribution of an ultrastable clock signal over a stabilized link and local synchronization with either a laser or RF system. For example, the stabilized link uses an interferometric technique to stabilize the phase of an optical fiber for distribution of RF signals. Figure 1 shows an example of the stabilized transport with RF test signal. Multiple feedback loops will be required to stabilize multiple fibers or to stabilize two or more lasers. A digital feedback loop is designed to accomplish the work done by the analog filter, originally following the transfer function of the analog system but providing more flexibility in setting the position of zeros, poles and gain. For example, the piezo phase shifter used in the stabilized link has a resonance at about 18 khz. An analog filter and amplifier is designed to condition the signal from the mixer to the piezo driver and to achieve great result. However, the ability of digital filters to Figure 1 Stabilized Transport with RF Test Signal adapt to a wide variety of responses is useful because of the adaptability to the frequency response of numerous lasers used in this system. 359

2 The Reconfigurable I/O [2] is used to implement the digital filter, which contains 16-bits I/O and 1M gates FPGA. The design optimization and implementation of the digital and combined analog-digital system are present in this paper. LABVIEW AND RECONFIGURABLE I/O The digital filter is implemented on the National Instruments Reconfigurable Input/Output (RIO) platform. The hardware of the platform is shown in figure. 2, it including an 8-SLOT PXI Chassis (NI PXI-1042), a PXI embedded controller (NI PXI-8176), a Reconfigurable I/O (NI PXI-7831R) and a shielded I/O connector block (SCB-68). The software of the platform includes a LabVIEW full development system, LabVIEW real-time module and LabVIEW FPGA module. The embedded controller is used to communicate the PXI chassis and boards with a PC through ethernet connection. NI PXI-7831R is used to implement the digital filter and the program is written under LabVIEW platform. A RIO contains ADC, DAC, FPGA and relative support circuits. The ADC in the 7831R contains 8 analog input channels, 16-bit resolution, and 200kHz simultaneous-sampling rate. The DAC in the 7831R contains 8 analog output channel 16-bit resolution, 1MHz simultaneous update rate. It uses enhanced R-2R type DAC and has a glitch energy of Figure 2 NI RIO platforms -100mV for 3us at midscale transition. The FPGA used in the 7831R is a Xilinx FPGA which containing 1M gates and 40 built-in multipliers. The advantage of this approach is that it provides realtime parallel processing for 8 channels. The advantage of using LabVIEW is we can program the FPGA without knowledge about the hardware description language. DIGITAL FILTER DESIGN The feedback loop transfer function design is based on the analog filter used in the synchronization system. The transfer function of the analog system has one zero and two poles on the real axis. The required bandwidth is tens of khz. The transfer function of the analog filter is s z0 s T (s) = g = 1369 (1) ( s p 0)( s p1) ( s 58.84)( s 1000) Digital filter is designed to implement this transfer function. 1. Choice of filter: FIR or IIR? 360

3 A digital filter can be designed as FIR or IIR. The FIR has less phase distortion but takes more space and more delay. The number of multipliers in the FPGA is limited to 40 (16-bit multiply 16-bit). The delay of the system should be less than ~50us. The overall goal of the system is to implement 8 separate channels on one chip. When using the FIR filter, each channel can only have 5 taps, which is very poor response. By using the IIR filter to implement the filter, the phase response is not linear but can still follow the analog phase, except for a delay of ~10us. The delay from the ADC is 5us, and DAC is 1us. The internal clock of the FPGA is running at 40MHz. IIR is selected to implement the filter. 2. Filter structure selection The digital filter can be implemented by different structures. Typical structure includes: direct form I and it s transpose, direct form II and it s transpose, cascade form and parallel form. For the direct form, the poles are very sensitive to the parameters, and the parameters do not represent the pole directly. In our case, the poles are very near to 1; small round off error can make the system unstable. In the cascade form, the zeros and the poles can be adjusted separately. And for the parallel form, the poles can be adjusted separately, but the zeros cannot. The parallel form does calculations in parallel, so the speed is fastest and has minimal accumulated error. The cascade form and parallel form are implemented in the FPGA. 3. Digital only or combination of digital and analog The sample rate of the RIO is 200kHz maximum, so the Nyquest frequency of the system is 100kHz. The gain range of the analog filter over the band is 43dB (DC) through 53 db (Nyquest frequency). The digital system using 16-bit ADC and DAC, so it has a dynamic range of 90dB(1 bit for sign). That means if using the digital system to implement the filter directly, the transfer function will be distorted near DC and Nyquest frequency. By combining the digital system with a simple analog stage, one can resolve the problem. Adding an extra differential stage or a zero in the digital system and implementing an integrator or a pole analog can give the digital system enough dynamic range. 4. Digitizing the filter Bilinear transformation method is used to convert the given analog filter to a digital IIR filter. The parallel form of the digital filter can be express as Eq. 2. z0 p0 z0 p1 4gT 4gT T ( 2 z0t ) (2 p0t )( p0 p1)( 2 p0t ) (2 p1t )( p0 p1)( 2 p1t ) T bt ( z) = g ( 2 p 2 0T )( 2 p1t ) p0t 2 p1t 1 z 1 z 2 p0t 2 p1t = z z. (2) 361

4 Because the RIO does not handle the floating-point number, the parameters in the digital filter have to be scaled as integers. Tbt ( z ) = * * * z 19741* 2 z 1 z * (3) 5. Implement unit cell The unit cell of a cascade form IIR filter is T ( z ) = a bz, when b=0, it becomes 1 cz the unit cell of a parallel form filter. When the zero and pole is near to 1, this means the b/a and c are very near to 1. a bz T ( z) = 1 cz a (1 z ) δ b z = (4) 1 z δ c z = (a bz ) I ( z ) In order to estimate the range of the intermediate result, the poles are dealt with first to get an intermediate result I(z). Figure 3. Implement Unit cell in LabVIEW Converting the filter parameter to a fix point expression, we have: a = Nka * 2 na ; b = Nkb * 2 nb ; c = Nkc * 2 nc. By selecting smaller Na, Nb and Nc, the numbers can be expressed more precisely. But the Nka, Nkb and Nkc have to be 16-bit integers in the FPGA, so selecting minimal Na, NB and Nc fixes the scale number. The range of the intermediate result I(z) is limited by x (z ) x( z ) and. Then a unit cell can be implemented as shown in figure 3. The 2 δc digital filter can be implemented by cascade or parallel this unit cell. 6. Filter implementation The one zero and two poles filter is implemented in LabVIEW FPGA module, and the related parameter can be set through a host module. The host and the FPGA VI are shown in figure 4. n The variable in the FPGA module and the calculation of 2 while n is a variable FPGA(left) and host(right) VI block diagram and front panel Figure 4. Host and FPGA VI for an IIR with adjustable poles and zero 362

5 will take more space in the FPGA. When the parameters of the filter are adjusted, the controls in the front panel should be replaced by a constant to save space in the FPGA The transfer function of the digital filter can be measured by a base band vector network analyzer. The amplitude and phase response of the digital filter following equation 1 are shown in figure 5. Different implementation structures of the filter are measured, including cascade form, parallel form and a combination of the digital filter with an external analog low pass filter. The analytical formula response is also shown in same figure. 60 Log Magnitude(dB) analyampdb casc1amp para1amp casc4anaamp Phase(degree) casc1phs para1phs casc4anaphs analyphs Frequency(Hz) Frequency(Hz) Figure 5. Analytic and Measurement transfer function of the filter from analog system The transfer function measurement shows that the implemented digital filters agree with the formula we designed. The designed digital filter is inserted into the feedback loop of the synchronization system. Initial results are promising but further development is needed to demonstrate performance equal to that of the analog filter. CONCLUSIONS The operation of the optical synchronization system requires several audio band feedback loops. A digital filter based system is designed on the NI RIO system, which can provide an adjustable zero and poles. The transfer function measurement shows the filter works as predicted. ACKNOWLEDGMENTS We would like to acknowledge very helpful discussions with J. W. Staples, L. Doolittle, R. Wilcox. And thank K. M. Baptiste lending us the NI hardware and software. REFERENCES 1. R. Wilcox, J.W. Staples. Optical synchronizations system for femtosecond x-ray sources National Instruments