Implementation of Novel EPC UHF RFID Tag with Sensor Data Transmission Capability

Transcription

1 Implementation of Novel EP UHF FID Tag with Sensor Data Transmission apability hing-heng Tien, hih-hu Wang, Yi-heng Hong, hih-hao hen, Hsuan-hih Lu Department of ommunication Engineering, hung Hua University No. 707, Sec. 2, Wufu d., Hsinchu, 30012, Taiwan,.O.. Tel: Fax: Abstract This paper proposed a novel EP (Electronic Product ode) UHF FID tag architecture to transmit both EP code and sensor data. The FID tag module contains a F transceiver, command interpreter and digital anti-collision finite state machines, and sensor data input interface. The demo circuits were realized by combining an ALTEA yclone II EP25T1447 FPGA chip with a hybrid F front-end circuit and antenna. The digital anti-collision technique was adapted with the Slotted andom anti-collision algorithm and implemented in the FPGA chip. The EP standard compatibility of anti-collision function is successfully verified by an Alien AL-9780 UHF FID reader. Furthermore, when we use the microprocessor to send internal temperature sensor data into the FID tag interface, the tag will insert the data to MSB of EP code. The experiment shows that Alien AL-9780 UHF FID reader can continuously receive the temperature information from the EP code of proposed demo tag and the EP code from the other standard UHF tags simultaneously. Keywords: EP, FID, Tag, Sensor. 1. Introduction ecently the research on FID is increasing rapidly because of the invention of this technology may change mankind's present life style. The FID system has already been widely used on supply chain management, access control to buildings, mass rapid transit, and so on [1] [2]. A FID system includes a reader and a tag, according to EP lass-1 Generation-2 UHF FID Protocol [3] for communications at 860 MHz 960MHz [4], a reader transmits information to a tag by modulating an F signal. Then the passive tags receive both information and operation power from the F signals. After signal processing, a tag responds to the reader by modulating the reflection coefficient of its antenna while the reader is transmitting a continuous wave F signals to tag, thereby backscattering an information signal to the interrogator. This paper is focused on a FID tag module design including sensor data transmission capability and EP standard compatibility, as shown in figure 1. The FID tag module contains a F transceiver, command interpreter and digital anti-collision finite state machines, and sensor data input interface. The demo circuits were realized by combining an ALTEA yclone II EP25T1447 FPGA chip with a hybrid F front-end circuit and antenna. The digital anti-collision technique was adapted with the Slotted andom anti-collision algorithm and implemented in the FPGA chip. The EP standard compatibility of anti-collision function is successfully verified by an Alien AL-9780 UHF FID reader. The content of the paper is divided into six sections. Section 2 introduces the design of FID tag circuit module. Section 3 shows FID tag anti-collision algorithm. Section 4 shows the temperature sensor of 8051F320 microprocessor [5] and the data connections to EP Tag. Design implementation and verification is in section 5. ell-based I design of digital anti-collision circuit is presented in section 6. Final section is the summary of this paper. EP + sensor sensor IO(EP) Figure 1 UHF FID tag with sensor data transmission capability. 37

2 2. FID Tag ircuit Module Design The function block of the tag module is shown in figure 2. The tag module contains ASK demodulator, small signal amplifier, backscatter modulation circuit, FID FPGA digital circuit with sensor data interface and the temperature sensor of 8051F320 microprocessor. Because of using FPGA and MU/sensor circuits in the tag module, the battery is necessary and this active FID tag Figure 4 Simulation result of ASK demodulator output. Figure 2 Function blocks of the proposed FID tag module module doesn t have the function block of rectifier. 2.1 ASK demodulator The major function of the F front-end circuit is to demodulate the command signals from the Alien eader AL-9780 and transmit backward the sensor data and EP codes. The Schottky diode in the demodulation circuit [6] is used to demodulate the ASK signal by envelope detection mechanism [7] [8]. We use Agilent ADS to simulate the ASK demodulation circuit performance. The ASK demodulator schematic diagram is shown in figure 3. Demodulated signal, as shown in figure 4, is amplified by the ommon-emitter amplifier and then converted to digital signals by the comparator. Furthermore, the digital signals are decoded by the FID FPGA finite state machine circuits. P_1Tone POT1 Num=1 Z=50 Ohm P=polar(dbmtow(-10),0) Freq=915 MHz t AM_ModTuned MOD1 ModIndex=1 Fnom=915 MHz out=50 Ohm VtBitSeq S2 Vlow=0 V Vhigh=3 V ate=40 khz ise=1 nsec Fall=1 nsec BitSeq="10" ASK_In V_D S1 Vdc=0.3 V L_murata_model L_murata1 L=97.97 nh =0.04 pf =7.431 Ohm ZHS350 D1 TANSIENT Tran Tran1 StopTime=100.0 usec MaxTimeStep=68 psec _murata_model _murata1 =47 pf L=0.64 nh =0.163 Ohm ASK_out 2 =15 kohm Figure 3 ASK demodulator circuit schematic I_Probe I_Probe1 2.2 Backscatter modulator Backscatter modulator is used to reflect or match the continuous waves of F carrier received by antenna and form the uplink ASK data. The reflection coefficient of the tag can be varied by turning F switch on or off, as shown in Fig. 5. When the input impedance of tag is changed by the modulator, the amplitude of reflection signal to reader is changing at the same time, just like ASK modulation signal [9] [10]. If the replied data is 1, the switch transistor turns on and the impendence of tag is lowered. The amplitude of reflected carrier signal is then increased, as shown in figure 6. On the other hand, if the replied data is 0, the switch transistor turns off and the impendence of tag is matched to 50 Ohms. The amplitude of reflected carrier signal is almost zero, as shown in figure 7. Even the level of refection signal from tag is very small, the reader still has the lower enough sensitivity to detect and demodulate the backscattered signal from tag. 2.3 FID FPGA digital circuit FID digital circuit [11] includes several function blocks as following: command L L1 L=2.7 nh = 2 =16.0 pf 1 =1.8 pf ASK demod circuit V_D S2 Vdc=0.3 V _murata_model _murata2 =47 pf L=0.64 nh =0.163 Ohm Term Ter 3 Num=1 =10 Ohm Z=50 Ohm ap_npn_q2n3904_ Q2 Data 0 Switch off L_murata_model L_murata1 L=97.97 nh =0.04 pf =7.431 Ohm 1 =3.3 kohm ZHS350 D1 7 =50 Ohm 5 =1.0 pf 6 =5.1 kohm V_D S3 Vdc=0 V _murata_model _murata1 =47 pf L=0.64 nh =0.163 Ohm 2 =16k V_D S1 Vdc=3.3 V 5 =1k Ohm 6 =1 uf ap_npn_q2n3904_ Q1 4 =1M Ohm E amp circuit Figure 5 Backscatter modulation - data 0 switch 38

3 interpreter, digital anti-collision finite state machines, and EP data and sensor data input interface. We design the circuit to meet the lass-1 Generation-2 EP communication protocol standard and implement all functional hardware into the ALTEA EP25T1447 FPGA chip. The digital functions are emulated by Altera Quatus tool and the logic hardware was verified successfully by the Agilent logic analyzer. freq= 895.5MHz db(s(1,1))= db(s(1,1)) Figure 6 Impedance unmatched when switch is on. freq= 895.5MHz db(s(1,1))= db(s(1,1)) freq= 926.9MHz db(s(1,1))= freq, MHz freq= 926.9MHz db(s(1,1))= freq, MHz Figure 7 Impedance matched when switch is off. freq= 911.5MHz db(s(1,1))= freq= 911.5MHz db(s(1,1))= FID Tag Anti-collision Algorithm An EP lass-1 Generation-2 standard FID tag uses an anti-collision algorithm called slotted random. This algorithm uses time-division multiplexing (TDM) to avoid data collision. When tags receive a Query command from reader, they will get a Q value defined in the Query command and load a Q-bit random number into a slot counter as shown in figure 8. The maximum numbers of tags which reader can identify is 2 Q -1 and the maximum number of Q is 15. If the value in the slot counter is zero for one of tags, that tag will reply data to reader. If several tags reply in the same time, this phenomenon calls collision. eader will then use Query-Adjust command to increase the value of Q to expanding the random number range of each tag and avoid the situation of collision. There are six commands used in this Tag2 (N_2) Tag3 (N_3) Tag1 (N_1) T2 T1 T3 eader Tag4 (N_4) Tag6 (N_6) Tag5 (N_5) digital anti-collision system: Select command, Query command, Query-Adjust command, Query-ep command, AK command and NAK command. The communication scenario between reader and tag is shown in figure 9. Select command is used to select a particular tag population. When receiving a Query command, each tag generates a random value in the range of 0 to 2 Q -1, and loads this value into their slot counter. Tag will reply N16 (16-bit random number) to the reader if the value in the counter is zero. Further in steps 4-6, reader sends an AK command to acknowledge the tag and ready to receive the P/EP codes from the specified tag. If no tag responses back, reader will repeatedly send Query-ep command to sequentially decrease all slot counters of tags and wait the N16 code from the zero-slot-counter tag one by one to complete EP code reading steps. The NAK command is used to reset all of tags. 4. Temperature sensor of 8051F320 We use the Silicon Lab 8051F320 T4 T6 T5 Figure 8 Slotted random anti-collision algorithm. [1] Interrogator issues a Select ommand first [2] Interrogator issues a Query, QueryAdjust, or Queryep. [4] Interrogator acknowledges Tag by issuing AK with same N16. [6] Interrogator accesses a singletag. The anti-collision flow is finished INTEOGATO Query/Adjust/ep N16 Select AK (N16) {P, EP} TAG Figure 9 Steps of Tag access. [3]Two possible outcomes: (1)slot=0:Tag responds with N16. (2)slot<>0:No reply. [5] Two possible outcomes: (1)Valid N16:Tag responds with {P, EP} (2)Invalid N16:No reply 39

4 8051F320 AD output alculated temp. ( ) Measurement temp.( ) Table 1 Sensor data measurement result. microprocessor (MU) to send internal temperature sensor data into the FID tag interface and then be transmitted to the reader with EP codes. This work is the novel invention and capability compared to the traditional functions of UHF FID tag. The sensor can sense temperature from -40 o to 85 o and convert it to voltage level defined as the follow equation: o Vtemp = 2.86( Temp ) + 776mV. The MU uses an on-chip 10-bit AD to convert the internal sensor output voltage into a 10-bits digital data. The relationship between I internal and measured MU surface temperature to digital output data are listed in table 1. In the experiment, we use infrared thermometer to measure the temperature in 8051F320 surface and record the sensor output data simultaneously. According to the measurement results, the 10-bit digital data versus the varying temperature, the digital F front-end circuit FF 25 o eader 讀取到的 EP code Figure o measurement results. codes change between the second bit to sixth bit only. Therefore, we program the MU to continuously send this 5-bit sensor data into FID tag interface and replace the first 5 MSB of 16 external-input MSB for tag EP codes. 5. Design implementation and verification Based on the proposed architecture, the digital anti-collision system was described in VHDL at TL level. The demo circuits were realized by combining an ALTEA yclone II EP25T1447 FPGA chip with a hybrid F front-end circuit and antenna, as shown in figure 10. The Slotted andom digital anti-collision technique was adapted and implemented in the FPGA chip. The EP lass-1 Generation-2 standard compatibility of anti-collision function of proposed tag is successfully verified by an Alien AL-9780 UHF FID reader with the other conventional Alien EP UHF tags. Furthermore, when we use the microprocessor to send internal temperature sensor data into the FID tag interface, the tag will insert the data to MSB of EP code. The experiment shows that Alien AL-9780 UHF FID reader can simultaneously and continuously receive the EP codes from the other standard UHF tags and the specified EP codes from proposed demo tag with the temperature information. The figure 11 and 12 shows 25 and 60 degrees temperature sensor data embedded in EP codes which had successfully received by Alien UHF FID reader. 6. ell-based I design of FID digital circuit Sensor Antenna Figure 10 EP lg2 UHF FID tag module. After verifying of FID tag digital FPGA circuit, we implement the digital part of tag into 0.18um TSM MOS integrated circuit 40

5 including the scan chain testability circuits. The final I layout is depicted in figure 13. The total chip size is x mm 2 with the core size of 0.4x0.4 mm 2. The emulated fault coverage rate is up to 93.34%. onclusion We have presented and verified a novel EP UHF FID tag with sensor data transmission capability by combining an ALTEA yclone II EP25T1447 FPGA chip, a hybrid F front-end circuit and antenna into a tag module. The communication between tag and the Alien AL-9780 reader is successfully built up. The temperature data embedded in the MSB of EP code can be recognized and match the actual sensor temperature. Finally, we implement the MOS digital system of EP FID tag by the cell-based design flow with 0.18um TSM/Artisan model library. The tag I core size is 0.4x0.4 mm 2 and the emulated fault coverage rate is up to 93.34%. Acknowledgement The authors would like to thank the support of the hip Implementation enter (I) of National Science ouncil, Taiwan (O), to access the TSM MOS process. eference [1] K. Finkenzeller, FID Handbook: adio-frequency Identifications Fundamentals and Applications, 2nd Ed. New York: Wiley, [2] 溫榮弘編譯, 無線通訊技術與 FID 初版, 臺北市, 全華科技, 民國 93 年 8 月 [3] EP, adio-frequency Identity Protocols lass-1 Generation-2 UHF FID Protocol for ommunications at 860 MHz 960 MHz Version [4] EPglobal, egulatory status for using FID in the UHF spectrum, 25 June [5] SILION LAB, 8051F320 Data Sheet, ev. 1.1, Dec [6] Adel S. Sedra and Kenneth. Smith, Microelectronic ircuits, 4 th Ed. New York Oxford University Press. [7] 陳連春編譯, 低頻率 / 高頻率電路設計指引 增訂版, 永和市, 建興文化, 2001 年 11 月 [8] 袁杰等編著, 高頻通訊電路設計 初版, 臺北市, 高立, 民國 89 年 [9] Ulrich Kaiser and Wolfgang Steinhagen, A Low-Power Transponder I for High-Performance Identification Systems, IEEE J. Solid-State ircuits, vol. 30, no. 3, [10] G. Vita and G. Iannaccone, Design riteria for the F Section of UHF and Microwave Passive FID Transponders, IEEE Trans. Microw. Theory Tech., vol. 53, no. 9, Sep. [11] 周佳勳, 中華大學電機工程研究所碩士論文 EP lass-1 Generation-2 無線射頻辨識標籤設計與驗證, 2007 年 8 月 E FF 60 o eader 讀取到的 EP code Figure o measurement results. Figure 13 Digital part of FID tag MOS I layout 41

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