LM556 Dual Timer. an external resistor and capacitor for each timing Adjustable Duty Cycle

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1 1 LM556 Dual Timer LM556 SNAS549A MARCH 2000 REVISED OCTOBER Features 3 Description 1 Direct Replacement for SE556/NE556 The LM556 dual-timing circuit is a highly-stable controller capable of producing accurate time delays Timing From Microseconds Through Hours or oscillation. The LM556 device is a dual-timing Operates in Both Astable and Monostable Modes version of the LM555 device. Timing is provided by Replaces Two 555 Timers an external resistor and capacitor for each timing Adjustable Duty Cycle function. The two timers operate independently of each other, sharing only V CC and ground. The circuits Output Can Source or Sink 200 ma may be triggered and reset on falling waveforms. The Output and Supply TTL-Compatible output structures may sink or source 200 ma. Temperature Stability Better Than 0.005% per C Device Information (1) Normally On and Normally Off Output PART NUMBER PACKAGE BODY SIZE (NOM) SOIC (14) 3.91 mm 8.65 mm 2 Applications LM556 PDIP (14) 6.35 mm mm Precision Timing (1) For all available packages, see the orderable addendum at Pulse Generation the end of the data sheet. Sequential Timing Time Delay Generation Pulse Width Modulation Pulse Position Modulation Linear Ramp Generator Schematic Diagram

2 LM556 SNAS549A MARCH 2000 REVISED OCTOBER 2015 Table of Contents 1 Features Applications Description Revision History Pin Configuration and Functions Specifications Absolute Maximum Ratings ESD Ratings Recommended Operating Conditions Thermal Information Electrical Characteristics Typical Characteristics Detailed Description Overview Functional Block Diagram Feature Description Device Functional Modes Application and Implementation Application Information Typical Application Power Supply Recommendations Layout Layout Guidelines Layout Example Device and Documentation Support Documentation Support Community Resources Trademarks Electrostatic Discharge Caution Glossary Mechanical, Packaging, and Orderable Information Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (March 2000) to Revision A Page Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Deleted the V CC = 5 V and I SINK = 8 ma test condition row for the Output voltage drop parameter in the Electrical Characteristics table Copyright , Texas Instruments Incorporated

3 LM556 SNAS549A MARCH 2000 REVISED OCTOBER Pin Configuration and Functions D or NFF Package 14-Pin SOIC or PDIP Top View DISCHARGE 1 14 VCC THRESHOLD 2 13 DISCHARGE CTRL VOLTAGE 3 12 THRESHOLD RESET 4 11 CTRL VOLTAGE OUTPUT 5 10 RESET TRIGGER 6 9 OUTPUT GND 7 8 TRIGGER NAME PIN NO. I/O Pin Functions DESCRIPTION CONTROL Controls the threshold and trigger levels. It determines the pulse width of the output VOLTAGE 3 I waveform. An external voltage applied to this pin can also be used to modulate the output (Timer 0) waveform. CONTROL Controls the threshold and trigger levels. It determines the pulse width of the output VOLTAGE 11 I waveform. An external voltage applied to this pin can also be used to modulate the output (Timer 1) waveform. DISCHARGE (Timer 0) DISCHARGE (Timer 1) 1 I 13 I GND 7 O Ground reference voltage OUTPUT (Timer 0) OUTPUT (Timer 1) RESET (Timer 0) RESET (Timer 1) THRESHOLD (Timer 0) TRIGGER (Timer 0) THRESHOLD (Timer 1) TRIGGER (Timer 1) Open collector output which discharges a capacitor between intervals (in phase with output). It toggles the output from high to low when voltage reaches 2/3 of supply voltage. Open collector output which discharges a capacitor between intervals (in phase with output). It toggles the output from high to low when voltage reaches 2/3 of supply voltage. 5 O Output driven waveform 9 O Output driven waveform 4 I 10 I 2 I 6 I 12 I 8 I VCC 14 I Supply voltage with respect to GND Negative pulse applied to this pin to disable or reset the timer. When not used for reset purposes, it should be connected to Vcc to avoid false triggering. Negative pulse applied to this pin to disable or reset the timer. When not used for reset purposes, it should be connected to Vcc to avoid false triggering. Compares the voltage applied to the terminal with a reference voltage of 2/3 V CC. The amplitude of voltage applied to this terminal is responsible for the set state of the flip-flop. Responsible for transition of the flip-flop from set to reset. The output of the timer depends on the amplitude of the external trigger pulse applied to this pin. Compares the voltage applied to the terminal with a reference voltage of 2/3 V CC. The amplitude of voltage applied to this terminal is responsible for the set state of the flip-flop. Responsible for transition of the flip-flop from set to reset. The output of the timer depends on the amplitude of the external trigger pulse applied to this pin. Copyright , Texas Instruments Incorporated 3

4 over operating free-air temperature range (unless otherwise noted) (1)(2) MIN MAX UNIT LM556 SNAS549A MARCH 2000 REVISED OCTOBER Specifications 6.1 Absolute Maximum Ratings Supply voltage 18 V Power dissipation (3) LM556CM 410 LM556CN 1620 Operating temperature, LM556C 0 70 C PDIP package soldering (10 seconds) 260 Soldering information SOIC package vapor phase (60 seconds) 215 C SOIC package infrared (15 seconds) 220 Storage temperature, T stg C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. (3) For operating at elevated temperatures the device must be derated based on a 150 C maximum junction temperature and a thermal resistance of 77 C/W (Plastic Dip), and 110 C/W (SO-14 Narrow). 6.2 ESD Ratings VALUE V (ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±500 V (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) mw UNIT MIN MAX UNIT V CC Supply voltage V T A Operating temperature 0 70 C 6.4 Thermal Information LM556 THERMAL METRIC (1) D (SOIC) NFF (PDIP) UNIT 14 PINS 14 PINS R θja Junction-to-ambient thermal resistance C/W R θjc(top) Junction-to-case (top) thermal resistance C/W R θjb Junction-to-board thermal resistance C/W ψ JT Junction-to-top characterization parameter C/W ψ JB Junction-to-board characterization parameter C/W R θjc(bot) Junction-to-case (bottom) thermal resistance C/W 4 Copyright , Texas Instruments Incorporated

5 6.5 Electrical Characteristics T A = 25 C, V CC = 5 V to 15 V, unless otherwise specified LM556 SNAS549A MARCH 2000 REVISED OCTOBER 2015 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Supply voltage V Supply current (each timer section) V CC = 5 V, R L = 3 6 V CC = 15 V, R L = (low state) (1) Initial accuracy 0.75% Timing error, Drift with temperature R A = 1 k to 100 kω, 50 ppm/ C monostable Accuracy over temperature C = 0.1 μf (2) 1.5% Drift with supply 0.1 Initial accuracy 2.25% Timing error, Drift with temperature R A, R B = 1 k to 100 kω, 150 astable Accuracy over temperature C = 0.1 μf (2) 3% Trigger voltage Drift with supply 0.30 %/V V CC = 15 V V CC = 5 V Trigger current µa Reset voltage V Reset current ma Threshold current Control voltage level and threshold voltage ma %/V ppm/ C V TH = V-control (3) µa V TH = 11.2 V 250 na V CC = 15 V V CC = 5 V Pin 1, 13 leakage output high na Pin 1, 13 sat output low (4) V CC = 15 V, I = 15 ma V CC = 4.5 V, I = 4.5 ma I SINK = 10 ma I SINK = 50 ma V CC = 15 V Output voltage drop (low) I SINK = 100 ma V I SINK = 200 ma 2.5 V CC = 5 V, I SINK = 5 ma I SOURCE = 200 ma, V CC = 15 V 12.5 Output voltage drop (high) I SOURCE = 100 ma, V CC = 15 V V V CC = 5 V Rise time of output 100 ns Fall time of output 100 ns V V mv Matching characteristics Initial timing accuracy 0.1% 2% ppm/ C Timing drift with temperature See (5) ±10 Drift with supply voltage %/V (1) Supply current when output high typically 1 ma less at V CC = 5 V. (2) Tested at V CC = 5 V and V CC = 15 V. (3) This will determine the maximum value of R A + R B for 15-V operation. The maximum total (R A + R B ) is 20 MΩ. (4) No protection against excessive pin 1, 13 current is necessary providing the package dissipation rating will not be exceeded. (5) Matching characteristics refer to the difference between performance characteristics of each timer section. Copyright , Texas Instruments Incorporated 5

6 LM556 SNAS549A MARCH 2000 REVISED OCTOBER Typical Characteristics Figure 1. Minimum Pulse Width Required for Triggering DS Figure 2. Supply Current vs Supply Voltage (Each Section) Figure 3. High Output Voltage vs Output Source Current Figure 4. Low Output Voltage vs Output Sink Current Figure 5. Low Output Voltage vs Output Sink Current Figure 6. Low Output Voltage vs Output Sink Current 6 Copyright , Texas Instruments Incorporated

7 LM556 SNAS549A MARCH 2000 REVISED OCTOBER 2015 Typical Characteristics (continued) Figure 7. Output Propagation Delay vs Voltage Level of Trigger Pulse DS Figure 8. Output Propagation Delay vs Voltage Level of Trigger Pulse Figure 9. Discharge Transistor (Pin 1, 13) Voltage vs Sink Current DS Figure 10. Discharge Transistor (Pin 1, 13) Voltage vs Sink Current Copyright , Texas Instruments Incorporated 7

8 LM556 SNAS549A MARCH 2000 REVISED OCTOBER Detailed Description 7.1 Overview The LM556 dual-timing circuit is a highly stable device for generating accurate time delays or oscillations. The two timers operate independently from one another, only sharing V CC and ground. For each individual timer, additional terminals are provided for triggering or resetting. In the monostable mode of operation, the time is precisely controlled by one external resistor and capacitor. For astable mode operation as an oscillator, the free running frequency and duty cycle are accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms and the output circuit can source or sink up to 200 ma. 7.2 Functional Block Diagram 7.3 Feature Description Operating Characteristics The LM556 is specified for operation from 4.5 V to 16 V. Many of the specifications apply from 0⁰C to 70⁰C. Parameters that can exhibit significant variance with regard to operating voltage or temperature are presented Electrical Characteristics section and in and Typical Characteristics Timing from Microseconds Through Hours The LM556 has the ability to have timing parameters from the microseconds range to hours. The time delay of the system can be determined by the time constant of the R and C values used for either the monostable or astable configuration. A nomograph is available for easy determination of R and C values for various time delays. 7.4 Device Functional Modes The LM556 can operate in both astable and monostable mode depending on the application requirements Monostable Mode The LM556 timer acts as a one-shot pulse generator. The pulse begins when the LM556 timer receives a signal at the trigger input that falls below 1/3 of the voltage supply. The width of the output pulse is determined by the time constant of an RC network. The output pulse ends when the voltage on the capacitor equals 2/3 of the supply voltage. The output pulse width can be extended or shortened depending on the application by adjusting the R and C values. More details are given in the LM555 datasheet (SNAS548). 8 Copyright , Texas Instruments Incorporated

9 LM556 SNAS549A MARCH 2000 REVISED OCTOBER 2015 Device Functional Modes (continued) Astable (Free-Running) Mode Figure 11. Monostable The LM556 timer can operate as an oscillator and puts out a continuous stream of rectangular pulses having a specified frequency. The frequency of the pulse stream depends on the values of RA, RB, and C. Again, more details are given in the LM555 datasheet (SNAS548). Figure 12. Astable Copyright , Texas Instruments Incorporated 9

10 LM556 SNAS549A MARCH 2000 REVISED OCTOBER Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The LM556 timer can be used in various configurations. A typical application for the LM556 timer in astable mode is to drive an audio device (such as a beeper) to provide a pulsed sound. This simple application can be modified to fit any application requirement. 8.2 Typical Application R2A 4 1 R1A 2 6 LM V out 0.01 µf V in µf 12 9 R1B µf µf 100 µf R2B Figure 13. Typical Application Design Requirements The main design requirements for this application require setting one of the timers (Timer A in this case) to the same resonant frequency as the piezo transducer which can be set by choosing R 1A, R 2A, and C A with Equation 1: 1.44 fo (( R1A 2 R2A ) C) (1) The other design choice is to decide how often and long to produce the bleeping sound. This can be set by choosing R 1B and R 2B of Timer B (acts as the reset button for Timer A) with Equation 2: R2B D = R 1B R 2B (2) Other useful design equations like Equation 3 and Equation 4 are given below where t h represents the time it takes to charge the capacitor of each individual timer and t l represents the time it takes to discharge the capacitor. 10 Copyright , Texas Instruments Incorporated

11 Typical Application (continued) t h= 0.693(R 1+R 2 )C l 2 Output Waveform LM556 SNAS549A MARCH 2000 REVISED OCTOBER 2015 where t h represents the time it takes to charge the capacitor of each individual timer (3) t = 0.693R C where t l represents the time it takes to discharge the capacitor. (4) Detailed Design Procedure Given that the resonant frequency of the piezo transducer is about 3 khz, by choosing R 1, C and using Equation 1, R 2 can be determined to be 23.5 kω. In order to have the sound be audible for half the period, the duty cycle for the triggering timer should be 50%. However, this is difficult to achieve because the recommended minimum value for R 1 is 1 kω. Therefore, a duty cycle of 49% was chosen for this application. By choosing R 1 to be 1 kω and using Equation 2, R 2 is found to be 24.5 kω Application Curve V CC 0 V V CC Capacitor Voltage Waveform 2/3 V CC 1/3 V CC 0 V t h t l T S Figure 14. Capacitor Voltage and Output Waveforms in Astable Mode Copyright , Texas Instruments Incorporated 11

LM556 SNAS549A MARCH 2000 REVISED OCTOBER 2015 9 Power Supply Recommendations The LM556 requires a voltage supply within 4.5 V to 16 V.

12 LM556 SNAS549A MARCH 2000 REVISED OCTOBER Power Supply Recommendations The LM556 requires a voltage supply within 4.5 V to 16 V. Adequate power supply bypassing is necessary to protect associated circuitry. The minimum recommended capacitor value is 0.1 µf in parallel with a 1-µF electrolytic capacitor. Place the bypass capacitors as close as possible to the LM556 and minimize the trace length CAUTION Supply voltages larger than 18 V can permanently damage the device; see the Absolute Maximum Ratings table. 10 Layout 10.1 Layout Guidelines Standard PCB rules apply to routing the LM556. The parallel combination of a 0.1-µF capacitor and a 1-µF electrolytic capacitor should be as close as possible to the LM556. The capacitor used for the time delay should also be placed as close as possible to the discharge pin. A ground plane on the bottom layer can be used to provide better noise immunity and signal integrity Layout Example 2 GND 1: DIS_A 14: VCC 1 VCC 2: THR_A 13: DIS_B 3: CVOLT_A 12: THR_B 4: OUT_B 11: CVOLT_B 5: OUT_A 10: RST_B 6: THR_A 9: OUT_B 7: GND 8: THR_B Figure 15. Layout Example 12 Copyright , Texas Instruments Incorporated

13 LM556 SNAS549A MARCH 2000 REVISED OCTOBER Device and Documentation Support 11.1 Documentation Support Related Documentation For related documentation, see the following: LM555 Timer, SNAS Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates Glossary SLYZ022 TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright , Texas Instruments Incorporated 13

14 PACKAGE OPTION ADDENDUM 27-Sep-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan LM556 MWC LIFEBUY WAFERSALE YS 0 1 Green (RoHS & no Sb/Br) LM556CM/NOPB LIFEBUY SOIC D Green (RoHS & no Sb/Br) LM556CMX/NOPB LIFEBUY SOIC D Green (RoHS & no Sb/Br) LM556CN/NOPB LIFEBUY PDIP NFF Green (RoHS & no Sb/Br) (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp ( C) Device Marking (4/5) Call TI Level-1-NA-UNLIM -40 to 85 CU SN Level-1-260C-UNLIM 0 to 70 LM556CM CU SN Level-1-260C-UNLIM 0 to 70 LM556CM CU SN Level-1-NA-UNLIM 0 to 70 LM556CN Samples

15 PACKAGE MATERIALS INFORMATION 28-Oct-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant LM556CMX/NOPB SOIC D Q1 Pack Materials-Page 1

16 PACKAGE MATERIALS INFORMATION 28-Oct-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM556CMX/NOPB SOIC D Pack Materials-Page 2

18 N0014A MECHANICAL DATA N14A (Rev G)

Features. Applications

Features. Applications LM555 Timer General Description The LM555 is a highly stable device for generating accurate time delays or oscillation. Additional terminals are provided for triggering or resetting if desired. In the