Low Power Carbon Nanotube Chemical Sensor System

Transcription

1 Low Power Carbon Nanotube Chemical Sensor System Taeg Sang Cho, Kyeong-Jae Lee, Jing Kong and Anantha Chandrakasan Massachusetts Institute of Technology CICC September 17 27

2 Outline Introduction Carbon nanotube chemical sensors Sensor interface design Interface chip measurement Chemical sensor system test result Conclusion

3 Motivation for using CNT Sensors NO 2 CNT-FET [Courtesy: A. Recco, J. Kong] Behaves as a resistive chemical sensor High sensitivity at room temperature No need for micro hot-plates NO 2 can be sensed without any functionalization

4 Device Count Measured CNT Characteristics R CNT Distribution Resistance (Ω) - 35 samples Δ R vs. R O (3ppm NO 2 ) Implications for the CMOS backend Wide dynamic range (1kΩ ~ 9MΩ), but only moderate resolution (1%) Sub-ppm NO 2 detection 16 bit dynamic range 6-7 bit resolution Δ R (k Ω) Interface to multiple CNT sensors for increased reliability Access to 24 CNTs R (kω) O Maximum current through a single CNT < 3 μa

5 Previous Sensor Interfaces Make resistive sensor a current source by wrapping an OPAMP to supply a constant voltage across the sensor [Malfatti et al. ISSCC6] Use a resistive DAC and ADC to gain a wide dynamic range [Grassi et al. ESSCIRC 25]

6 Architectural Concept R = D ( V ADC ) V I LSB

7 Architectural Concept R = D( V ) xr ADC RES No need for 16-bit ADC, but can let the adaptive controller determine the operating point of the interface

8 Proposed System Diagram + V headroom =.3V _ DD o o o o o o o o o o

9 Architecture Optimization Why a 1-bit ADC and a 8-bit DAC to attain 18-bit dynamic range? E SYSTEM = P ADC T ADC + P DAC T DAC + E DIGITAL Energy per Conversion (normalized) Energy Per Resistance Conversion Optimum energy can be attained with 11 bits Allocated in the ADC # of Bits Allocated in the ADC Penalty paid for using a 1-bit ADC is 17%

10 DAC Control Scheme DACNO DAC NEXT Only allow I DAC = 2 N I LSB : 4-bit representation of current. Supply the maximum current while meeting the DAC headroom constraint. Resistance can be calculated with register shift operations

11 Current Supplied ( μ A) DAC Control Scheme DAC Current Maximum current < 3 μa Resistance (Ω) Measurement resolution ( Ω) 1 x Measurement resolution accuracy better than 1% mask Resistance (Ω) Proposed control scheme 1% mask

12 DAC Calibration Use off-chip reference resistors to measure how much current is being sourced at each current level A simple multiplication can be used to calibrate the DAC nonlinearity

13 Analog CNT Multiplexer V INADC Boosting Output of Two Types of Boosting Circuit The width of pass gate transistors are made reasonably large, and the voltage is boosted when turned on, to reduce the on-resistance Output Voltage (V) Proposed Boosting Output Conventional Boosting Output time (ms)

14 Prototype Chips CNT sensors fabricated at MTL, RLE (MIT) Prototype fabricated in.18μm CMOS process Digital DAC ADC Controller.77mm 1.2mm Bootstrap Circuit 5 um

15 Performance : DAC Calibration 2 DAC Current Error in Percentage 12 Calibration Word Output Current Error (%) DAC Current Number Before Calibration After Calibration Calibration Word DAC Current Number Current linearity error is kept below 1.2% after calibration

16 Performance : Linearity and Power Resistance Error over the Measurement Range 18 Power as a Function of Sampling Rate Resistance Error (%) Power (μw) Input Resistance Measurement error is kept below 1.34% across the whole dynamic range Sampling Rate (Samples/second) Linear power scaling as sampling rate is reduced Worst case power: 32 μw

17 Comparison of interfaces Readout Resolution Resistance Range Readout Rate Power Consumption η Malfatti et al. [ISSCC6].5% > 5kΩ ~ 1GΩ Not Available 3.1 mw Grassi et al. [ESSCIRC5].14% > 1Ω ~ 2MΩ 1Hz 6 mw Frey et al [JSSC 7].2% > 3kΩ ~ 12MΩ 3kHz ~ 13mW Flammini *.5 % > 1kΩ ~ 1GΩ Depends on resis. 6 mw This work 1.32% > 1kΩ ~ 9MΩ 1.83kHz 32 μw * IEEE Transactions on Instrumentation and Measurement Nov 24 η Excluding micro-hotplate power where applicable

18 Chemical System Testing Chemical System Test Setup.1 A resistance change in CNT due to chemicals is reliably measured ΔR / R ppm 23.3 kω 35.2 kω 18.6 kω kω 34.5 kω 36.1 kω 26.1 kω 15 ppm 3 ppm NO 2 Off Time (sec)

19 Conclusion CNT sensors enable a low power chemical sensor system without micro hotplates The designed interface chip attains a wide dynamic range by automatic control scheme The full chemical sensor system is demonstrated Acknowledgements: Funding provided by MARCO IFC, Samsung Scholarship Foundation, Intel; Chip fabrication provided by National Semiconductor