Overvoltage-Protection Controllers with Status FLAG
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1 ; Rev 0; 2/06 Overvoltage-Protection Controllers with Status General Description The // are overvoltageprotection ICs that protect low-voltage systems against voltages of up to +28V. If the input voltage exceeds the overvoltage trip level, the // turn off the low-cost external n-channel FET(s) to prevent damage to the protected components. An internal charge pump eliminates the need for external capacitors and drives the FET gate for a simple, robust solution. The has a 7.4V overvoltage threshold, and the has a 5.8V overvoltage threshold. The has a 4.7V overvoltage threshold. The / have an undervoltage-lockout (UVLO) threshold of 3.2, while the has a UVLO of 2.. In addition to the single FET configuration, the devices can be configured with back-to-back external FETs to prevent currents from being back-driven into the adapter. On power-up, the device waits for 50ms before driving high. is held low for an additional 50ms after goes high before deasserting. The // have an open-drain output. The output asserts immediately to an overvoltage fault. Additional features include a ±15kV (HBM) ESD-protected input (when bypassed with a 1µF capacitor) and a shutdown pin (EN) to turn off the device. All devices are offered in a small 6-pin SC70 and 6-pin 1.5mm x 1.0mm µdfn packages and are specified over the -40 C to +85 C extended temperature range. Features Overvoltage Protection Up to +28V Preset 7.4V, 5.8V, or 4.7V Overvoltage Trip Level Drives Low-Cost nmos FET Internal 50ms Startup Delay Internal Charge Pump Undervoltage Lockout ±15kV ESD-Protected Input Voltage Fault Indicator 6-Pin SC70 and µdfn Packages Lead Free PART Ordering Information P- PACKAGE TOP MARK PKG CODE EXT+T 6 SC70 ACY X6S-1 ELT+ 6 µdfn KU L611-1 EXT+T 6 SC70 ACZ X6S-1 ELT+ 6 µdfn KV L611-1 EXT+T 6 SC70 ADA X6S-1 ELT+* 6 µdfn KW L611-1 Note: All devices specified for the -40 C to +85 C extended temperature range. *Future product contact factory for availability. +Denotes lead-free package. // Cell Phones Digital Still Cameras PDAs and Palmtop Devices MP3 Players Applications PUT +1.2V TO +28V Typical Operating Circuit NMOS OUTPUT PART UVLO THRESHOLD (V) Selector Guide OV TRIP LEVEL (V) EN PUT OUTPUT Yes Open-Drain Yes Open-Drain Yes Open-Drain 1µF EN GND 4 3 V IO NOTE: EN AND PULLUP RESISTOR Pin Configuration appears at end of data sheet. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at
2 // Overvoltage-Protection Controllers with Status ABSOLUTE MAXIMUM RATGS to GND V to +3 to GND V to +12V EN, to GND V to +6V Continuous Power Dissipation (T A = +70 C) 6-Pin SC70 (derate 3.1mW/ C above +70 C)...245mW 6-Pin µdfn (derate 2.1mW/ C above +70 C)...477mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Operating Temperature Range C to +85 C Junction Temperature C Storage Temperature Range C to +150 C Lead Temperature (soldering, 10s) C (V = + (/), V = +4V (), T A = -40 C to +85 C, unless otherwise noted. Typical values are at T A = +25 C.) (Note 1) PARAMETER SYMBOL CONDITIONS M TYP MAX UNITS Input Voltage Range V V Undervoltage-Lockout Threshold UVLO V falling / Undervoltage-Lockout Hysteresis 50 mv Overvoltage Trip Level Overvoltage Trip Level Hysteresis OVLO V rising V rising V rising Supply Current I No load, EN = GND or, V = (/) No load, EN = GND or 4., V = 4V () V = 2.9V (/) 30 UVLO Supply Current I UVLO V = 2.2V () 22 V V mv µa µa / 9 10 Voltage V I sourcing 1µA V Pulldown Current I PD V > V OVLO, V = ma Output Low Voltage V OL asserted 1.2V V < UVLO, I SK = 50µA V OVLO, I SK = 1mA Output High Leakage I OH V = 5., deasserted 1 µa EN Input High Voltage V IH 1.5 V EN Input Low Voltage V IL 0.4 V EN Input Leakage I LKG EN = GND or 5. 1 µa V 2
3 Status ELECTRICAL CHARACTERISTICS (continued) (V = + (/), V = +4V (), T A = -40 C to +85 C, unless otherwise noted. Typical values are at T A = +25 C.) (Note 1) TIMG PARAMETER SYMBOL CONDITIONS M TYP MAX UNITS Startup Delay t START V > V UVLO, V > 0.3V, Figure ms Blanking Time t BLANK V > 0.3V, V > 2.4V, Figure ms Turn-On Time t GON V GA TE = 0.3V to 6V ( M AX 4842A), V GA TE = 0.3V to 8V ( M AX 4838A/M AX 4840A), C GA TE = 1500p F, Fi g ur e 1 Turn-Off Time t GOFF (/), V increasing from 4V to 6V at 3V/µs (), V increasing from to 8V at 3V/µs V = 0.3V, C = 1500pF, Figure 2 Assertion Delay t (/), V increasing from 4V to 6V at 3V/µs (), V increasing from to 8V at 3V/µs V = 0.4V, Figure 2 Initial Overvoltage Fault Delay t OVP (/), V increasing from to 6V (), I = 80% of V increasing from 0 to 8V I PD, Figure 3 10 ms 6 20 µs 5.8 µs 1.5 µs Disable Time t DIS V EN = 2.4V, V GA TE = 0.3V, Fi g ur e 4 2 µs Note 1: All parts are 100% tested at +25 C. Electrical limits across the full temperature range are guaranteed by design and correlation. // Typical Operating Characteristics (V = + (/), V = +4V (); Si9936DY external MOSFET in back-to-back configuration; T A = +25 C, unless otherwise noted.) SUPPLY CURRENT (µa) SUPPLY CURRENT vs. PUT VOLTAGE toc01 REVERSE CURRENT (µa) REVERSE CURRENT vs. OUTPUT VOLTAGE SGLE MOSFET BACK-TO-BACK MOSFETS toc02 VOLTAGE (V) / VOLTAGE vs. PUT VOLTAGE toc PUT VOLTAGE (V) OUTPUT VOLTAGE (V) PUT VOLTAGE (V) 3
4 // Overvoltage-Protection Controllers with Status Typical Operating Characteristics (continued) (V = + (/), V = +4V (); Si9936DY external MOSFET in back-to-back configuration; T A = +25 C, unless otherwise noted.) VOLTAGE (V) VOLTAGE vs. PUT VOLTAGE PUT VOLTAGE (V) 1 1A 0A R OUT = 5Ω / POWER-UP RESPONSE 20ms/div toc07 toc04 I VOLTAGE (V) VOLTAGE vs. PUT VOLTAGE V 8V 4V 4V PUT VOLTAGE (V) POWER-UP RESPONSE 20ms/div I = 0 I = 4µA I = 8µA toc08 R OUT = C OUT = 0 toc05 OUT 1 4V 8V 800mA 0A 4V R OUT = C OUT = 0 / POWER-UP RESPONSE 20ms/div POWER-UP RESPONSE 20ms/div toc06 toc09 R OUT = 5Ω OUT I OVERVOLTAGE RESPONSE toc10 POWER-UP OVERVOLTAGE RESPONSE toc11 POWER-DOWN RESPONSE toc12 8V 1 40mA 8V PULLED UP TO WITH 100Ω 1 R LOAD = 50Ω R = 100kΩ TO + 0A C = 1500pF 400ns/div I 50mA 0A 1µs/div I 10ms/div OUT 4
5 V Overvoltage-Protection Controllers with Status P NAME FUNCTION V V 1 Input. is both the power-supply input and the overvoltage sense input. Bypass to GND with a 1µF capacitor or larger. 2 GND Ground N.C. 6 EN ( ) V UVLO t START 0.3V Pin Description Fault Indication Output, Open-Drain, Active Low. is asserted low during undervoltagelockout and overvoltage-lockout conditions. is deasserted during normal operation. Gate-Drive Output. is the output of an on-chip charge pump. When V UVLO < V < V OVLO, is driven high to turn on the external n-channel MOSFET(s). No Connection. Not internally connected for µdfn package. Connected to ground for SC70 6-pin package; connect to ground or leave unconnected. Device Enable Input, Active Low. Drive EN low or connect to ground to allow normal device operation. Drive EN high to turn off the external MOSFET. t GON (4V) 8V (6V) t BLANK 2.4V V (4V) V V ( ) V OVLO t GOFF 0.3V Timing Diagrams t 0.4V 8V (6V) // Figure 1. Startup Timing Diagram Figure 2. Shutdown Timing Diagram V V OVLO 8V (6V) V EN 1. I ( ) t OVP 80% V t DIS 0.3V Figure 3. Power-Up Overvoltage Timing Diagram Figure 4. Disable Timing Diagram 5
6 Status // Figure 5. Functional Diagram Detailed Description The // provide up to +28V overvoltage protection for low-voltage systems. When the input voltage exceeds the overvoltage trip level, the // turn off a low-cost external n-channel FET(s) to prevent damage to the protected components. An internal charge pump (Figure 5) drives the FET gate for a simple, robust solution. Undervoltage Lockout (UVLO) The / have a fixed 3.2 typical undervoltage-lockout level (UVLO) while the has a 2. typical UVLO. When V is less than the UVLO, the driver is held low and is asserted. Overvoltage Lockout (OVLO) The has a 7.4V typical overvoltage threshold (OVLO), and the has a 5.8V typical overvoltage threshold. The has a 4.7V typical overvoltage threshold. When V is greater than OVLO, the driver is held low and is asserted. Output The output is used to signal the host system there is a fault with the input voltage. asserts immediately to an overvoltage fault. is held low for 50ms after turns on before deasserting. All devices have an open-drain output. Connect a pullup resistor from to the logic I/O voltage of the host system. EN Enable Input EN is an active-low enable input. Drive EN low or connect to ground to enable normal device operation. Drive EN high to force the external MOSFET(s) off. EN does not override an OVLO or UVLO fault. GND EN 5. REGULATOR UVLO AND OVLO DETECTOR 2x CHARGE PUMP CONTROL LOGIC AND TIMER DRIVER Driver An on-chip charge pump is used to drive above, allowing the use of low-cost n-channel MOSFETS. The charge pump operates from the internal 5. regulator. The actual output voltage tracks approximately two times V until V exceeds 5. or the OVLO trip level is exceeded, whichever comes first. The has a 7.4V typical OVLO; therefore remains relatively constant at approximately 10. for 5. < V < 7.4V. The has a 5.8V typical OVLO, but this can be as low as 5.. The in practice may never actually achieve the full 10. output. The has a 4.7V (typ) OVLO, and the output voltage is 2x the input voltage. The output voltage as a function of input voltage is shown in the Typical Operating Characteristics. Device Operation The // have an onboard state machine to control device operation. A flowchart is shown in Figure 6. On initial power-up, if V < UVLO or if V > OVLO, is held at, and is low. If UVLO < V < OVLO and EN is low, the device enters startup after a 50ms internal delay. The internal charge pump is enabled, and begins to be driven above V by the internal charge pump. is held low during startup until the blanking period expires, typically 50ms after the starts going high. At this point the device is in its on state. At any time if V drops below UVLO, is driven low and is driven to ground. 6
7 Status V < UVLO Figure 6. State Diagram STANDBY = 0 = LOW TIMER STARTS COUNTG t = 50ms OVLO CHECK = 0 = LOW V > UVLO V < OVLO STARTUP DRIVEN HIGH = LOW t = 50ms ON HIGH = HIGH V > OVLO Applications Information MOSFET Configuration The // can be used with either a single MOSFET configuration as shown in the Typical Operating Circuit, or can be configured with a back-to-back MOSFET as shown in Figure 7. The back-to-back configuration has almost zero reverse current when the input supply is below the output. If reverse current leakage is not a concern, a single MOSFET can be used. This approach has half the loss of the back-to-back configuration when used with similar MOSFET types, and is a lower cost solution. Note that if the input is actually pulled low, the output is pulled low as well due to the parasitic body diode in the MOSFET. If this is a concern, then the back-to-back configuration should be used. MOSFET Selection The // are designed for use with either a single n-channel MOSFET or dual backto-back n-channel MOSFETs. In most situations, MOSFETs with R DS(ON) specified for a V GS of 4. work well. If the input supply is near the UVLO maximum of PUT 0 TO 28V 1µF EN GND 3., consider using a MOSFET specified for a lower V GS voltage. Also, the V DS should be 3 for the MOS- FET to withstand the full 28V range of all devices. Table 1 shows a selection of MOSFETs appropriate for use with the //. Bypass Considerations For most applications, bypass to GND with a 1µF ceramic capacitor. If the power source has significant inductance due to long lead length, take care to prevent overshoots due to the LC tank circuit and provide protection if necessary to prevent exceeding the 3 absolute maximum rating on. The // provide protection against voltage faults up to 28V, but this does not include negative voltages. If negative voltages are a concern, connect a Schottky diode from to GND to clamp negative input voltages. ESD Test Conditions ESD performance depends on a number of conditions. The // are specified for ±15kV typical ESD resistance on when is bypassed to ground with a 1µF ceramic capacitor. Contact Maxim for a reliability report that documents test setup, methodology, and results. Human Body Model Figure 8 shows the Human Body Model, and Figure 9 shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of interest, which is then discharged into the device through a 1.5kΩ resistor. 4 3 NMOS V IO OUTPUT NOTE: EN AND PULLUP RESISTOR ON / / ONLY. Figure 7. Back-to-Back External MOSFET Configuration // 7
8 Status // Table 1. MOSFET Suggestions PART CONFIGURATION/ PACKAGE V DS MAX (V) IEC Since January 1996, all equipment manufactured and/or sold in the European community has been required to meet the stringent IEC specification. The IEC standard covers ESD testing and performance of finished equipment; it does not specifically refer to integrated circuits. The // help users design equipment that meets Level 3 of IEC , without additional ESD-protection components. The main difference between tests done using the Human Body Model and IEC is higher peak current in IEC Because series resistance is lower in the IEC ESD test model (Figure 10), R ON AT 4. (mω) Si5902DC Dual/ Si1426DH Single/SC FDC6305N Dual/SSOT FDC6561AN Dual/ SSOT FDG315N Single/SC Vishay Silconix MANUFACTURER Fairchild Semiconductor the ESD-withstand voltage measured to this standard is generally lower than that measured using the Human Body Model. Figure 11 shows the current waveform for the ±8kV IEC Level 4 ESD Contact Discharge test. The Air-Gap test involves approaching the device with a charger probe. The Contact Discharge method connects the probe to the device before the probe is energized. R C 1MΩ CHARGE-CURRENT- LIMIT RESISTOR R D 1.5kΩ DISCHARGE RESISTANCE I P 100% 90% Ir PEAK-TO-PEAK RGG (NOT DRAWN TO SCALE) HIGH- VOLTAGE DC SOURCE Cs 100pF STORAGE CAPACITOR DEVICE UNDER TEST AMPERES 36.8% 10% 0 0 t RL TIME t DL CURRENT WAVEFORM Figure 8. Human Body ESD Test Model Figure 9. Human Body Model Current Waveform 8
9 Status HIGH- VOLTAGE DC SOURCE TOP VIEW R C 50Ω to 100Ω CHARGE-CURRENT- LIMIT RESISTOR Cs 150pF GND 1 6 EN 2 + R D 330Ω DISCHARGE RESISTANCE STORAGE CAPACITOR Figure 10. IEC ESD Test Model N.C. DEVICE UNDER TEST Pin Configurations IPEAK I 100% 90% 10% tr = 0.7ns to 1ns t 30ns 60ns Figure 11. IEC ESD Generator Current PROCESS: BiCMOS Chip Information // SC70 TOP VIEW EN GND 2 5 N.C. 3 4 µdfn 9
10 // Overvoltage-Protection Controllers with Status Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to TABLE 1 Translation Table for Calendar Year Code Calendar Year L UDFN.EPS Legend: Marked with bar Blank space - no bar required TABLE 2 Translation Table for Payweek Binary Coding Payweek Legend: Marked with bar Blank space - no bar required -DRAWG NOT TO SCALE- TITLE: PACKAGE OUTLE, 6L udfn, 1.5x1.0x0.8mm D 2 APPROVAL DOCUMENT CONTROL NO. REV. 10
11 Status Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to SC70, 6L.EPS // PACKAGE OUTLE, 6L SC C 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
Overvoltage Protection Controllers with Status FLAG
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19-3128; Rev 2; 3/8 Dual, 3mm x 3mm, 1.2A/Programmable-Current General Description The are dual, current-limited switches with autoreset for USB applications. Autoreset latches the switch off if it is
More informationOUTPUT UP TO 300mA C2 TOP VIEW FAULT- DETECT OUTPUT. Maxim Integrated Products 1
19-1422; Rev 2; 1/1 Low-Dropout, 3mA General Description The MAX886 low-noise, low-dropout linear regulator operates from a 2.5 to 6.5 input and is guaranteed to deliver 3mA. Typical output noise for this
More informationDual-Output Step-Down and LCD Step-Up Power Supply for PDAs
19-2248; Rev 2; 5/11 EVALUATI KIT AVAILABLE Dual-Output Step-Down and LCD Step-Up General Description The dual power supply contains a step-down and step-up DC-DC converter in a small 12-pin TQFN package
More informationPART MAX4887ETE +5V R0 G0 B0 R1 G1 B1 MAX4887 R2 G2 B2 SEL EN QP GND. Maxim Integrated Products 1
19-3972; Rev ; 2/6 Triple Video Switch General Description The triple, high-frequency switch is intended for notebooks and monitors to permit RGB signals to be switched from one driver to one of two loads
More informationMANUAL RESET (MR) (RESET)/ RESET RESET MAX16084 MAX16085 MAX16086 GND. Maxim Integrated Products 1
19-5903; Rev 0; 6/11 General Description The family of supervisory circuits monitors voltages from +1.1V to +5V using a factory-set reset threshold. The MAX16084/MAX16085/MAX16086 offer a manual reset
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19-1654; Rev 3; 1/12 Low-Dropout, Low I Q, 1A Linear Regulator General Description The low-dropout linear regulator (LDO) operates from +2.5 to +5.5 and delivers a guaranteed 1A load current with a low
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19-2575; Rev 0; 10/02 One-to-Four LVCMOS-to-LVPECL General Description The low-skew, low-jitter, clock and data driver distributes one of two single-ended LVCMOS inputs to four differential LVPECL outputs.
More informationV CC 2.7V TO 5.5V. Maxim Integrated Products 1
19-3491; Rev 1; 3/07 Silicon Oscillator with Reset Output General Description The silicon oscillator replaces ceramic resonators, crystals, and crystal-oscillator modules as the clock source for microcontrollers
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19-2625; Rev 2; 12/05 Ultra-Low-oltage µp Reset Circuits and General Description The microprocessor (µp) supervisory circuits monitor ultra-low-voltage power supplies in µp and digital systems. They provide
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19-3495; Rev ; 11/4 High-oltage, Low-Power Linear Regulators for General Description The are micropower, 8-pin TDFN linear regulators that supply always-on, keep-alive power to CMOS RAM, real-time clocks
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9-600; Rev ; 6/00 General Description The is a buck/boost regulating charge pump that generates a regulated output voltage from a single lithium-ion (Li+) cell, or two or three NiMH or alkaline cells for
More informationLow Input/Output Voltage Step-Up DC-DC Converter with RESET
19-3086; Rev 2; 10/06 EVALUATION KIT AVAILABLE Low Input/Output Voltage General Description The is a compact, high-efficiency, step-up DC- DC converter that regulates output voltages from 1.8V to 3.3V
More informationLow-Voltage, 1.8kHz PWM Output Temperature Sensors
19-266; Rev 1; 1/3 Low-Voltage, 1.8kHz PWM Output Temperature General Description The are high-accuracy, low-power temperature sensors with a single-wire output. The convert the ambient temperature into
More informationUltra-Small, Adjustable Sequencing/ Supervisory Circuits
General Description The MAX6895 MAX6899 is a family of small, lowpower, voltage-monitoring circuits with sequencing capability. These miniature devices offer tremendous flexibility with an adjustable threshold
More informationHigh-Efficiency, 40V Step-Up Converters for 2 to 10 White LEDs MAX1553/MAX1554
19-2875; Rev 1; 12/03 EVALUATION KIT AVAILABLE High-Efficiency, 40V Step-Up General Description The drive white LEDs in series with a constant current to provide efficient display backlighting in cellular
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19-1756; Rev 3; 12/05 Quad Voltage µp Supervisory Circuit General Description The is a precision quad voltage monitor with microprocessor (µp) supervisory reset timing. The device can monitor up to four
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19-1803; Rev 3; 3/09 Single/Dual LVDS Line Receivers with General Description The single/dual low-voltage differential signaling (LVDS) receivers are designed for highspeed applications requiring minimum
More informationLow-Cost, Micropower, High-Side Current-Sense Amplifier + Comparator + Reference ICs
9-63; Rev ; /3 Low-Cost, Micropower, High-Side Current-Sense General Description The low-cost, micropower, high-side current-sense supervisors contain a highside current-sense amplifier, bandgap reference,
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9-234; Rev ; 2/7 Four-Channel Thermistor Temperature-to-Pulse- General Description The four-channel thermistor temperature-topulse-width converter measures the temperatures of up to four thermistors and
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General Description The MAX3053 interfaces between the control area network (CAN) protocol controller and the physical wires of the bus lines in a CAN. It is primarily intended for industrial systems requiring
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19-2324; Rev 2; 12/05 Low-oltage, High-Accuracy, Triple/Quad General Description The precision triple/quad voltage microprocessor (µp) supervisory circuits monitor up to four system-supply voltages and
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19-563; Rev 1; 11/6 Low-Voltage, Dual SPDT, Audio Clickless General Description The MAX4744/MAX4744H/MAX4745/MAX4745H/ dual SPDT (single-pole/double-throw) audio switches feature negative signal capability
More informationHigh-Efficiency, 36V Step-Up Converters with T A Derating Option for 2 to 9 White LEDs
19-3485; Rev 2; 7/6 EVALUATION KIT AVAILABLE High-Efficiency, 36V Step-Up Converters General Description The drive up to nine white LEDs with constant current and high efficiency to provide LCD backlighting
More informationHigh-Accuracy, 76V, High-Side Current Monitors in SOT23 MAX4007/MAX4008. Features
19-2743; Rev 3; 4/07 High-Accuracy, 76V, High-Side General Description The precision, high-side, high-voltage current monitors are specifically designed for monitoring photodiode current in fiber applications.
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GENERAL DESCRIPTION The SGM4064 is a charger front-end integrated circuit designed to provide protection to Li-ion batteries from failures of the charging circuitry. The IC continuously monitors the input
More informationHigh-Voltage, 3-Channel Linear High-Brightness LED Driver with Open LED Detection
EVALUATION KIT AVAILABLE General Description The three-channel LED driver operates from a 5.5V to 40V input voltage range and delivers up to 100mA per channel to one or more strings of highbrightness (HB
More information±50V Isolated, 3.0V to 5.5V, 250kbps, 2 Tx/2 Rx, RS-232 Transceiver MAX3250
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More information500mA, Low-Voltage Linear Regulator in Tiny QFN
19-2599; Rev ; 1/2 5mA, Low-Voltage Linear Regulator General Description The low-dropout linear regulator operates from a 2.25V to 5.5V supply and delivers a guaranteed 5mA load current with low 175mV
More information2MHz, High-Brightness LED Drivers with Integrated MOSFET and High-Side Current Sense
19-414; Rev 1; 9/8 EVALUATION KIT AVAILABLE 2MHz, High-Brightness LED Drivers with General Description The step-down constant-current high-brightness LED (HB LED) drivers provide a cost-effective design
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19-2911 Rev 3; 8/6 EVALUATION KIT AVAILABLE EEPROM-Programmable TFT Calibrator General Description The is a programmable -adjustment solution for thin-film transistor (TFT) liquid-crystal displays (LCDs).
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19-2418; Rev ; 4/2 Quad, Rail-to-Rail, Fault-Protected, General Description The are quad, single-pole/single-throw (SPST), fault-protected analog switches. They are pin compatible with the industry-standard
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19-2336; Rev 2; 12/05 Low-Power, Single/Dual-Voltage µp Reset Circuits General Description The low-power microprocessor supervisor circuits monitor system voltages from 1.6V to 5V. These devices are designed
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19-1263; Rev 0; 7/97 350mA, 16.5V Input, General Description The linear regulators maximize battery life by combining ultra-low supply currents and low dropout voltages. They feature Dual Mode operation,
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19-0782; Rev 1; 6/08 LED Light Management IC in General Description The light management IC integrates a 400mA (guaranteed) PWM DC-DC step-up converter, a 320mA white LED camera flash current sink, and
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19-1774; Rev ; 7/ EVALUATION KIT AVAILABLE High-Frequency, Regulated, General Description The inverting charge pump delivers a regulated negative output voltage at loads of up to 2. The device operates
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