Title. Description. Date 16 th August, Revision 1.1 RD W Telecoms DC/DC PSU Input : 37Vdc to 60Vdc Output : 32V/10A

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1 Title Description RD W Telecoms DC/DC PSU Input : 37Vdc to 60Vdc Output : 32V/10A Date 16 th August, 2007 Revision 1.1

2 RD W Push-Pull Converter August 16, 2007 Contents 1 Introduction Specification Schematic Bill of Materials Custom Magnetics Design Push-Pull Transformer Transformer Electrical Diagram Output Inductor Inductor Electrical Diagram Design Analysis PCB Layout Measurement Results Performance Measurements Conversion Efficiency Operating Waveforms Primary FET Waveforms Start-up Behavior Load Transient Response Output Voltage Ripple Control Loop Characterisation Thermal Measurements Appendix A Modifications for tighter output tolerance Enhanced Regulation Performance Revision History RD008 - Full Report.doc Page 2 of 23

3 1 Introduction This report describes the design of a 320W Telecoms DC/DC converter. A push-pull forward converter running with current mode control using the LM5030 from National Semiconductor delivers high performance and small solution size. Custom planar magnetics from Payton have been used throughout to reduce component build height, increase efficiency and aid cooling. This report contains target specification, schematic, bill of materials, magnetics design information as well as a detailed design analysis. A full set of performance measurements is also included taken from the prototype unit shown in Figure 1. Measurements include conversion efficiency, power stage device temperature rise, line/load regulation, start-up behaviour, transient load response and loop gain/phase characteristic. Figure 1-320W Push-Pull Forward Converter (Reverse side heatsink not shown). Unit measures 150mm x 70mm with maximum component height of 10mm. RD008 - Full Report.doc Page 3 of 23

4 2 Specification Description Symbol Min Typ Max Units Comments Input Voltage V in V DC Outputs Output Voltage 1 V OUT V +/-5% Output Current 1 I OUT A 10A continuous Output Ripple Voltage 1 V RIPPLE1 1 V Maximum Continuous P Output Power out 320 W Efficiency n 90 % Target Efficiency Figure 2 - Converter Specifications RD008 - Full Report.doc Page 4 of 23

5 3 Schematic Figure 3 - Push-Pull DC/DC Converter Schematic RD008 - Full Report.doc Page 5 of 23

6 4 Bill of Materials The bill of materials for this design is shown in Figure 4 below. This BOM excludes the PCB, fixing bolts, insulating material, aluminium interface plate and external heatsink. Type Reference Quantity Description Manufacturer Manufacturer Part Number C4, C nF, 100V, X7R KEMET C1206F104K1RAC C nF, 50V, X7R AVX 08055C104KAZ2A C nF, 1kV, X7R AVX 1210AC103KAT1A C17, C18, C19, C20, C21, C22, C23, C24, 10 1uF, 100V, X7R AVX 22201C105KAT1A C25, C26 Capacitors C3, C6 2 1uF, 16V, X5R Epcos B37641K9105K62 C5, C uF, 50V, X7R Kemet C1210C225K5RAC C pF, 50V, X7R Phycomp C nF, 16V, X7R Phycomp C13, C pF, 200V, COG AVX 08052A471JAT2A C7 1 47nF, 50V, X7R AVX W2H15C4738AT1A C11, C uF, 50V BC Components Connectors J9, J Way 22A Connector Phoenix Contact D1, D4, D5, D V, 100mA Diode Fairchild BAS19V Diodes International D2, D3 2 16A, 200V Diode Rectifier MURB1620CT L uH, 18A Inductor Coilcraft SER ML Magnetics CS :1 CS Pulse PA T1 1 Custom (Planar) Payton L1 1 Custom Inductor Payton R2, R10, R15 3 0R, 0.125W, 5%, 0805 Phycomp R1, R4 2 10k, 0.125W, 1% Phycomp R6, R7, R8, R R, 0.125W, 1% Phycomp R19, R R, 1W, 5% Tyco RJT R14 1 1k, 0.125W, 1% Phycomp Resistors R R, 0.125W, 1% Phycomp R9 1 2k, 0.125W, 1% Phycomp R11 1 4k7, 0.125W, 1% Phycomp R17 1 4R7, 0.125W, 1% Phycomp R k, 0.125W, 1% Phycomp R16 1 6R8, 0.125W, 1% Phycomp Q1, Q V, 60A, 0.034R International Rectifier IRFSL52N15D National U V Shunt Regulator Semiconductors Semiconductor LM431 U1 1 Current Mode Push Pull National Controller Semiconductor LM5030SD U3 1 Opto 50% to 150% CTR Toshiba TLP181 Figure 4 BOM list for 320W DC/DC Converter RD008 - Full Report.doc Page 6 of 23

7 5 Custom Magnetics Design Custom planar magnetics were used in this design for the main power transformer and output inductor. Planar technology provides for a low build height, excellent electrical performance and also allows for effective thermal management. Payton were used to provide these parts and this section gives the details on the transformer and inductor. 5.1 Push-Pull Transformer The push-pull transformer has two primary windings and two secondary windings. Figure 5 below shows the Payton part. Figure 5-320W Planar Push-Pull Transformer (Measures Approximately 40mm x 33mm x 12mm high) Transformer Electrical Diagram Figure 6 - Transformer Electrical Diagram RD008 - Full Report.doc Page 7 of 23

8 The transformer is designed to operate at 250kHz and has the electrical characteristics as shown in Figure 7 below. Parameter Value Units Winding Resistance (Pins 1-5) 3.7 mω Winding Resistance (Pins 7-9) 3.7 mω Winding Inductance (Pins 1-5) 190 µh Winding Inductance (Pins 7-9) 190 µh Leakage Inductance (Pins 1-5 with Pins µh Shorted) Interwinding Capacitance (Pins 3 to 8) 150 pf Breakdown Voltage (Pins 1-7) Minimum V 1000 Breakdown Voltage to Core (Pins 1+7 to Core) Minimum 500 V 5.2 Output Inductor Figure 7 - Transformer Electrical Parameters The high combined duty cycle of the push-pull topology allows for a small output inductance when compared to the standard single ended forward converter. A 5µH inductance was specified which results in a physically small inductor. Figure 8 shows the planar inductor which also includes an auxiliary winding to provide a bias supply for the LM5030 control IC. Figure 8-5µH Planar Inductor (Measures Approximately 24mm x 20mm x 9mm high) RD008 - Full Report.doc Page 8 of 23

9 5.2.1 Inductor Electrical Diagram The electrical diagram of the output inductor with auxiliary winding is shown in Figure 9 below. Figure 9 - Inductor Electrical Diagram The main output inductance is provided between pins 2 and 6. The auxiliary winding steps the output voltage of 32V down by a factor of 3 to drive around 10V into the LM5030 to provide power for it during normal operation. The output inductor will be subject to a signal at twice the converter operating frequency due to the push-pull action of the power stage. This gives a 500kHz effective operting frequency for the inductor. The electrical parameters for the output inductor are given in Figure 10 below. Parameter Value Units L1 Resistance (Pins 2-6) 5 mω L2 Resistance (Pins 9-12) 5 mω L1 Inductance (Pins 2-6) µh L1 Inductance with DC bias (Pins 9-12, 16.7Adc) 4.25 min µh Breakdown Voltage (Pins 2-9) Minimum V 1000 Breakdown Voltage to Core (Pins 2+9 to Core) Minimum 500 V Figure 10 - Inductor Electrical Parameters RD008 - Full Report.doc Page 9 of 23

10 6 Design Analysis The design uses a push-pull forward converter running at 250kHz to allow for small magnetics and high conversion efficiency. The push-pull configuration results in an effective output frequency of 500kHz and high effective duty cycle to allow for minimal output inductance and capacitance. Figure 11 below gives the general operating parameters for the converter running at full power with 37Vdc, 48Vdc and 60Vdc input. Minimum Nominal Maximum Vin V DC Input Voltage Vout 32 V DC Output Voltage Iout 10 A DC Output Current Fs 250 khz Power Stage Switching Frequency Vd 0.5 V Output Diode Conduction Drop Vds 0.3 V Primary Switch Conduction Drop Lout 5 uh Output Inductance Lr ohms Inductor DC Resistance Rdson 0.03 ohms Primary MOSFET On State Resistance Transformer Design Parameters Ns 3 Number of Secondary Turns Np 3 Number of Primary Turns Lp 85 uh Magnetising Inductance General Operating Parameters Po 320 W Output Power D 44.2% 33.9% 27.0% Operating Duty Cycle (Per Switch) Ir Apk-pk Inductor Ripple Current Imag Apk-pk Primary Magnetisation Current Tf us Diode Freewheel Time Ton us Primary FET on-time Output Inductor Operating Parameters Ir Apk-pk Inductor Ripple Current Ip Apk Inductor Peak Current Irms Arms Inductor RMS Current Pcond W Inductor Copper Loss Primary FET Operating Parameters (Parameters per FET) Irip Apk-pk Reflected Ripple Current Ip Apk Peak MOSFET Current Irms Arms MOSFET RMS Current Pcond W MOSFET Conduction Loss Vds V Peak drain-source voltage Output Diode Operating Parameters (Parameters per diode) Idave A Output Diode Average Current Idpk Apk Output Diode Peak Current Pcond W Output Diode Conduction Losses Vrr V Peak Diode Reverse Voltage Figure 11 - Design Operating Analysis at Full Power RD008 - Full Report.doc Page 10 of 23

11 7 PCB Layout The PCB was realised with 2 layers of 2oz copper with all components surface mount on the top side of the PCB. Use of 2oz copper reduces conduction losses in the PCB tracks as well as providing better heat transfer to keep components cool. Figure 12 Top Side Silk Screen Figure 13 - Top Copper Figure 14 Bottom Copper RD008 - Full Report.doc Page 11 of 23

12 8 Measurement Results Measurements were taken from a prototype unit mounted on a 1.1 C/W heatsink with natural convection cooling. 8.1 Performance Measurements Conversion Efficiency Efficiency was measured as a function of output power for 48Vdc input. Figure 15 below shows the resulting efficiency profile Conversion Efficiency (%) Output Power (W) Figure 15 - Conversion Efficiency as a Function of Output Power at 48Vdc Input Conversion efficiency remains very high over the full range of input voltages. Peak efficiency is in excess of 92%. Conversion efficiency was also measured as a function of input voltage with full load on the output (32V/10A). Figure 16 shows the resulting efficiency profile. RD008 - Full Report.doc Page 12 of 23

13 Efficiency (%) Input Voltage (Vdc) Figure 16 Conversion Efficiency as a Function of Input Voltage at Full Load 32V/10A Efficiency drops a little under high line conditions and this will be due to the lower operating duty cycle of the power stage leading to higher RMS currents. Efficiency is still well in excess of 90% under all conditions at full output power. RD008 - Full Report.doc Page 13 of 23

14 8.2 Operating Waveforms 8.3 Primary FET Waveforms The plots in this section show the drain-source voltage and sensed primary winding current for 36, 48 and 60Vdc input. Figure 17, Figure 18 and Figure 19 show the waveforms with 10A load current. Figure 17 36Vdc Input and 10A Load. Q1 Drain-Source Voltage (CH1 at 50V/div) and Sensed Primary Current (CH2 at an effective 7.2A/div). Timebase is 1us/div. Figure 18 48Vdc Input and 10A Load. Q1 Drain-Source Voltage (CH1 at 50V/div) and Sensed Primary Current (CH2 at an effective 7.2A/div). Timebase is 1us/div. RD008 - Full Report.doc Page 14 of 23

15 Figure 19 60Vdc Input and 10A Load. Q1 Drain-Source Voltage (CH1 at 50V/div) and Sensed Primary Current (CH2 at an effective 7.2A/div). Timebase is 1us/div. The drain-source voltage and sensed primary current were also measured at 48Vdc input with the peak load of 13A. Figure 20 shows the waveforms for this case. Figure 20 48Vdc Input at 13A Load. Q1 Drain-Source Voltage (CH1 at 50V/div) and Sensed Primary Current (CH2 at an effective 7.2A/div). Timebase is 1us/div. RD008 - Full Report.doc Page 15 of 23

16 8.4 Start-up Behavior Start-up behavior was measured with 48V input and a 3Ω resistive load on the output. Figure 21 below shows the output voltage rise profile and the drain-source voltage measured on Q2 just after input voltage is applied. Figure 21 Start-Up behavior with 48Vdc input. Output Voltage (CH1 at 10V/div) shows a monotonic rise with zero overshoot whilst Q1 Drain-Source Voltage (CH2 at 50V/div) shows safe operating voltage levels during start-up due to soft-start behavior. RD008 - Full Report.doc Page 16 of 23

17 8.5 Load Transient Response Load transient response was measured with 48Vdc by stepping the output load current from 6.5A to 13A in 10µs. Figure 22 below shows the response of the output voltage to this step load change. Figure 22 Load transient response at 48Vdc input. Output voltage (CH1 at 1V/div) and output current (CH2 at 5A/div) with a timebase of 1ms/div. The step load test from 50% to 100% load shows that the control loop is well damped as expected. Peak overshoot/undershoot is less than 1V which allows the +32V output rail to remain within its 5% regulation window during aggressive load step changes. RD008 - Full Report.doc Page 17 of 23

18 8.6 Output Voltage Ripple The output voltage noise and ripple was measured at 10A load with 37V, 48V and 60Vdc inputs. Output ripple is measured as 200mV pk-pk, 400mV pk-pk and 600mV pk-pk for input voltages of 37Vdc, 48Vdc and 60Vdc respectively. Figure 23 - Output Voltage Ripple (CH2, AC-Coupled at 200mV/div) with 37Vdc input and 10A Load Figure 24 - Output Voltage Ripple (CH2, AC-Coupled at 200mV/div) with 48Vdc input and 10A Load RD008 - Full Report.doc Page 18 of 23

19 Figure 25 - Output Voltage Ripple (CH2, AC-Coupled at 200mV/div) with 60Vdc input and 10A Load RD008 - Full Report.doc Page 19 of 23

20 8.7 Control Loop Characterisation The loop gain and phase were measured at 48V input with full load on the output. Figure 26 below shows the resulting loop performance. Gain (db) Phase Margin (Deg) Frequency (Hz) Gain Phase Figure 26 - Measured Loop Gain and Phase with 48Vdc input and 32V/10A Resistive Load The cross-over frequency of 20kHz will give excellent load and line transient response. Current mode control results in a phase margin in excess of 100 which will result in a well damped recovery from transient conditions. RD008 - Full Report.doc Page 20 of 23

21 8.8 Thermal Measurements The operating temperature of key power stage components was measured as a function of output power with 48Vdc input. The PCB was mounted vertically on a 1.1 C/W heatsink with a local lab ambient of 24 C. Cooling was provided by natural convection. Figure 27 below shows the resulting temperature profiles. Temperature (Deg C) Output Power (W) Q1 Q2 T1 U1 D2 C11 L1 Heatsink D3 Ambient Figure 27 - Component Temperature Rise as a Function of Output Power at 48Vdc Input Component temperature was also measured as a function of input voltage at full power 32V/10A. Figure 28 shows the temperature profile. Temperatures (Deg C) Input Voltage (Vdc) Q1 Q2 T1 U1 D2 C11 L1 Heatsink D3 Ambient Figure 28 - Component Temperature Rise as a Function of Input Voltage at Full Load. RD008 - Full Report.doc Page 21 of 23

22 9 Appendix A Modifications for tighter output tolerance In order to increase the accuracy of the output 32V rail, 0.1% feedback resistors and a 0.5% accurate LM431CIM reference were used in the circuit as shown in Figure 29 below. Figure 29 Revised Feedback Section to give Tight Output Tolerance The component changes were made as per Figure 29 and the regulation measured again. 9.1 Enhanced Regulation Performance The input voltage was set to 48Vdc and the output current varied from 0 to 10A. Figure 30 below shows the load regulation is within 0.2% of nominal voltage which corresponds to a variation of +/-60mV. Regulation (% of Nominal) Output Current (A) Figure 30 Enhanced Regulation Accuracy RD008 - Full Report.doc Page 22 of 23

23 10 Revision History Date Revision Author Details 8 th June, Iain Mosely First Draft 13 th July, Iain Mosely Higher tolerance feedback resistors and reference used. Regulation measurements retaken RD008 - Full Report.doc Page 23 of 23

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