4. The circuit provides rail-torail outputs at X and Y in response to the polarity of Vin1- Vin2.

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1 A ircui for All Seasons Behzad Razavi The SrongARM Lach TThe SrongARM lach opology finds wide usage as a sense amplifier a comparaor or simply a robus lach wih high sensiiviy. The erm SrongARM commemoraes he use of his circui in Digial Equipmen orporaion s SrongARM microprocessor [1] bu he basic srucure was originally inroduced by Toshiba s Kobayashi e al. [2]. The SrongARM lach has become popular for hree reasons: 1) i consumes zero saic power 2) i direcly produces rail-orail oupus and 3) is inpu-referred offse arises from primarily one differenial pair. In his column we sudy he circui and is properies. Basic Operaion Figure 1 shows he original Srong- ARM lach repored in [2] wihou M8 and in [1] wih M8. The circui Digial Objec Idenifier /MSS Dae of publicaion: 25 June 2015 was laer modified as depiced in Figure 1 [3]. We firs sudy he laer and hen poin ou he differences among hese versions. The lach of Figure 1 consiss of a clocked differenial pair M 2 wo cross-coupled pairs M4 and M 5 M 6 and four precharge swiches S 1 S 4. The circui provides rail-orail oupus a and in response o he polariy of Vin1- Vin2. We describe he operaion in four phases. In he firs phase is low; M1 and M2 are off; nodes and are precharged o VDD ; and he circui reduces o ha shown in Figure 2. In he second phase goes high S 1 S4 urn off and M1 and M2 urn on drawing a differenial curren in proporion o Vin1- Vin2. Wih M6 iniially off his curren flows from and [Figure 2] hereby allowing V- V o grow and possibly exceed Vin1- Vin2. Tha is his phase can provide volage gain. We call his phase he amplificaion mode. Since he ail curren is fairly consan during his period we can wrie V-V. ( gm12 Vin1- Vin2 / ) where g m1 2 denoes he small-signal ransconducance of M1 and M2 and = =. As V and V fall o VDD - VTH N he cross-coupled NMOS ransisors urn on (hird phase) allowing par of he drain currens of M1 and M2 o flow from and [Figure 2(c)]. The amplificaion mode herefore lass for approximaely ( / IM) VTHN seconds where IM is he commonmode (M) curren drawn from each capaciance. The volage gain in his mode is roughly given by [4] gm1 2VTHN Av.. (1) IM The behavior of he lach in he hird phase can be analyzed wih he aid of he equivalen circui shown M 5 M 6 M 5 M 6 V ou S 1 S 3 S 4 S 2 V ou M4 M 8 M V 1 in2 Figure 1: The original and modified SrongARM lach opologies. 12 spring 2015 IEEE SOLID-STATE IRUITS MAGAZINE

2 V V M T V THN V V V V + I I (c) (d) M 5 M 6 V V ou V V V THN V (e) Figure 2: Lach operaion phases: precharge amplificaion (c) urn-on of cross-coupled NMOS pair (d) equivalen circui of (c) and (e) urn-on of cross-coupled MOS pair. in Figure 2(d) where + DI and - DI represen he differenial curren produced by M1 and M2. Summing currens a he four nodes yields dv - = gm3( V - V) d (2) dv - = gm4( V - V) d (3) dv dv - = + DI d d (4) dv dv - = - DI. d d (5) We subrac he second equaion from he firs obaining dv ( - V) - dt = gm34 (- V + V - V+ V). (6) Inegraing boh sides of (4) and (5) and combining he resuls we have ( V- V) = ( V- V) + 2DI (7) which upon subsiuion in (6) gives dv ( - V) d -gm34 c1 - m ( V - V) (8) =-2g D I m34. If g m3 4 is assumed relaively consan his equaion reveals a naural response of he form exp(/ x reg) where x reg is he regeneraion ime consan and expressed as x reg = g ( 1 / ). (9) m34 - IEEE SOLID-STATE IRUITS MAGAZINE spring

3 M 5 M 6 M 6 Ineresingly he degeneraion caused by and raises x reg by a facor of 1 - /. Since in pracice includes he inpu capaciance of he sage following he comparaor and is hence greaer han he cross-coupled NMOS ransisors provide lile regeneraion in his phase. The oupu volages V and V coninue o fall unil hey reach VDD - VTH a which poin M5 and M6 urn on [Figure 1(e)] and he circui eners he fourh phase. The posiive feedback around hese ransisors evenually brings one oupu back o VDD while allowing he oher o fall o zero. M M V 2 in1 1 Figure 3: Lach wihou ac cross-coupled NMOS pair and he resuling saic curren. SrongARM Lach RS Lach Figure 4: The SrongARM lach followed by he RS lach. Figure 5: Offse cancellaion by programmable capaciors. I is imporan o appreciae he role of each ransisor in he SrongARM lach of Figure 1. Besides M2 and M7 he remaining devices also serve criical purposes. Transisors M4 cu off he dc pah beween VDD and ground a he end of he fourh phase avoiding saic power drain. To undersand his poin le us omi M3 and M4 as shown in Figure 3 and assume a differenial inpu Vin1- Vin2 of abou 100 mv around a common-mode (M) level near VDD / 2. When he lach is clocked V falls V rises and M5 urns off. onsequenly he circui reduces o ha in Figure 3 drawing a saic curren from VDD. (This does no occur for rail-o-rail inpus.) Transisors M5 and M6 principally resore he oupu high level o VDD ; wihou hem he M discharge a or would yield a degraded high level (if Vin1- Vin2 is small). Swiches S1 and S2 play wo roles: a) remove he previous saes a nodes and suppressing dynamic offses and b) esablish an iniial volage of VDD a hese nodes allowing amplificaion before M1 and M2 ener he riode region. Boh of hese poins disinguish he opology of Figure 1 from ha in Figure 1. The original Srong- ARM lach fails o equalize V and V accuraely because M8 urns off near he end of he precharge mode. Wihou M8 he dynamic offse would prove even more serious. Moreover he circui has lile volage gain in he amplificaion mode for V and V begin a VDD - VTHN. Since in his case M3 and M4 urn on before significan gain accrues hey conribue a greaer offse. Swiches S3 and S4 precharge and o VDD ensuring ha M5 and M6 remain off during he iniial amplificaion and negligibly raise he offse. The SrongARM lach generaes invalid oupus ^V = V = VDDh for abou half of he clock cycle. For he subsequen logic o inerpre he oupus correcly an RS lach mus follow he circui. Figure 4 shows a ypical arrangemen where inverers serve as buffers beween he wo laches and allow he RS lach o oggle only if V or V falls. The power consumed by he Srong- ARM lach of Figure 1 arises from primarily he charge and discharge of he capaciances. I is herefore roughly 2 equal o f( 2 + ) VDD where f is he clock frequency and he facor of 2 accouns for he discharge of boh and o near ground in every cycle. Offse If operaing as a sense amplifier or a comparaor he SrongARM lach mus achieve a sufficienly small inpureferred offse volage. As explained in he previous secion he precharge acion of S1 S4 in Figure 1 keeps M 6 off iniially hereby reducing heir offse conribuion. In a ypical design he mismaches beween M3 and M4 are divided by abou a facor of Av. 4 when referred o he inpu and hose beween M5 and M6 by abou a facor of en (because hese ransisors urn on only near he end). Thus M1 and M2 become he dominan conribuors. Since he amplificaion mode provides volage gain by he flow of charge from and one can creae asymmery by making! and hence cancel he circui s offse. Illusraed in Figure 5 [5] [4] he idea is o esablish differen discharge raes a and. Wriing 14 spring 2015 IEEE SOLID-STATE IRUITS MAGAZINE

4 he drain curren of each ransisor as he sum of a componen proporional o Vin1- Vin2 and a M componen IM we have gm1( Vin1-Vin2) IM V = VDD (10) gm2( V 1-V 2) I V = VDD I follows ha in in M. (11) V S + V ou V ou V ou V ou robabiliy of Zeros robabiliy of Zeros f (x) f (x) robabiliy of Ones 0 x robabiliy of Ones gm12 + V- V=- ( - ) I M. (12) We observe ha during amplificaion V- V accumulaes an offse equal o ( - )/( ) IM which can cancel he lach s random offse. The amplificaion mode ends roughly when V and V fall below VDD - VTHN and is duraion is given by. VTHN( + )/( 2IM) where ( + )/ 2 is used as an approximaion. The buil-in offse is herefore equal o VTH N( / - / )/ 2. To perform offse cancellaion he main inpus are shored ogeher he circui is clocked and he oupu decision drives a regiser ha conrols he values of and [5] [4]. Of course o reduce he offse from a high value (e.g. 30 mv) o a low value (e.g. 1 mv) a large number of small uni capaciors mus be aached o and degrading he speed and raising he power dissipaion. Anoher offse cancellaion mehod for he SrongARM lach is described in [6]. Elecronic Noise From he foregoing offse sudies we can predic ha he precharge acion of S1 S4 in Figure 1 also reduces he elecronic noise conribued by M 6. Mos of he inpu-referred noise originaes from M1 and M2 and he kt/ noise deposied by S1 and S2 because he oher ransisors come ino play only afer significan gain has accrued. In he amplificaion mode he equivalen circui of Figure 2 behaves as an inegraor generaing oupu noise from he noise of M1 and M2. The variance of his volage (a quaniy akin o he mean square value) grows wih ime as [4] [7] [8] 2 8kTcgm12 EV ( ) = 2. (13) Since he amplificaion mode lass abou ( / IM) VTHN seconds we compue he final oupu noise variance due o M1 and M2 in his mode as v 8kTc gm VTHN =. (14) IM Adding he kt/ noise conribued by S1 and S2 dividing he resul by he square of he volage gain and wriing gm1 2. 2IM/( VGS - VTHN) 12 we obain he oal (inegraed) inpu-referred noise observed in his mode as V ( VGS - VTHN) = VTHN 4kTc ( VGS -VTHN) 12 $ ; + kt E. VTHN 2 (15) 2 12 n in The firs erm wihin he square brackes represens he noise due o M1 and M2 and is ypically four o eigh imes greaer han he second. Oher sources of noise are quanified in [4]. While no specific o he Srong- ARM lach he simulaion of noise in comparaors poses ineresing issues. Unlike small-signal analog circuis a comparaor does no direcly provide V S 0 x Figure 6: The behavior of noisy comparaor wih a zero and finie inpu differences. an oupu noise and a gain by which he noise should be divided. For simpler opologies one can place he comparaor in a measable condiion and perform a small-signal analysis bu he SrongARM lach complees swiching acions and noise injecions even before he oupu begins o change. A mehodical simulaion proceeds as follows. Suppose a comparaor wih a zero offse and a zero differenial inpu is clocked many imes (we assume he simulaor includes noise in ransien simulaions). Then he Gaussian noise wihin he circui allows evenual recovery from measabiliy producing ones and zeros a he oupu wih equal probabiliies [Figure 6]. In he nex sep we apply a small differenial inpu (a few millivols) as shown in Figure 6 and repea he simulaion. Since VS skews he comparaor decisions he ones and zeros occur wih unequal probabiliies; zeros appear only if he inpu-referred noise is more negaive han - VS. GD1 GS1GD7 M2 GD2 GS2 Figure 7: Kickback noise pahs. IEEE SOLID-STATE IRUITS MAGAZINE spring

5 M 5 M 6 A V ou M 8 B A A B B V M 2 V Figure 8: An alernaive opology for lower kickback noise and behavior in he precharge mode. For a large number of clock cycles herefore we predic ha he number of zeros a he oupu n0 is proporional o he area under he Gaussian probabiliy disribuion funcion f ( x) from - 3 o - VS; he number of ones n1 is proporional o he area from - VS o + 3. Based on he numbers observed in he simulaions we can wrie # -Vs # -3 f ( x) dx n Vs = f ( x) dx n 0 1 (16) and hence compue he variance of f ( x) which corresponds o he inpu-referred noise volage squared. The value of VS mus be chosen large enough o ensure n0/ n1 subsanially depars from uniy bu no so large ha n0 or n1 is excessively small and saisically insignifican. Kickback and Supply Transiens The SrongARM lach draws high ransien currens from he inpus and he supply. These ransiens become roublesome if a large number of comparaors operae in parallel as in a flash analog-o-digial converer. The kickback currens drawn from he inpus sem from several mechanisms (Figure 7) exhibiing boh differenial and M componens. The former appear mosly as V and V fall oward ground a unequal raes and couple o he inpus hrough 1 GD and GD 2. This effec becomes more pronounced as M1 and M2 ener he riode region and heir gae-drain capaciances increase. The M kickback noise currens are much greaer and occur when M7 urns on iniially drawing is drain curren from GS 1 and GS 2 and when i urns off wih coupling hrough GD7(. GS7) o GS 1 and GS 2. The SrongARM lach draws high ransien currens from he inpus and he supply. I is possible o reduce he kickback noise by clocking he inpu devices hrough heir drain pah raher han heir source pah. Depiced in Figure 8 [9] such a opology incorporaes M7 and M8 o conrol he lach. However he kickback noise is lowered a he cos of a higher inpu offse because M1 and M2 now operae in he riode region during he amplificaion mode. This issue can be avoided by making M3-M4 and M7-M8 wide; bu as illusraed in Figure 8 he slow discharge a A or B in he precharge mode leads o significan imbalance beween V and V and hence a large dynamic offse. The supply ransien currens originae from he precharge acion of S1 -S4 in Figure 1. If falls fas hree of S1 -S4 momenarily ener he sauraion region (he fourh one is in he riode region because is drain volage is equal o VDD ) and pull a large curren from VDD. The key poin here is ha designs consuming a low average power may sill draw high peak currens from he supply dicaing a low supply impedance. uesions for he Reader 1) Do V and V in Figure 1 reach 0 V a he end of he regeneraion phase? 2) Explain why M3 and M4 in Figure 1 can be omied if he inpus have rail-o-rail swings. 3) Explain why he coupling hrough GD 7 in Figure 7 is less on he rising edge of han on he falling edge of. ou can share your houghs wih me by sending an o razavi@ ee.ucla.edu. Answers o Las Issue s uesions 1) an we use a negaive impedance converer (NI) in a A predriver o cancel he inpu capaciance of he oupu sage? Since an RF predriver ypically uses a resonan load he NI would cause oscillaion. If injecion-locking is desired in his sage a simple cross-coupled pair suffices. 16 spring 2015 IEEE SOLID-STATE IRUITS MAGAZINE

6 V b R L V b Figure 9: A cross-coupled pair using bulk erminals. 2) How does he hermal noise conribued by M1 and M2 in Figure 9 o Vou compare o ha by a regular? This circui produces a noise volage across RL equal o 2 gmrl/ ( 2 - gmbrlvn) where Vn denoes he gae-referred noise of each ransisor and he noise of RL is negleced. For a regular cross-coupled pair he oupu noise is given by 2 gmrl / ( 2 - gmrlvn). For a fair comparison he oal resisance seen a he oupu mus be he same for he wo opologies hus yielding he same oupu noise. References [1] J. Monanaro R. Wiek K. Anne and A. Black A 160-MHz 32-b 0.5-W MOS RIS microprocessor IEEE J. Solid- Sae ircuis vol. 31 pp Nov [2] T. Kobayashi K. Nogami T. Shiroori and. Fujimoo A curren-mode lach sense amplifier and a saic power saving inpu buffer for low-power archiecure in roc. VLSI ircuis Symp. Dig. Technical apers June 1992 pp [3]. T. Wang and B. Razavi An 8-bi 150-MHz MOS A/D converer IEEE J. Solid-Sae ircuis vol. 35 pp Mar [4]. Nuzzo F. De Bernardinis. Terreni and G. Van der las Noise analysis of regeneraive comparaors for reconfigurable AD archiecures IEEE Trans. ircuis Sys. I vol. 55 pp July [5] M. J. E. Lee W. J. dally and. hiang Low-power area-efficien high-speed I/O circui echniques IEEE J. Solid-Sae ircuis vol. 35 pp Nov [6] M. oshiyoka K. Ishikawa T. Takayama and S. Tsukomao A 10-b 50-MS/s 820- uw SAR AD wih on-chip digial calibraion IEEE Trans. Biomed. ircuis Sys. vol. 4 pp Dec [7] S.W. hiang and B. Razavi A 10-bi 800-MHz 19-mW MOS AD IEEE J. Solid-Sae ircuis vol. 49 pp Apr [8] T. Sepke. Holloway G. Sodini and H. S. Lee Noise analysis of comparaor-based circuis IEEE Trans. ircuis Sys. I vol. 56 pp Mar [9] R. J. Baker MOS ircui Design Layou and Simulaion. Wiley: Hoboken NJ: Wiley Give Sudens The Tools They Need To Succeed Suppor he IEEE Elecron Devices Mission Fund of he IEEE Foundaion. IEEE Foundaion Learn More a hp://bi.ly/ieee-eds-missionfund IEEE SOLID-STATE IRUITS MAGAZINE spring