5.5-9GHz Integrated Down Converter. GaAs Monolithic Microwave IC in SMD leadless package

Transcription

1 CHR7-QDG Description.-9GHz Integrated Down Converter GaAs Monolithic Microwave IC in SMD leadless package The CHR7-QDG is a multifunction monolithic receiver, which integrates a balanced cold FET mixer, a LO buffer, and a RF low noise amplifier. It is designed for a wide range of applications, from military to commercial communication systems. The circuit is manufactured with a phemt process,.µm gate length, via holes through the substrate, air bridges and electron beam gate lithography. It is supplied in RoHS compliant SMD package. Main Features Broadband RF performances:.-9ghz db Conversion Gain.7dB Noise Figure dbm Input IP DC bias: Vd = ma L-QFNx MSL Conversion Gain & Noise Figure (db) Conversion Gain & Noise Figure versus RF IF = GHz (LSB mode) UMS R7 YYWW Conversion Gain NF,,, 7 7,, 9 9,, Frequency (GHz) Main Electrical Characteristics Tamb.= + C Symbol Parameter Min Typ Max Unit F RF RF Frequency. 9. GHz F IF IF frequency DC. GHz G Conversion gain db NF Noise Figure.7. db Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice United Monolithic Semiconductors S.A.S.

2 CHR7-QDG.-9GHz Integrated Down Converter Electrical Characteristics Tamb. = + C, VD = VD = VD = +.V () Symbol Parameter Min Typ Max Unit F RF RF Frequency range. 9. GHz F LO LO frequency range.. GHz F IF IF frequency range DC. GHz G Conversion gain () db NF Noise Figure.7. db Im_rej Image rejection () dbc P LO LO Input power dbm IIP Input IP dbm LO RL LO return loss db RF RL RF return loss db VDx DC drain voltage V VG st stage LNA DC gate voltage -. V VG nd stage LNA DC gate voltage -. V VG LO buffer DC gate voltage -. V VG Mixer DC gate voltage - V Id Total drain current (ID+ID+ID) () 7 ma These values are representative of onboard measurements as defined on the drawing in paragraph "Evaluation mother board". () VD: st stage LNA drain bias voltage. VD: nd stage LNA drain bias voltage. () VD: LO-chain drain bias voltage. () An external combiner 9 is required on I / Q. () ID: st stage LNA drain current, typically 7mA, should be tuned with VG. () ID: nd stage LNA drain current, typically ma, should be tuned with VG. () ID: LO-chain drain current, typically ma, should be tuned with VG. Electrostatic discharge sensitive device observe handling precautions! Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice

3 .-9GHz Integrated Down Converter CHR7-QDG Absolute Maximum Ratings () Tamb.= + C Symbol Parameter Values Unit VD Drain bias voltage. V Id Drain bias current ma VG,VG st stage LNA gate bias voltages - to +. V VG LO buffer gate bias voltage - to +. V VG Mixer gate bias voltage - to +. V P_RF Maximum peak input power overdrive () + dbm P_LO Maximum LO input power + dbm Tj Junction temperature 7 C Ta Operating temperature range - to + C Tstg Storage temperature range - to + C () Operation of this device above anyone of these parameters may cause permanent damage. () Duration < s. Typical Bias Conditions Tamb.= + C Symbol Pad N o Parameter Values Unit VDx,, DC drain voltages. V Id,, Total drain current ma VG st stage LNA DC gate voltage -. V VG nd stage LNA DC gate voltage -. V VG 9 LO buffer DC gate voltage -. V VG 7 Mixer DC gate voltage -. V Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice

4 CHR7-QDG.-9GHz Integrated Down Converter Device thermal performances All the figures given in this section are obtained assuming that the QFN device is cooled down only by conduction through the package thermal pad (no convection mode considered). The temperature is monitored at the package back-side interface (Tcase) as shown below. The system maximum temperature must be adjusted in order to guarantee that Tcase remains below the maximum value specified in the next table. So, the system PCB must be designed to comply with this requirement. A derating must be applied on the dissipated power if the Tcase temperature cannot be maintained below the maximum temperature specified (see the curve Pdiss. Max) in order to guarantee the nominal device life time (MTTF). Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice

5 .-9GHz Integrated Down Converter CHR7-QDG Typical Board Measurements Tamb. = + C, VD = VD = VD = +V, VG = -.V, VG = -.V, VG = -.V, VG = -V, P_LO = +dbm These values are representative of onboard measurements as defined on the drawing in paragraph "Evaluation mother board". Data are given in the package access planes. Conversion Gain (db) Conversion Gain versus RF & LO power at IF = GHz (USB mode) P_LO = 7dBm P_LO = dbm P_LO = dbm P_LO = dbm,, 7 7,, 9 9, RF Frequency (GHz) Conversion Gain versus IF frequency at LO = GHz (USB & LSB modes) Conversion Gain (db) LSB USB,,, IF Frequency (GHz) Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice

6 CHR7-QDG.-9GHz Integrated Down Converter Typical Board Measurements Tamb. = + C, P_LO = +dbm VD = VD = VD = +V and VG = -.V, VG = -.V, VG = -.V, VG = -V Noise Figure versus RF frequency at IF = GHz (USB & LSB modes),, Noise Figure (db),,,, USB INF,,, 7 7,, 9 9,, Frequency (GHz) Input IP versus LO power at RF = 7.GHz & IF = GHz (USB mode) 9 7 Input IP (dbm) P_LO = 7dBm P_LO = dbm P_LO = dbm - P_LO = dbm Input Power DCL (dbm) Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice

7 .-9GHz Integrated Down Converter CHR7-QDG Typical Board Measurements Tamb. = + C, P_LO = +dbm VD = VD = VD = +V and VG = -.V, VG = -.V, VG = -.V, VG = -V Image Rejection versus IF at LO = GHz (USB & LSB modes) Image Rejection (dbc) LSB USB,,, IF Frequency (GHz) Return Losses (LO & RF) versus frequency RF Return Loss (db) LO RF Frequency (GHz) Ref. : DSCHR7QDG - Nov 7/ Specifications subject to change without notice

8 CHR7-QDG.-9GHz Integrated Down Converter Typical Board Measurements Tamb. = + C, P_LO = +dbm VD = VD = VD = +V and VG = -.V, VG = -.V, VG = -.V, VG = -V Input IP (dbm) Input IP vs RF frequency at IF = GHz (LSB mode ma) RF =.GHz RF = 7GHz RF =.GHz Input Power DCL (dbm) Input IP (dbm) Input IP vs RF frequency & DC Biasing, at IF = GHz (LSB mode RF = -dbm per Tone) ma ma 9 ma -,, 7 7,, 9 Frequency (GHz) Input IP (dbm) Input IP vs RF frequency at IF = GHz (USB mode ma) RF =.GHz RF = 7GHz RF =.GHz Input Power DCL (dbm) Input IP vs RF frequency & DC Biasing, at IF = GHz (USB mode RF = -dbm per Tone) Input IP (dbm) ma ma 9 ma -,, 7 7,, 9 Frequency (GHz) Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice

9 .-9GHz Integrated Down Converter CHR7-QDG Typical Board Measurements Tamb. = + C, P_LO = +dbm VD = VD = VD = +V and VG = -.V, VG = -.V, VG = -.V, VG = -V Conversion Gain (db) , Conversion Gain versus temperature at IF = GHz (LSB mode) - C + C + C,,, 7 7,, 9 9,, RF Frequency (GHz) Noise Figure versus temperature at IF = GHz (LSB mode) + C + C - C Noise Figure (db),,,,,, 7 7,, 9 9,, Frequency (GHz) Ref. : DSCHR7QDG - Nov 9/ Specifications subject to change without notice

10 CHR7-QDG.-9GHz Integrated Down Converter Typical Board Measurements Tamb. = + C, P_LO = +dbm VD = VD = VD = +V and VG = -.V, VG = -.V, VG = -.V, VG = -V Input IP (dbm) Input IP vs temperature at IF = GHz (LSB mode RF = -dbm per Tone) C + C + C -,, 7 7,, 9 Frequency (GHz) IMD (dbm) IMD vs temperature at IF = GHz (LSB mode RF = 7GHz) C + C + C Input Power DCL (dbm) Input IP (dbm) Input IP vs temperature at IF = GHz (USB mode RF = -dbm per Tone) C + C + C -,, 7 7,, 9 Frequency (GHz) IMD (dbc) IMD vs temperature at IF = GHz (USB mode RF = 7GHz) C + C + C Input Power DCL (dbm) Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice

11 .-9GHz Integrated Down Converter CHR7-QDG Typical Board Measurements Tamb. = + C, P_LO = +dbm VD = VD = VD = +V and VG = -.V, VG = -.V, VG = -.V, VG = -V Spurious on IF outputs RF = LO + IF P_RF = / P_LO = 7.GHz nlo mrf xx >9 >9 >9 >9 >9 >9 >9 >9 All values in dbc below IF power level (IF = GHz). Data measured without external hybrid coupler. Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice

12 CHR7-QDG.-9GHz Integrated Down Converter Package outline () Matt tin, Lead Free (Green) - Nc 9- RF in 7- VG Units : mm - IF_Q - Gnd () - VD From the standard : JEDEC MO- - Gnd () - Nc 9- VG (VGGD) - Gnd () - VG - Nc - GND - IF_I - VD - Gnd () - Nc - VG - LO in 7- Nc - VD - Gnd () - Gnd () - Nc - Nc () The package outline drawing included to this data-sheet is given for indication. Refer to the application note AN7 ( for exact package dimensions. () It is strongly recommended to ground all pins marked Gnd through the PCB board. Ensure that the PCB board is designed to provide the best possible ground to the package. Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice

13 .-9GHz Integrated Down Converter CHR7-QDG Definition of the Sij reference planes The reference planes used for Sij measurements given above are symmetrical from the symmetrical axis of the package (see drawing beside). The input and output reference planes are located at.mm offset (input wise and output wise respectively) from this axis. Then, the given Sij parameters incorporate the land pattern of the evaluation motherboard recommended in paragraph "Evaluation mother board"... ESD sensitivity Standard JESD-C JS-- Package Information Parameter Package body material Lead finish MSL Rating Value CDM Class III HBM Class A Value RoHS-compliant Low stress Injection Molded Plastic % matte tin (Sn) MSL Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice

14 CHR7-QDG.-9GHz Integrated Down Converter Evaluation mother board Compatible with the proposed footprint. Based on typically Ro / mils or equivalent. Using a micro-strip to coplanar transition to access the package. Recommended for implementation of this product on a module board. Decoupling capacitors of pf ±% and nf ±% are recommended for all DC accesses. See application note AN7 for details. Hybrid coupler 9 for -GHz. Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice

15 .-9GHz Integrated Down Converter CHR7-QDG Notes 9 NC VD IF_Q 7 VG GND NC GND VD IF_I VG NC VD 7 9 NC GND RF IN GND NC VG NC GND LO IN GND NC VG ESD protections are implemented on gate DC bias accesses. The DC connections do not include any decoupling capacitor in package, therefore it is mandatory to provide a good external DC decoupling (pf + nf) on the PC board, as close as possible to the package. Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice

16 CHR7-QDG.-9GHz Integrated Down Converter DC Schematic LNA: V, ma VD = V VD = V Ω 9.mA 7mA 9.mA ma Ω k Ω k Ω 7 Ω k Ω VG # -.V VG # -.V x x LO Buffer: V, ma VD = V 9mA 9.mA 9.mA 9mA 7 Ω kω x VG # -.V Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice

17 .-9GHz Integrated Down Converter Notes CHR7-QDG Ref. : DSCHR7QDG - Nov 7/ Specifications subject to change without notice

18 CHR7-QDG.-9GHz Integrated Down Converter Recommended package footprint Refer to the application note AN7 available at for package foot print recommendations. SMD mounting procedure For the mounting process standard techniques involving solder paste and a suitable reflow process can be used. For further details, see application note AN7. Recommended environmental management UMS products are compliant with the regulation in particular with the directives RoHS N / and REACh N 97/. More environmental data are available in the application note AN9 also available at Recommended ESD management Refer to the application note AN available at for ESD sensitivity and handling recommendations for the UMS package products. Ordering Information QFN x package: CHR7-QDG/XY Stick: XY = Tape & reel: XY = Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use as critical components in life support devices or systems without express written approval from United Monolithic Semiconductors S.A.S. Ref. : DSCHR7QDG - Nov / Specifications subject to change without notice