FGH20N6S2D / FGP20N6S2D / FGB20N6S2D

Size: px

Start display at page:

Download "FGH20N6S2D / FGP20N6S2D / FGB20N6S2D"

Rebecca Hood
6 years ago
Views:

1 FGHNSD / FGPNSD / FGBNSD V, SMPS II Series N-Channel IGBT with Anti-Parallel Stealth TM Diode General Description The FGHNSD FGPNSD, FGBNSD are Low Gate Charge, Low Plateau Voltage SMPS II IGBTs combining the fast switching speed of the SMPS IGBTs along with lower gate charge, plateau voltage and high avalanche capability (UIS). These LGC devices shorten delay times, and reduce the power requirement of the gate drive. These devices are ideally suited for high voltage switched mode power supply applications where low conduction loss, fast switching times and UIS capability are essential. SMPS II LGC devices have been specially designed for: Power Factor Correction (PFC) circuits Full bridge topologies Half bridge topologies Push-Pull circuits Uninterruptible power supplies Zero voltage and zero current switching circuits IGBT (co-pack) formerly Developmental Type TA933 (Diode formerly Developmental Type TA99) Package TO-7 E C Features 1kHz Operation at 39V, 7A khz Operation at 39V, A V Switching SOA Capability July Typical Fall Time ns at TJ = o C Low Gate Charge nC at V GE = 1V Low Plateau Voltage V Typical UIS Rated mJ Low Conduction Loss Low E on Soft Recovery Diode Symbol C FGHNSD / FGPNSD / FGBNSD G TO-AB E C G TO-3AB G Device Maximum Ratings T C = C unless otherwise noted G E COLLECTOR (FLANGE) E Symbol Parameter Ratings Units BV CES Collector to Emitter Breakdown Voltage V I C Collector Current Continuous, T C = C A I C11 Collector Current Continuous, T C = 11 C 13 A I CM Collector Current Pulsed (Note 1) A V GES Gate to Emitter Voltage Continuous ± V V GEM Gate to Emitter Voltage Pulsed ±3 V SSOA Switching Safe Operating Area at T J = 1 C, Figure 3A at V A E AS Pulsed Avalanche Energy, I CE = 7.A, L = mh, V DD = V 1 mj P D Power Dissipation Total T C = C W Power Dissipation Derating T C > C 1. W/ C T J Operating Junction Temperature Range - to 1 C T STG Storage Junction Temperature Range - to 1 C CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. Pulse width limited by maximum junction temperature. Fairchild Semiconductor Corporation FGHNSD / FGPNSD / FGBNSD Rev. A1

2 Package Marking and Ordering Information Device Marking Device Package Tape Width Quantity NSD FGHNSD TO-7 N/A 3 NSD FGPNSD TO-AB N/A NSD FGBNSD TO-3AB N/A NSD FGBNSDT TO-3AB mm units Electrical Characteristics T J = C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off State Characteristics BV CES Collector to Emitter Breakdown Voltage I C = µa, V GE = - - V I CES Collector to Emitter Leakage Current V CE = V T J = C - - µa T J = C - -. ma I GES Gate to Emitter Leakage Current V GE = ± V - - ± na On State Characteristics V CE(SAT) Collector to Emitter Saturation Voltage I C = 7.A, T J = C -..7 V V GE = 1V T J = C V V EC Diode Forward Voltage I EC = 7.A V Dynamic Characteristics Q G(ON) Gate Charge I C = 7.A, V GE = 1V nc V CE = 3V V GE = V - 3 nc V GE(TH) Gate to Emitter Threshold Voltage I C = µa, V CE = V V V GEP Gate to Emitter Plateau Voltage I C = 7.A, V CE = 3V -.. V Switching Characteristics SSOA Switching SOA T J = 1 C, R G = Ω, V GE = A 1V, L =.mh V CE = V t d(on)i Current Turn-On Delay Time IGBT and Diode at T J = C, ns t ri Current Rise Time I CE = 7A, -. - ns V CE = 39V, t d(off)i Current Turn-Off Delay Time ns V GE = 1V, t fi Current Fall Time - - ns R G = Ω E ON1 Turn-On Energy (Note 1) L =.mh - - µj E ON Turn-On Energy (Note 1) Test Circuit - Figure - - µj E OFF Turn-Off Energy (Note ) - 7 µj t d(on)i Current Turn-On Delay Time IGBT and Diode at T J = C ns t ri Current Rise Time I CE = 7A, -. - ns t V CE = 39V, d(off)i Current Turn-Off Delay Time - 1 ns V GE = 1V, t fi Current Fall Time - 1 ns R G = Ω E ON1 Turn-On Energy (Note 1) L =.mh - - µj E ON Turn-On Energy (Note 1) Test Circuit - Figure - 1 µj E OFF Turn-Off Energy (Note ) µj t rr Diode Reverse Recovery Time I EC = 7A, di EC /dt = A/µs - 31 ns I EC = 1A, di EC /dt = A/µs - ns Thermal Characteristics R θjc Thermal Resistance Junction-Case IGBT C/W Diode. C/W FGHNSD / FGPNSD / FGBNSD NOTE: 1. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. E ON1 is the turn-on loss of the IGBT only. E ON is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same T J as the IGBT. The diode type is specified in figure.. Turn-Off Energy Loss (E OFF ) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (I CE = A). All devices were tested per JEDEC Standard No. -1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. Fairchild Semiconductor Corporation FGHNSD / FGPNSD / FGBNSD Rev. A1

3 Typical Performance Curves I CE, DC COLLECTOR CURRENT (A) f MAX, OPERATING FREQUENCY (khz) T C, CASE TEMPERATURE ( o C) V GE = 1V Figure 1. DC Collector Current vs Case Temperature 1 V GE = 1V f MAX1 =. / (t d(off)i + t d(on)i ) f MAX = (P D - P C ) / (E ON + E OFF ) P C = CONDUCTION DISSIPATION (DUTY FACTOR = %) R ØJC =.7 o C/W, SEE NOTES V GE = 1V T J = o C, R G = Ω, L = µh, V CE = 39V 1 T C = 7 o C T J = 1 o C, R G = Ω, V GE = 1V, L = µh Figure. Minimum Switching Safe Operating Area t SC, SHORT CIRCUIT WITHSTAND TIME (µs) 1 V CE = 39V, R G = Ω, T J = o C 1 1 t SC 1 I SC I SC, PEAK SHORT CIRCUIT CURRENT (A) FGHNSD / FGPNSD / FGBNSD Figure 3. Operating Frequency vs Collector to V GE, GATE TO EMITTER VOLTAGE (V) Figure. Short Circuit Withstand Time 1 1 DUTY CYCLE <.%, V GE = 1V PULSE DURATION = µs T J = 1 o C T J = o C T J = o C 1 1 DUTY CYCLE <.%, V GE = 1V PULSE DURATION = µs T J = 1 o C T J = o C T J = o C Figure. Collector to Emitter On-State Voltage Figure. Collector to Emitter On-State Voltage Fairchild Semiconductor Corporation FGHNSD / FGPNSD / FGBNSD Rev. A1

4 Typical Performance Curves (Continued) E ON, TURN-ON ENERGY LOSS ( µj) t d(on)i, TURN-ON DELAY TIME (ns) Figure 7. Turn-On Energy Loss vs Collector to R G = Ω, L = µh, V CE = 39V T J = o C, T J = o C, V GE = 1V R G = Ω, L = µh, V CE = 39V T J = o C, T J = o C, V GE = 1V T J = o C, T J = o C, V GE = 1V T J = o C, T J = o C, V GE = 1V 1 1 E OFF TURN-OFF ENERGY LOSS (µj) t ri, RISE TIME (ns) R G = Ω, L = µh, V CE = 39V T J = o C, V GE = 1V, V GE = 1V T J = o C, V GE = 1V, V GE = 1V 1 1 Figure. Turn-Off Energy Loss vs Collector to R G = Ω, L = µh, V CE = 39V T J = o C, T J = o C, V GE = 1V T J = o C, T J = o C, V GE =1V 1 1 FGHNSD / FGPNSD / FGBNSD Figure 9. Turn-On Delay Time vs Collector to Figure 1. Turn-On Rise Time vs Collector to 1 R G = Ω, L = µh, V CE = 39V R G = Ω, L = µh, V CE = 39V t d(off)i, TURN-OFF DELAY TIME (ns) 1 V GE = 1V, V GE = 1V, T J = o C V GE = 1V, V GE = 1V, T J = o C 1 1 t fi, FALL TIME (ns) 1 T J = o C, V GE = 1V or 1V T J = o C, V GE = 1V or 1V 1 1 Figure 11. Turn-Off Delay Time vs Collector to Figure. Fall Time vs Collector to Emitter Current Fairchild Semiconductor Corporation FGHNSD / FGPNSD / FGBNSD Rev. A1

5 Typical Performance Curves (Continued) E TOTAL, TOTAL SWITCHING ENERGY LOSS (mj) DUTY CYCLE <.%, V CE = 1V PULSE DURATION = µs T J = o C T J = - o C V GE, GATE TO EMITTER VOLTAGE (V) Figure 13. Transfer Characteristic T J = o C R G = Ω, L = µh, V CE = 39V, V GE = 1V E TOTAL = E ON + E OFF I CE = 1A I CE = 7A I CE = 3A V GE, GATE TO EMITTER VOLTAGE (V) E TOTAL, TOTAL SWITCHING ENERGY LOSS (mj) I G(REF) = 1mA, R L =.Ω, T J = o C V CE = V V CE = V V CE = V Q G, GATE CHARGE (nc) Figure 1. Gate Charge T J = o C, L = µh, V CE = 39V, V GE = 1V E TOTAL = E ON + E OFF I CE = 1A I CE = 7A I CE = 3A FGHNSD / FGPNSD / FGBNSD T C, CASE TEMPERATURE ( o C) R G, GATE RESISTANCE (Ω) Figure 1. Total Switching Loss vs Case Temperature Figure 1. Total Switching Loss vs Gate Resistance C, CAPACITANCE (nf) FREQUENCY = 1MHz C IES C OES C RES DUTY CYCLE <.% PULSE DURATION = µs, T J = o C I CE = 1A I CE = 7A I CE = 3A V GE, GATE TO EMITTER VOLTAGE (V) Figure 17. Capacitance vs Collector to Emitter Voltage Figure 1. Collector to Emitter On-State Voltage vs Gate to Emitter Voltage Fairchild Semiconductor Corporation FGHNSD / FGPNSD / FGBNSD Rev. A1

6 Typical Performance Curves (Continued) I EC, FORWARD CURRENT (A) t a, t b, REVERSE RECOVERY TIMES (ns) 1 1 DUTY CYCLE <.%, PULSE DURATION = µs o C o C V EC, FORWARD VOLTAGE (V) Figure 19. Diode Forward Current vs Forward Voltage Drop I EC = 7A, V CE = 39V o C t a o C t a o C t b 3 o C t b 7 9 di EC /dt, RATE OF CHANGE OF CURRENT (A/µs) 3. 1 t rr, REVERSE RECOVERY TIMES (ns) Q rr, REVERSE RECOVERY CHARGE (nc) 1 1 di EC /dt = A/µs, V CE = 39V o C t b, t rr o C t a o t a 1 1 I EC, FORWARD CURRENT (A) o C t b, t rr Figure. Recovery Times vs Forward Current V CE = 39V o C, I EC = 7A o C, I EC = 3.A o C, I EC = 7A o C, I EC = 3.A di EC /dt, RATE OF CHANGE OF CURRENT (A/µs) 1 FGHNSD / FGPNSD / FGBNSD Figure 1. Recovery Times vs Rate of Change of Current Figure. Stored Charge vs Rate of Change of Current S, REVERSE RECOVERY SOFTNESS FACTOR V CE = 39V, T J = C I EC = 3.A I EC = 7A IRRM, MAX REVERSE RECOVERY CURRENT (A) V CE = 39V, T J = C I EC = 7A I EC = 3.A di EC /dt, CURRENT RATE OF CHANGE (A/µs) di EC /dt, CURRENT RATE OF CHANGE (A/µs) Figure 3. Reverse Recovery Softness Factor vs Rate of Change of Current Figure. Maximum Reverse Recovery Current vs Rate of Change of Current Fairchild Semiconductor Corporation FGHNSD / FGPNSD / FGBNSD Rev. A1

7 Typical Performance Curves (Continued) Z θjc, NORMALIZED THERMAL RESPONSE SINGLE PULSE t 1, RECTANGULAR PULSE DURATION (s) Figure. IGBT Normalized Transient Thermal Impedance, Junction to Case Test Circuit and Waveforms FGHNSD DIODE TA99 P D DUTY FACTOR, D = t 1 / t PEAK T J = (P D X Z θjc X R θjc ) + T C 9% t 1 t FGHNSD / FGPNSD / FGBNSD V GE 1% E ON L = µh E OFF V CE R G = Ω 9% FGHNSD + - V DD = 39V I CE t d(off)i 1% t fi t ri t d(on)i Figure. Inductive Switching Test Circuit Figure 7. Switching Test Waveforms Fairchild Semiconductor Corporation FGHNSD / FGPNSD / FGBNSD Rev. A1

8 Handling Precautions for IGBTs Insulated Gate Bipolar Transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler s body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as ECCOSORBD LD or equivalent.. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded.. Devices should never be inserted into or removed from circuits with power on.. Gate Voltage Rating - Never exceed the gatevoltage rating of V GEM. Exceeding the rated V GE can result in permanent damage to the oxide layer in the gate region.. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended. Operating Frequency Information Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (I CE ) plots are possible using the information shown for a typical unit in Figures,, 7,, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows f MAX1 or f MAX ; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. f MAX1 is defined by f MAX1 =./(t d(off)i + t d(on)i ). Deadtime (the denominator) has been arbitrarily held to 1% of the on-state time for a % duty factor. Other definitions are possible. t d(off)i and t d(on)i are defined in Figure 7. Device turn-off delay can establish an additional frequency limiting condition for an application other than T JM. t d(off)i is important when controlling output ripple under a lightly loaded condition. f MAX is defined by f MAX = (P D - P C )/(E OFF + E ON ). The allowable dissipation (P D ) is defined by P D =(T JM -T C )/R θjc. The sum of device switching and conduction losses must not exceed P D. A % duty factor was used (Figure 3) and the conduction losses (P C ) are approximated by P C =(V CE xi CE )/. E ON and E OFF are defined in the switching waveforms shown in Figure 7. E ON is the integral of the instantaneous power loss (I CE x V CE ) during turnon and E OFF is the integral of the instantaneous power loss (I CE xv CE ) during turn-off. All tail losses are included in the calculation for E OFF ; i.e., the collector current equals zero (I CE = ) FGHNSD / FGPNSD / FGBNSD ECCOSORBD is a Trademark of Emerson and Cumming, Inc. Fairchild Semiconductor Corporation FGHNSD / FGPNSD / FGBNSD Rev. A1

9 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx ActiveArray Bottomless CoolFET CROSSVOLT DOME EcoSPARK E CMOS TM EnSigna TM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms FACT FACT Quiet Series FAST â FASTr FRFET GlobalOptoisolator GTO HiSeC I C Across the board. Around the world. The Power Franchise ImpliedDisconnect ISOPLANAR LittleFET MicroFET MicroPak MICROWIRE MSX MSXPro OCX OCXPro OPTOLOGIC â OPTOPLANAR PACMAN POP Power7 PowerTrench â QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect SILENT SWITCHER â SMART START. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product Status Definition SPM Stealth SuperSOT -3 SuperSOT - SuperSOT - SyncFET TinyLogic TruTranslation UHC UltraFET â VCX Advance Information Preliminary No Identification Needed Formative or In Design First Production Full Production This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I

600V, SMPS II Series N-Channel IGBT with Anti-Parallel Stealth TM Diode. Features E C G. Device Maximum Ratings T C = 25 C unless otherwise noted

600V, SMPS II Series N-Channel IGBT with Anti-Parallel Stealth TM Diode. Features E C G. Device Maximum Ratings T C = 25 C unless otherwise noted FGH5N6S2D 6V, SMPS II Series N-Channel IGBT with Anti-Parallel Stealth TM Diode General Description The FGH5N6S2D is a Low Gate Charge, Low Plateau Voltage SMPS II IGBT combining the fast switching speed