Lab Manual Rev 2. General Information: Lab Report Format: EE360, Fall03, Kolk

Transcription

1 Lab Manual Rev 2 EE360, Fall03, Kolk General Information: 1. The lab is located in Dana 115. Our lab assistant is Jun Kondo. Lab hours for EE360 are Monday evenings 7:00 9:00 pm. The lab is available after hours but arrangements must be made our lab assistant. 2. You will work in pairs at one station (a station connected to one of the printers) in the lab. You are expected to use the equipment with care and put away all devices in the lockers before leaving. Issues regarding operation and/or safety should be discussed with either the lab assistant or the instructor. 3. Each student must submit an individual lab report for each lab. If you miss a lab you must make it up. You may not use data obtained by a classmate to complete missing work. 4. At the start of each lab the pre-lab section of the report is due and will be checked by the instructor. The pre-lab section is defined in the format below. Also, the completed report from the previous week will be handed in at the beginning of the lab. 5. When you have the lab experiment working do not dismantle the set-up until your instructor or the lab assistant has checked it. 6. Your lab grade is worth 25% of the course grade for EE360 and will be based on your lab reports and lab work. You will have 1 week to compete a lab report. Lab reports that are 1 week late will be worth 50% of the on-time grade, reports submitted more than 1 week late will not be accepted and will be worth 0%. Lab Report Format: The Lab Report will consist of the following 6 sections; 1. Cover Page: Title of Lab, Course, Names, Submission date. 2. Executive Summary: 1 paragraph which describes the problem to be solved in the lab exercise and the results. 3. Objective(s): 1 paragraph describing the objectives of the lab exercise. 4. Technical Approach: Several paragraphs describing the technical approach employed to conduct the lab exercise. Any pre-lab problems are included in this section. Identify issues discovered while conducting the exercise and discuss. 5. Results and Interpretation: Data, interpretation, and presentation (tables, graphs, diagrams) of the results of the exercise. 6. Conclusion: Summarize the extent to which the objectives were met. The Pre-Lab will include sections 1, 3, and 4. The Post-Lab will fill in the remainder of the sections.

2 General Information: Resistors: Resistor Color Code: Resistor value is identified by 3 color bands, the fourth band is the tolerance and is either gold, silver, or not present. When reading a resistor value place the tolerance band to the right and colors to the left. Band 3 Band 2 Band 1 Tolerance band Colored Bands The following table defines the color to resistance relationship Color Band 1 Band 2 Band 3 (Multiplier) Black Brown Red Orange Yellow ,000 Green ,000 Blue 6 6 1,000,000 Violet ,000,000 Gray ,000,000 White 9 9 1,000,000,000 For example, a resistor with colors Brown, Black, Red is interpreted as follows, Brown = 1, Black = 0, together these yield 10 and the Red = 100 means to multiply 10 * 100 yielding a resistance value = 1k. Brown, Black, Orange = 10*1000 = 10k. Yellow, Green, Red = 4500 = 4.5k. Diodes: When in forward bias, current through a diode flows from the annode to the cathode. The colored ring on a diode indicates the cathode side. Zener diodes are identified in the same way. Diodes are usually characterized by their reverse breakdown voltage, for example, a IN4007 has a breakdown voltage of 7 V, similarly, a IN4004 has a breakdown voltage of 4 V and a IN4003 has a breakdown voltage of 3 V. Annode Colored Ring Cathode

3 Tetronix TDS210 Digital Oscilloscope: General Operation 1. Turn on the Scope (power button is on the top left) and locate traces for channels 1 and Press the CH1 menu button and set the coupling mode for channel 1 to GND by pushing the appropriate menu selection button immediately right of the display area (there are 5 buttons total), repeat this for CH2. 3. Using the veritcal postiion buttons, place the horizontal traces for channels 1 and 2 at 2cm and 4cm from the bottom of the screen. Change the coupling mode to DC for CH1 and AC for CH2. 4. For CH1 set the vertical sensitivity to coarse via menu buttons, then select settings of 5, 2, 1, 500mv and 200 mv/div respectively using the V/div know directly above the BNC input terminal. Notice that the coarse setting defines a sequence. Apply a 5V dc voltage and observe the display at a sensitivity of 5 V/div. Switch to FINE sensitivity control and observe the finer resolutions available between coarse settings. 5. Triggering determines when the scope begins to acquire and display wave form. Trigger controls are at the far right of the unit. Press the trigger menu button and set the trigger source to CH2, highlight EDGE triggering. Set CH2 to 2 V/div and apply a 1 KHz 2V peak-to-peak sine wave using the function generator (ensure zero dc offset). 6. Set up the timebase by pressing the HORIZONTAL menu button and selecting Main. Arrange for a horizontal sensitivity of 100 us/div so that one complete time period is displayed across the screen. Observe changes when sensitivity is changed to 250 us and 500 us/div. 7. Window in on a portion of the wave form by selecting Window Zone (under Main) on the manu bar. Set the bounds on the window area using the HORIZ position and SEC/DIV knobs and then hit Window (under Window Zone) on the menu bar. Display changes to show the window waveform expanded to screen width. 8. Return to the Main display menu option, set the timebase to 250 us/div and print your waveform by pressing the hardcopy button in the MENU and CONTROL panel (top right). 9. Return to the trigger menu and explore the SLOPE, MODE< and COUPLING trigger options available on the scope. For the majority of the circuits and electronic labs set COUPLING to AC and MODE to Auto (acquisition of the waveform in the absence of trigger). Single mode triggering allows the acquisition of one waveform each time you push the RUN button. 10. The scope acquires analog data, converts it to digital form in one of 3 ways; sample, peak detect, and average. Push the acquire button and observe the 3 acquisition options. 11. Select the CH2 menu and switch coupling mode to DC. Apply dc offset to the CH2 input by adjusting the DC offset knob on the function generators. Observe the effect on the waveform. Cancel the DC offset. 12. Math functions available by pushing the MATH menu button include addition and subtraction of waveforms. Establish a DC voltage of 5V on CH1 and a 10KHz 2V Pk-to-pk triangular wave on CH2. Add, subtract, and invert waveforms via the MATH menu. 13. The TDS 210 has automated measurement capabilities. Push the MATH menu button to toggle from the MATH display back to the normal dual trace display. Press the MEASURE button to activate auto measurements, select CH2 as the measurement source by pressing the top menu button and selecting CH2 for the first 2 cases (last 2 measurement displays not available). The select TYPE via the top menu button, several types of measurements are available; record the Freq, Period, Mean, pk-to-pk, and RMS value of the CH2 waverform. 14. Measurement of phase shifts can be done in a number of ways. Construct a simple low pass RC circuit using a 20K resistor and a 0.05uF capacitor. Obtain a 3KHz sine wave from the function generator and apply as input (CH1) and observe output. Measure the phase shift introduced by the RC circuit as follows. Synchronize CH1 and CH2 traces by selecting each channel, setting coupling to GND and aligning the traces. Return both channels to AC coupling. Push the cursor button to see the cursor menu. Select Time under type, CH1 under Source, and using the cursor 1 knob, move the first cursor to a peak on CH1 or input trace. Repeat for CH2, selecting an adjacent peak on the output trace. Record the Delta (difference) Cursor 1 and Cursors 2 readings and use these to compute the phase shift.

4 15. Lissajous patterns can also be used in phase shift measurement. Adjust the V/div buttons to display approximately the same amplitude on both channels. Press the Display menu button, select Format, the XY. Observe the changes in phase shift in the circuit as frequency is increased to 10K (90 deg) and then decreased to 100 Hz (0 deg).

5 Lab 1: Thevenin Theorem Objectives: (1) Become familiar with construction of breadboard circuits, electrical components, and lab equipment (signal generator, multimeter), (2) Application of Thevenin theorem to a simple resistive network. 1. Compute the short circuit current through the terminals A-B for the circuit in Figure Compute the resistance of the circuit as seen from terminals A-B (R L removed). 3. Draw the Thevenin equivalent circuit and calculate the voltage across and the current through R L. Procedure: 1. Construct the circuit in Figure 1 and measure the load voltage and current. 2. Construct the Thevenin equivalent circuit and measure the load voltage and current. 1k 3.3k A 15v 4.7k RL=6.8k B Figure 1: Thevenin Circuit

6 Lab 2: Superposition Theorem Objectives: Experimentally verify the principle of superposition on a resistive circuit. Analytically calculate the voltage drop across the 5.6k resistor using superposition Procedure: 1. Construct the circuit in Figure 2 and measure the voltage drop across the 5.6k resistor. 2. Suppress the 15v source and measure the voltage drop across the 5.6k resistor. 3. Restore the 15v source and suppress the 10v source, measure the voltage drop across the 5.6k resistor. 4. Add the results of 2 and Tabularize and interpret your results. R1 = 1 K R2 = 3.3 K 10 V R3 = 5.6K 15 V Figure 2: Superpositioning Circuit Lab 3: Operational Amplifier Circuits Objectives: Construct six basic Op Amp circuits and investigate their operation. The circuits investigates are (a) a non-inverting amplifier (gain), (b) an inverting amplifier (-gain), (c) a summer, (d) a subtracter, (e) an integrator, and (f) a low pass filter. For each of the 6 op amp circuits compute the transfer function; Vout or the output as a function of the Vin inputs, ie; V1, V2... Procedure: For each of the 6 circuits use the 12 volt power supply to power the op amp. Print scope outputs for each of the 6 circuits and include with your lab reports. Circuits a & b) Apply a sine or triangular waveform (you select the amplitude, 1 to 5 volts peak to peak, and frequency) and measure the output waveform amplitude. Compare with the theoretical gain of the circuit computed in the prelab.

7 Circuits c & d) Apply a single source sine, triangle, or square wave to each of these circuits (again, amplitude in the 1 to 5 volt peak to peak range, and a reasonable frequency). Measure the output and compare with theoretical outputs computed in the prelab. Circuit e) Apply a 1 khz 1 volt peak to peak square wave to this circuit. Analytically integrate this signal over a half period (one pulse), scale the integrated value by the RC gain (computed in the prelab) and compare the waveform amplitude with that measured from the circuit. What happens to the output amplitude as you increase and decrease frequency? Explain what this happens based on the transfer function for this circuit. Circuit f) Apply a 1 volt peak to peak sinusoid to this circuit over a range of discrete frequencies which 1 includes the break (cutoff) frequency ( wb = ). Plot the log(10) amplitude gain as a function of the R2 C log(10) frequency. Explain your findings. R1=1k Vin R2=1k V -12V R1=1k Vout V1 V2 R2=1k R3=1k - + R4=1k -12V +12V Vout a) Non Inverting Amplifier R2=1k d) Subtracter C=.015uF Vin R1=1k V +12V Vout Vin R1=1k -12V V Vout b) Inverting Amplifier e) Integrator R2=1k v1 v2 v3 R1=1k R2=1k R3=1k R4=1k V +12V Vout Vin R1=1k C=1uF -12V V Vout c) Summer f) Low Pass Filter Figure 5: Six basic Op Amp Circuits

8 Lab 4: Solving ODE using Op Amps Objectives: Use Op Amps to solve a second order ordinary differential equation (ODE) and compare with analytical solution. 1. Derive the analytical solution of the following ODE with all initial conditions set to zero and the input set to a unit amplitude step function occuring at t=0. 2 d x dx dx( 0) x( t) = r( t); = 0, x( 0) = 0, r( t) = unitstep 2 dt dt dt Plot the response, x( t) for 0 < t < 10sec. Your response should look like the following plot Time (sec) Figure 6: Simulated step response time history 2. Construct a circuit using Op Amps, resistors, and capacitors which will model the ODE. Your circuit should contain two integrators with gain included and two inverting summations. Use 1 microfarad capacitors for each of the integrators. Based on this you will need to calculate the individual resistances for both the integrators and summations. Procedure: Construct the circuit you derived in the prelab and apply a 2 volt peak to peak square wave input (for r(t)) at a frequency of.05 hz. This input will provide fixed level input voltages of either +1 or 1 volts for durations of 10 seconds. Capture and print one cycle of the response. Explain your findings and comment on any differences and/or difficulties you had while conducting the experiment.

9 Lab 5: 10 VDC Power Supply Objectives: Construct a DC power supply using a center tap stepdown transformer, a full wave rectifier, and a low pass filter and verify its operation based on theoretical calculations. See notes on proper connection of diodes, improper connection will destroy the diode. The input to the circuit is wall current (120 V rms, 60 Hz or 377 r/s, BE CAREFUL). The transformer used is a 1:1/8 stepdown transformer (n = 1/8). Since the transformer is center tapped the voltage across each of the secondary coils should be 1/16 * input voltage = 7.5 V rms or = V 0-pk. After rectification the resulting signal is filtered using an RC low pass filter. For the prelab sketch the (1) transformer output waveform (label the amplitudes) and (2) the rectified waveform and amplitude. Compute the average value and ripple amplitude and period of the filtered output voltage waveform with C =.04 uf and C =.07 uf (the output is the voltage across the capacitor). Procedure: 1. Construct the power supply circuit shown in Figure 3. (any diode, IN4003, IN4004, or IN4007 can be used). Before plugging in the transformer have the instructor or lab assistant check your circuit. 2. Using a multimeter measure the DC and AC voltages at the transformer output, diode rectifier output, and low pass filter output. 3. Use the scope to capture and print these waveforms. 4. Use the scope to measure the ripple amplitude of the LPF at two capacitance values; C=.04uF and C=.07 uf, compare with predicted results, explain any discrepancies. D1 5 K 120 VAC D2 C Figure 3: Power Supply Circuit

10 Lab 6: AC BJT Class A Amplifier Objectives: Construct a Common Emitter (CE) Class A amplifier using a BJT and investigate its operation. You will determine the region of operation, current gain, and voltage amplification performance as a function of frequency. The resistors are used for biasing of the transistor and the capacitors are used to (1) block dc content in the input signal and (2) high pass filter the output signal to also remove dc content. Performance of a transistor as a function of frequency is limited by inherent transistor properties. Generally, transistors have a flat gain characteristic with respect to frequency until a certain frequency is reached (typically around 1kHz). For inputs greater than this frequency the transistor response is attenuated (much the same as the behavior of a low pass filter) and the resulting gain characteristic decreases correspondingly. The amplifier to be designed in this lab is called a Class A amplifier which means that the values of bias and signal voltage applied to the transistor ensure that collector current always flows. In this lab the biasing of the transistor with the 15V supply to the collector and a fraction of that (you ll determine this value) to the base (due to the voltage divider on the input circuit) keep the transistor always on or in Class A operation. A more economical operating mode is in Class B where the transistor would be off (in cutoff mode) until it is needed. Class B is accomplished by biasing to nearly the cutoff region so that a negligible current flows under off or quiet conditions. Although Class B is more efficient than Class A it produces more distortion. For the specified input and component values compute VBE, VBC, I B, IC. Compute the region of operation and the current gain. Procedure: 1. Construct the transistor circuit using discrete components (do not use the resistor or capacitor boxes used in previous labs), shown in Figure 4. (Note: the transistor used is an NPN 2N222A, please add the arrow to the figure to show it as an NPN). Measure VB, VC, VE and compute VBE, VBC, VCE, I B, IC, I E. Compare with prelab predictions (comment on any differences). Also compute the region of operation and the current gain. For these measurements the V s value (from the function generator) is arbitrary. 2. On the function generator set Vs = 15V pk pk and measure V opk pk using the scope over the following range of frequencies; 100, 200, 300, 400, 500, 600, 700, 800, 900, 1000, 2000, ,000, 200k, 300k, 400k, 500k, 1M, 2M hz. Do not use the scope to measure frequency, instead, read the frequency off the function generator scale. 3. Plot the Log magnitude (defined as 10Log10 V V o s pk pk pk pk decibels) on the vertical axis versus Log10 ( freq) on the horizontal axis from the data you took in step 2. Identify the cuton frequency, the cutoff frequency, and the bandwidth of this AC amplifier.

11 15v.056uF 56K 2.7K.056uF 33K V o AC 10K 680 Figure 4: AC BJT Amplifier

12 Lab 7: Combinational Logic Circuit Objectives: Gain experience assembling and testing a combinational logic circuit using a logic trainer kit. Realize the circuit using only nand gates (universal logic gate), a common practice which removes the complexity of needing to remember pin configurations of many different logic gates. You will use three logic gates in this lab, the 7432 or gate, the 7408 and gate, and the 7400 nand gate. The pin definition for each of these logic gates is shown in the following figures; v v v Gnd Gnd Gnd 7432 or chip 7408 and chip 7400 nand chip 1. Derive the truth table for the 3 input 1 output combinational logic circuit shown below. A B D C Figure 7: Combinational Logic Circuit 2. Develop an equivalent circuit using only nand gates. Procedure: 1. Construct the Figure 7 logic circuit using the Knight Mini Lab logic trainer kit and the 7432 and 7408 or and and gates. NOTE: TTL logic circuits are extremely sensitive to short circuits and power surges. One way these are created is attempting to rewire the circuit without turning off the power, NEVER REWIRE THE CIRCUIT WITHOUT TURNING THE POWER OFF BEFOREHAND. NOTE: Because of the sensitivity of the components it is advisable to use standard wiring definitions on the breadboard. ALWAYS CONNECT THE 5V SOURCE TO THE RED LINE TERMINALS AND THE GROUND TO THE BLUE LINE TERMINALS. 2. Connect the circuit to the 5v supply (turn the level knob to max to achieve the full 5v output). Wire inputs A, B, and C to three of the input toggle switches at the top of the logic trainer. These switches are defines as lo=0 and hi=1. Connect the output, D, to one of the LED outputs also located at the top of the logic trainer and to the right of the input toggle switches. The LED s are defined as off=0 and on=1. Test the circuit and verify its performance with the truth table computed in the prelab.

13 3. Reconstruct an equivalent circuit using only 7400 nand gates and verify its operation with the truth table calculated in the prelab. Lab 8: SR Flip Flop Sequential Logic Circuit Objectives: Construct and gain experience with a sequential logic circuit (one with memory). You will use the 7400 nand gate as the basis to construct an SR (Set Reset) flip flop circuit. The pin diagram for the 7400 is shown in the following figure; v Gnd 7400 Nand Pin Diagram 1. Derive the truth table for 2 input 2 output sequential logic circuit shown in Figure 8. The circled diode is a light. The inputs to S and R (the Set and Reset inputs) are push switches, in their unpushed position (shown) they are both hi (5v), when pushed they go to ground (0v). S Q +5v R Q Figure 8: SR Flip Flop Circuit 2. Modify the flip flop to model a burglar alarm. The S input will be the circuit to detect an intrusion, it is connected to a closed window, use S=1 when the window is closed and when it is opened, S=0. The other input R will be a reset input to arm the alarm. When R=1 the alarm is armed and ready to use. To show this you will add a light to the Qnot output so you can see the armed status. When the alarm is armed, Q=0 (top light is off) and Qnot is on (bottom light is on). When the window is opened, Q=1 (top light) and Qnot we don t care about, it can be either on or off. To reset the alarm the window must first be closed by clicking S=1 then the R button is pressed to turn Q=0 (off) and Qnot=1 (armed). Develop the burglar alarm logic and truth table, verify it can be reset from two possible initial conditions, Q=1 and Q=0 using the truth table. Lab: 1. Construct the circuit shown in Figure 8 using the 7400 Nand gate and verify the operation with the truth table beginning with the light (diode) both on and off (Q=1 and Q=0). For the S and R inputs use the toggle switches on the trainer, for the Q output use one of the lights on the trainer. 2. Construct the burglar alarm circuit designed in the prelab. Verify the operation beginning with either the light (Q) on or off and going through a cycle of arming the alarm, intrusion, and reset back to the

14 armed state. For the S and R inputs use the toggle switches on the trainer, for the Q and Qnot outputs use the lights on the trainer.