Design of Silicon Based Fractal Antennas

Transcription

1 1 Design of Silicon Based Fractal Antennas Farhan A. Ghaffar and Atif Shamim Abstract This paper presents Sierpinski carpet fractal antennas implemented in conventional low resistivity ( =10 -cm) as well as high resistivity ( =1500 -cm) silicon mediums. The fractal antenna is 36% smaller as compared to a typical patch antenna at 24 GHz and provides 13% bandwidth on high resistivity silicon, suitable for high data rate applications. For the first time, an on-chip fractal antenna array is demonstrated in this work which provides double the gain of a single fractal element as well as enhanced bandwidth. A custom test fixture is utilized to measure the radiation pattern and gain of these probe-fed antennas. In addition to gain and impedance characterization, measurements have also been made to study intra-chip communication through these antennas. The comparison between the low resistivity and high resistivity antennas indicate that the former is not a suitable medium for array implementation and is only suitable for short range communication whereas the latter is appropriate for short and medium range wireless communication. The design is wellsuited for compact, high data rate System-on-Chip (SoC) applications as well as for intra-chip communication such as wireless global clock distribution in synchronous systems. Index Terms fractal antenna, wireless interconnects, on-chip antenna, system on chip (SoC) 1. INTRODUCTION Growing demands of miniaturized systems that can support high data rates has been driving the electronics industry. A number of short-range applications have emerged in recent times, in particular for mm-wave bands. The shrinking sizes require a high level of integration and low power circuits to ensure operation off a small battery. The significance of these high frequency systems is that the wavelengths are small and thus allow antenna integration on chip, enabling true SoC solutions [1-2]. Traditionally antennas are off chip due to which they have to be integrated with on-chip circuits using bond wires. This integration can be extremely challenging at high frequencies. An on-chip antenna negates the requirement of bond wires or off chip components, thus providing a robust solution in smaller form factors [3]. Silicon integrated antennas have been demonstrated previously [4-6], however, most of them are either bulky or narrow bandwidth. In this The authors are with the Electrical Engineering Program, King Abdullah University of Science and Technology (KAUST), Thuwal , Saudi Arabia ( farhan.ghaffar@kaust.edu.sa; atif.shamim@kaust.edu.sa). work fractal antennas have been chosen due to their multiresonant and space filling nature. The term fractal was introduced by Madelbrot to define a new geometry of shapes which can be defined as complex structures that have self-similarity [7]. The fractals are composed of numerous small units of non-integer dimensions which stack up together to give rise to a complete structure which has the similar shape as that of the unit structure. This distinctive characteristic of fractals has been exploited by the antenna designers to demonstrate antennas that are compact in size and have large bandwidth [8, 9]. Fractals inherently demonstrate multiple resonances that can be exploited to design wide-band antennas suitable for high data rate applications [10]. In addition, the self-affine and space filling properties of fractal antenna increases the effective electrical length of the antenna and hence reduce the size of the antenna. Fractal antennas have been demonstrated in PCB and LTCC mediums [11, 12]. According to authors best knowledge, there has only been one demonstration of a silicon based fractal antenna, where Sierpisnki carpet topology has been investigated [13]. However, due to the challenges in on-chip antenna measurements, the antenna in [13] has not been characterized for its radiation characteristics. In this work, the performance of Sierpinski carpet fractal antenna is compared on both low and high resistivity silicon substrates and the antennas have been characterized through a custom test fixture. In addition to a single antenna element, the paper presents an on-chip fractal antenna array for the first time. Finally, the antennas have been characterized for intra-chip communication, demonstrating promising results for applications such as wireless on-chip global clock distribution [14]. 2.1 Stack Up 2. ON CHIP ANTENNA The in-house fabrication process, used in this work, is compatible with the standard CMOS process. The stack up for our process has been compared with that of a standard CMOS process in Fig. 1. There are some differences between the two stack ups which are described below. The conductor in the inhouse process is at the top of a thin (2 um) oxide layer contrary to the CMOS stack up which has a thick (~20 µm) oxide layer with multiple embedded conductors. CMOS processes also, in general, have passivation layers on top of the oxide. Commercial CMOS foundries do not provide the flexibility of high resistivity silicon substrate and also the chip area allocations are very limited. In this work, two different

2 2 resistivities ( =10 -cm and =1500 -cm) have been investigated. Moreover, due to large silicon area available in in-house fabrication, an on-chip array design has also been studied. Despite the minor differences, the two stack ups are quite comparable in terms of substrate properties, which mean that the antenna performance achieved in this work can be replicated in the standard CMOS process with ease. Fig. 2. Sierpisnki carpet fractal antenna iteration of order 0 to 3 (Not drawn to scale) (a) (b) Fig. 1. (a) Commercial CMOS Stack Up (b) In-house Silicon Stack Up 2.2 Concept A Sierpinski fractal structure has been designed in this work. This structure is realized through multiple iterations on a basic geometrical shape such as triangle, rectangle, circle or square [7]. Among these, carpet fractal has its resemblance with the square patch [12]. The first step of the design is to construct a solid square patch which can be termed as the zero order iteration. First order iteration is implemented by etching a square from the center, which is one-third of the dimensions of the main patch. The next two iterations involve removal of squares which are nine times and twenty seven times smaller than the main patch. The fractal design shown in Fig. 2 can be termed as the third order Sierpinski carpet fractal antenna. Three iterations of the carpet fractal design are investigated in this work and compared with a conventional patch antenna. It is observed in simulations that for the same stack up, the patch antenna has a resonant length of 1.65 mm with an impedance bandwidth of 3.75 % of the center frequency (24 GHz). In comparison, the three iterations of the fractal antenna have dimensions of 1.6 mm, 1.42 mm and 1.33 mm as shown in Fig. 2, with the third iteration providing a size reduction of 36 %. These iterations provide a bandwidth of 5.4 %, 7.9 % and 13 % respectively as shown in Fig. 3. A 50 CPW feed line has been employed in all the simulated designs. The large bandwidth and reduced size of the fractal design exhibits its advantages over a simple patch antenna. Fig. 3. Bandwidth Comparison with a simple patch antenna 2.3 Single Element Design Ansoft s High Frequency Structure Simulator (HFSS) is employed to simulate the antenna designs. Coplanar Waveguide (CPW) inset feed has been used for the antenna design as shown in Fig. 4. This feeding mechanism allows easy integration with the circuits in CMOS technology. In addition, the inset feed matches the antenna and the feed line without affecting the bandwidth performance of the antenna. The simulated square carpet antenna (3 rd iteration) has a dimension of 1.33 mm for the center frequency of 24 GHz. The simulations reveal that the antenna printed on the high resistivity silicon has an impedance bandwidth of 13% (shown in Fig. 3 and 10) as compared to 96% of the low resistivity silicon antenna. However, in the case of low resistivity silicon antenna, the large bandwidth is mainly due to the power lost in the substrate, also evident from antenna gain. The maximum gain values for the antennas in high and low resistivity silicon substrates are 2.6 db and -8.3 db respectively. The simulated 3D radiation pattern is shown in Fig. 5. Due to the absence of a ground plane underneath the substrate the radiation pattern is omni-directional in E plane (yz plane), while the H plane (xz plane) pattern exhibit nulls at the edges of the substrate. The antennas demonstrate half power beam widths (HPBW) of 85 and 120 in H plane and E plane respectively. Although low resistivity silicon antenna exhibits low gain, it is useful for applications where the required communication

3 3 range is short. Moreover, low resistivity silicon is suitable for integration with circuits as they require low resistivity silicon to avoid latch up [14]. On the other hand, antennas in high resistivity silicon medium demonstrate higher efficiency and can be used for short or medium range wireless communication. the high resistivity fractal antenna array in Fig. 7, demonstrates narrow beam-width as expected. Fig. 6. High Resistivity Silicon Fractal Array Design Fig. 4. Fractal Antenna Design Fig. 7. Simulated Radiation Pattern of Fractal Antenna Array Fig. 5. On-chip antenna simulated radiation pattern 2.4 Array Design As mentioned above, in commercial CMOS processes, the chip space is limited to realize an antenna array. However, the in-house fabrication process allowed the investigation of a fractal antenna array in the silicon medium. For this purpose, a four element linear equally spaced antenna array, based on the single element design discussed above, has been studied. The elements are spaced at a distance of half wavelength from each other to obtain the maximum gain. A CPW based corporate feed has been employed to simulate the array design, where a 50 Ω main feed is divided into four sub-feed lines each having an impedance of 200 Ω. The dimensions of the array design are 18 mm x 5 mm as shown in Fig. 6. The array design has been simulated for both high and low resistivity silicon substrates. The simulations indicate that the antenna array on low resistivity silicon exhibits extremely low gain (-18 db). This low gain is mostly due to the power lost in the large lossy substrate which is almost five times the size of the substrate used for single antenna element. This result suggests that the standard silicon substrate is not a suitable medium for antenna array implementation. However, the array implemented in high resistive silicon demonstrates a gain of 6.1 db which is twice as compared to the single element design. In addition, the array demonstrates an impedance bandwidth of 5.8 GHz (shown in Fig. 11) which is 24 % of the center frequency (24 GHz). The simulated radiation pattern of 3.1 Fabrication 3. FABRICATION AND MEASUREMENTS Multiple antennas have been laid down on a 3 inch silicon wafer. The antenna elements are kept at a distance greater than 0.4 o from each other. In order to minimize the effects of neighboring antennas and the silicon substrate around the antennas, the wafer is diced into smaller chips. The photographs of the fabricated single antenna and array are shown in Fig. 8 and Fig. 9 respectively. It can be observed that the fractal iterations have been successfully fabricated with high precision. The CPW feed in both designs is implemented to ensure the testing using a 250 um pitch Ground Signal Ground (GSG) probe. The GSG probe exciting the single element can be seen in Fig. 8. Fig. 8. Fabricated carpet fractal antenna with probe feed

4 4 Fig. 9. Fabricated carpet fractal antenna array 3.2 Impedance Measurements The impedance measurements of the high resistivity designs (single antenna element and the array) have been performed from 21 GHz to 27 GHz through Agilent s E8363 vector network analyzer. However, the S 11 of the antenna fabricated in conventional silicon wafer is measured from 16 GHz to 35 GHz due to its large bandwidth. As expected, for the low resistivity silicon antenna, a bandwidth of 19 GHz is observed that matches well with the simulations. This type of response is coming from the substrate losses, which makes it difficult to measure the exact resonant frequency and the bandwidth of the antenna. To determine the exact center frequency of the antenna its gain is measured over the entire frequency range. The frequency at which the antenna demonstrates the best gain can be termed as its resonance frequency. This will be discussed in the gain measurements section. As far as the true impedance bandwidth of the antenna is concerned, it can be determined from the high resistivity antenna design since it is identical to the low resistivity silicon design. A comparison between the simulated and measured S 11 of the high resistivity single antenna element and array design is shown in Fig. 10 and Fig. 11 respectively. The fractal antenna design exhibits a measured impedance bandwidth of 2.7 GHz as compared to the simulated value of 3.1 GHz. The center frequency of the antenna is slightly shifted which can be due to the presence of probe station metallic chuck underneath the antenna. An attempt has been made to minimize the effect of the metal chuck by placing a low-permittivity (close to air) foam in between the chip under test and the metal chuck. However, there is not enough space to place a thick foam so the effect of the metal chuck could not be completely removed. The measurements of the array are done in the same manner as the single antenna element. The measured S 11 of the array shows a good match with simulated S 11 as can be observed in Fig. 11. A measured bandwidth of 23 % is achieved from the array which is quite close to the simulated value of 24 %. The S 11 measurements are performed on multiple antenna chips in order to verify the repeatability of the fabricated fractal antennas. 3.3 Radiation Pattern and Gain Measurements The radiation pattern and gain characterization of on chip antennas is extremely challenging since silicon chips are fragile and typical connectors are too large to be mounted on them [6]. Therefore, the characterization of these antennas is usually done through wafer probes. Due to this reason, these Fig. 10. Simulated and measured S 11 of high resistivity silicon fractal antenna Fig. 11. Comparison between the Simulated and Measured S11 of the Fractal Array probe fed antennas cannot be tested conventionally in an anechoic chamber. To eradicate this barrier, a custom test fixture has been designed to characterize the antennas on the probe station, as shown in Fig. 12 (a). The test fixture consists of a wooden platform which has two arms mounted on it. The vertical arm (V-column) is attached to the side of the platform, while the horizontal arm (H-column) is connected at the top. There are five slots provided in the V-column which can be used to manually change the position of the H-column vertically. A screw is provided at the edge of each column which will provide support for the horizontal movement of the H-column. A protractor is bolted on the same edge as the V- column to measure its angle of rotation. This arrangement allows the two columns to rotate around the platform for an angle of 180 across the plane. The measurement set up is shown in Fig 12 (b) [15] where the antenna under test is placed on the probe station while a receive antenna is mounted at the edge of the H-column. By moving the two arms across the plane, the radiation pattern of the antenna can be measured. Two linearly polarized microstrip antennas have been used to calibrate the test set up at 24 GHz. One of these antennas acts as the receive antenna and is mounted on the edge of H- column while the other antenna acts as the transmit antenna and sits on the platform of the probe station. The radiated power from the transmit antenna is measured at the receive

5 5 end. After the calibration of the test setup, the antenna under test replaces the transmit antenna on the probe station and the radiated power is measured again without any change in the setup. The difference between the two measurements can be used to determine the gain of the on-chip antenna under test [15]. The radiation pattern of the on-chip antenna is measured in the E and H planes for the center frequency of 24 GHz. Since the radiation measurements are also performed on the probe station, the radiation patterns characterization is limited to ±90 on either side of the probe station. The radiation pattern of the high resistivity antenna is shown in Fig. 13, demonstrating a maximum measured gain of 1.8 db. The discrepancy between the simulated and measured performance can be attributed to the reflections from the surrounding test equipment. Despite these reflections the two radiation patterns show a good match with each other. In addition to the maximum gain, the measured radiation pattern beyond 50 deviates somewhat from the simulated pattern. This discrepancy is due to the interference from the probe station which appears between the transmit and the receive antenna for these angles. The radiation pattern of the conventional silicon antenna is quite similar to the high resistivity antenna except for its gain which is measured to be -9.8 db. In section 3.2 it was highlighted that the center frequency of the antenna on standard silicon cannot be determined due to its lossy nature. However in the gain measurements, it is observed that the antenna has a maximum gain at 24 GHz which confirms the center frequency of the antenna. The simulated and measured results of the two antennas have been summarized in Table I. All measurements have been done using a GSG probe of 250 um pitch. The characterization of high resistive silicon fractal array has been done in the similar manner as the single fractal antennas. The radiation pattern is measured in E and H planes for elevation angle of 0 to 180. A measured gain of 5 db has been achieved from the array with half power beam widths of 39 and 140 in H plane and E plane respectively. A comparison between the simulated and measured radiation pattern of the fractal array is shown in Fig. 14 which shows a good match with the simulated radiation pattern. Table I provides a comparison between the simulated and measured results of the fractal array. Fig. 13. Simulated and measured S 11 of high resistivity silicon fractal antenna Fig. 14. Simulated and measured radiation pattern of high resistivity silicon fractal antenna at 24 GHz (a) Table I: Simulated and Measured Results of the Fractal Antennas Silicon Type High Resistivity Low Resistivity Gain (db) Bandwidth (GHz) Simulated Measured Simulated Measured Fractal Array (b) Fig. 12. On-chip antenna test set up (a) Designed test fixture (b) Actual test set up

6 6 4. WIRELESS INTERCONNECT THROUGH ON CHIP ANTENNAS In order to investigate the suitability of the proposed antennas for intra-chip communication, additional simulations and measurements have been performed. For intra-chip simulations, two antennas facing each other and separated by a distance d have been on the same chip, as shown in Fig. 15 (a). The distance has been varied from 0.1 mm to 50 mm to see the effect of separation on the transmission gain between the two antennas. In simulations, it has been observed that the maximum value of transmission gain (S 21 ) is-7.5 db at 24 GHz when the antennas are placed 0.1 mm away from each other. As the distance between the two antennas is increased, the transmission gain decreases. When the distance is increased to 50 mm, the gain reduces to -47dB at 24 GHz. The plot between the transmission gain and distance between the antennas is shown in Fig. 16. Due to multiple antennas fabrication on a single wafer and dicing later on, the options for intra-chip transmission gain measurements for various separations is limited. However, measurements have been performed for a separation of 0.1 mm (Fig. 15 (b)) and the measured result matches well with the simulated result, as can be seen in Fig. 16.These results demonstrate that the intra-chip communication can be established between any two points on the chip or wafer through these on-chip antennas. A similar analysis has been carried out for low resistivity silicon based fractal antennas. The simulated and measured transmission gains, at 4 GHz, are -32 db for a gap of 0.1 mm. characterize the radiation characteristics of these probe-fed antennas. The antennas demonstrate promising results for a frequency range of GHz. Their large bandwidth is highly suitable for high data rate applications. The comparison shows that the design implemented in the high resistivity silicon outperforms the one fabricated in low resistivity silicon. To further improve the gain, an array of these antennas has been implemented on high resistive silicon, which enhances the communication range. The designs have also been characterized for intra-chip communication by varying the separation between the antennas on a single chip, thus demonstrating their suitability for applications such as wireless on-chip global clock distribution. Fig. 16. Transmission gain (S 21 ) for intra-chip communication between fractal antennas ACKNOWLEDGEMENT The authors would like to acknowledge the help of Professor Langis Roy and Professor Gary Tarr from Carleton University Canada for their help in fabricating the antennas. (a) (b) Fig. 15. Intra-chip communication (a) Simulation model (b) Measurement set up 5. CONCLUSION Sierpinski carpet fractal antenna has been designed and characterized on high resistivity and low resistivity silicon substrates in a CMOS compatible process. The design is much smaller and demonstrates a large bandwidth as compared to a standard patch antenna. A custom test fixture has been used to REFERENCES 1. A. Shamim, L. Roy, N. Fong, N. G. Tarr 24 GHz On- Chip antennas and balun on bulk silicon for air transmission, IEEE Transactions on Antennas and Propagation,, vol. 56, no. 2, pp , February P. Popplewell, V. Karam, A. Shamim, J. Rogers, L. Roy, C. Plett, A 5.2 GHz BFSK transceiver using injection locking and an on-chip antenna IEEE Journal of Solid State Circuits, vol. 43, no. 4, pp , April A. B. M. H. Rashid, N. Sultana, M. R. Khan, T. Kikkawa, Efficient Design of Integrated Antennas on Si for On- Chip Wireless Interconnectsin Multi-Layer Metal Process, Japanese Journal of Applied Physics, vol. 44, no. 4B, pp , H. R. Chuang, L. K. Yeh, P. C. Kuo, K. H. Tsai, H. L. Yue, A 60-GHz Millimeter-Wave CMOS Integrated On- Chip Antenna and Bandpass Filter, IEEE Transactions on Electron Devices, vol. 58, no. 7, pp , Y. P. Zhang, L. H. Guo, M. Sun, High Transmission Gain Inverted-F Antenna on Low Resistivity Silicon for

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