74VHC4051AFT,74VHC4052AFT,74VHC4053AFT

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1 CMOS Digital Integrated Circuits 74C4051AFT,74C4052AFT,74C4053AFT Silicon Monolithic 74C4051AFT,74C4052AFT,74C4053AFT 1. Functional Description 74C4051AFT:8-Channel Analog Multiplexer/Demultiplexer 74C4052AFT:Dual 4-Channel Analog Multiplexer/Demultiplexer 74C4053AFT:Triple 2-Channel Analog Multiplexer/Demultiplexer 2. General The 74C4051AFT, 74C4052AFT and 74C4053AFT are high-speed, low-voltage drive analog multiplexer/demultiplexers using silicon gate CMOS technology. In 3 and 5 systems these can achieve highspeed operation with the low power dissipation that is a feature of CMOS. The 74C4051AFT, 74C4052AFT and 74C4053AFT offer analog/digital signal selection as well as mixed signals. The 74C4051AFT has an 8-channel configuration, the 74C4052AFT has an 4-channel 2 configuration, and the 74C4053AFT has a 2-channel 3 configuration. The switches for each channel are turned ON by the control pin digital signals. All control inputs are equipped with a newly developed input protection circuit that avoids the need for a diode on the plus side (forward side from the input to the CC ). As a result, for example, signals can be permitted on the inputs even when the power supply voltage to the circuits is off. As a result of this input power protection, the 74C4051AFT, 74C4052AFT and 74C4053AFT can be used in a variety of applicatio, including in the system which has two power supplies, and in battery backup circuits. 3. Features (1) AEC-Q0 (Rev. ) (Note 1) (2) Wide operating temperature range: T opr = -40 to 5 (3) ow ON-resistance: R ON = 45 Ω (typ.) ( CC = ) R ON = 24 Ω (typ.) ( CC = ) (4) ow power dissipation: I CC = (max) (T a = 25 C) (5) igh noise immunity: I = 0.8 (max) CC = I = (min) CC = (6) Power down protection is provided on all control inputs. Note 1: This device is compliant with the reliability requirements of AEC-Q0. For details, contact your Toshiba sales representative. 4. Packaging TSSOP16B 20 Toshiba Corporation 1 Start of commercial production

2 5. Pin Assignment 74C4051AFT 74C4052AFT 74C4053AFT 20 Toshiba Corporation 2

3 6. Marking 74C4051AFT 74C4052AFT 74C4053AFT 20 Toshiba Corporation 3

4 7. System Diagram 74C4051AFT 74C4052AFT 74C4053AFT 20 Toshiba Corporation 4

5 8. Truth Table Input Inhibit Input C* X Input B X Input A X: Don't care *: Except 74C4052AFT X ON Channel 74C4051AFT None 9. Absolute Maximum Ratings (Note) ON Channel 74C4052AFT 0X, 0Y 1X, 1Y 2X, 2Y 3X, 3Y None ON Channel 74C4053AFT 0X, 0Y, 0Z 1X, 0Y, 0Z 0X, 1Y, 0Z 1X, 1Y, 0Z 0X, 0Y, 1Z 1X, 0Y, 1Z 0X, 1Y, 1Z 1X, 1Y, 1Z None Note Rating Supply voltage Input voltage Switch I/O voltage Input diode current I/O diode current Switch through current CC /ground current Power dissipation Storage temperature CC IN I/O I IK I I/OK I T I CC P D T stg (Note 1) -0.5 to to to CC ±25 ±25 ± to 0 Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditio (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability andbook ( andling Precautio / Derating Concept and Methods ) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: 180 mw in the range of T a = -40 to 85. From T a = 85 to 5 a derating factor of mw/ shall be applied until mw.. Operating Ranges (Note) ma ma ma ma mw Test Condition Rating Supply voltage Input voltage Switch I/O voltage Operating temperature Input rise and fall times Note: CC IN S T opr dt/dv CC = CC = CC = 5 ± 0.5 The operating ranges must be maintained to eure the normal operation of the device. Unused inputs must be tied to either CC or GND. to 0 to 0 to CC -40 to 5 0 to to 0 0 to 20 / 20 Toshiba Corporation 5

6 11. Electrical DC (Unless otherwise specified, T a = 25 ) Test Condition CC () Min Typ. Max igh-level input voltage I ow-level input voltage I ON-resistance R ON IN = I or I I/O = CC to GND Ω IN = I or I I/O = CC or GND Difference of ON-resistance between switches R ON IN = I or I I/O = CC to GND Ω Input/Output leakage current (Switch OFF) I OFF OS = CC or GND IS = GND to CC IN = I or I ±0.1 Input/Output leakage current (Switch ON, Output OPEN) I I/O OS = CC or GND IN = I or I ±0.1 Control input leakage current I IN IN = CC or GND ±0.1 Quiescent supply current I CC IN = CC or GND 20 Toshiba Corporation 6

7 11.2. DC (Unless otherwise specified, T a = -40 to 85 ) Test Condition CC () Min Max igh-level input voltage I ow-level input voltage I ON-resistance R ON IN = I or I I/O = CC to GND 8 46 Ω IN = I or I I/O = CC or GND Difference of ON-resistance between switches R ON IN = I or I I/O = CC to GND Ω Input/Output leakage current (Switch OFF) I OFF OS = CC or GND IS = GND to CC IN = I or I ±1.0 Input/Output leakage current (Switch ON, Output OPEN) I I/O OS = CC or GND IN = I or I ±1.0 Control input leakage current I IN IN = CC or GND ±1.0 Quiescent supply current I CC IN = CC or GND Toshiba Corporation 7

8 11.3. DC (Unless otherwise specified, T a = -40 to 5 ) Test Condition CC () Min Max igh-level input voltage I ow-level input voltage I ON-resistance R ON IN = I or I I/O = CC to GND 5 54 Ω IN = I or I I/O = CC or GND Difference of ON-resistance between switches R ON IN = I or I I/O = CC to GND Ω Input/Output leakage current (Switch OFF) I OFF OS = CC or GND IS = GND to CC IN = I or I ±4.0 Input/Output leakage current (Switch ON, Output OPEN) I I/O OS = CC or GND IN = I or I ±4.0 Control input leakage current I IN IN = CC or GND ± Quiescent supply current I CC IN = CC or GND Toshiba Corporation 8

9 11.4. AC (Unless otherwise specified, T a = 25,, Input: t r = t f = 3 ) Phase difference between input to output Output enable time Output disable time Control input capacitance Common terminal capacitance Switch terminal capacitance Feedthrough capacitance Power dissipation capacitance Part Number 74C4051AFT 74C4052AFT 74C4053AFT 74C4051AFT 74C4052AFT 74C4053AFT 74C4051AFT 74C4052AFT 74C4053AFT 74C4051AFT 74C4052AFT 74C4053AFT ϕ I/O t PZ,t PZ t PZ,t PZ C IN C IS C OS C IOS C PD Test Condition R = 1 kω R = 1 kω Figure 1 R = 1 kω Figure 1 All types Figure 2 Figure 2 Figure 2 Figure 2 (Note 1) CC () C (pf) Note 1: C PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current coumption without load. Average operating current can be obtained by the equation. I CC(opr) = C PD CC f IN + I CC Min Typ Max pf pf pf pf pf 20 Toshiba Corporation 9

10 11.5. AC (Unless otherwise specified, T a = -40 to 85,, Input: t r = t f = 3 ) Test Condition CC () C (pf) Min Max Phase difference between input to output ϕ I/O R = 1 kω Output enable time t PZ,t PZ R = 1 kω Figure Output disable time t PZ,t PZ R = 1 kω Figure Control input capacitance C IN pf AC (Unless otherwise specified, T a = -40 to 5,, Input: t r = t f = 3 ) Test Condition CC () C (pf) Min Max Phase difference between input to output ϕ I/O R = 1 kω Output enable time t PZ,t PZ R = 1 kω Figure Output disable time t PZ,t PZ R = 1 kω Figure Control input capacitance C IN pf 20 Toshiba Corporation

11 11.7. Analog Switch (T a = 25 ) ) (Note) Part Number Test Condition CC () Typ. Sine Wave Distortion TD R = 1 kω, C = pf f IN = 1 kz IN = p-p IN = 4.0 p-p % Maximum frequency respoe 74C4051AFT 74C4052AFT 74C4053AFT 74C4051AFT 74C4052AFT 74C4053AFT f MAX(I/O) IN is centered at ( CC /2). Adjust input for 0 dbm. Increase f IN frequency until db meter reads -3 db. R = Ω, C = pf, sine wave Figure Mz Feed through attenuation (switch OFF) FT IN is centered at ( CC /2). Adjust input for 0 dbm. R = 600 Ω, C = pf, f IN = 1 Mz, sine wave Figure db IN is centered at ( CC /2). Adjust input for 0 dbm. R = Ω, C = pf, f IN = 1 Mz, sine wave Figure Crosstalk (control input to signal output) X talk R = 600 Ω, C = pf, f IN = 1 Mz, square wave (t r = t f = 6 ) Figure m Crosstalk (between any switches) X talk IN is centered at ( CC /2). Adjust input for 0 dbm. R = 600 Ω, C = pf, f IN = 1 Mz, sine wave Figure db Note: These characteristics are determined by design of devices. 20 Toshiba Corporation 11

12 . AC Test Circuit Figure 1 t PZ, t PZ, t PZ, t PZ Figure 2 C IOS, C IS, C OS Figure 3 Frequency Respoe Figure 4 Feedthrough Attenuation 20 Toshiba Corporation

13 Figure 5 Cross Talk (control input to output signal) Figure 6 Cross Talk (between any two switches) 20 Toshiba Corporation 13

14 Package Dimeio : mm Weight: g (typ.) Package Name(s) Nickname: TSSOP16B 20 Toshiba Corporation 14

15 RESTRICTIONS ON PRODUCT USE 74C4051AFT,74C4052AFT,74C4053AFT Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSIBA"), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively "Product") without notice. This document and any information herein may not be reproduced without prior written permission from TOSIBA. Even with TOSIBA's written permission, reproduction is permissible only if reproduction is without alteration/omission. Though TOSIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are respoible for complying with safety standards and for providing adequate desig and safeguards for their hardware, software and systems which minimize risk and avoid situatio in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage to property, including data loss or corruption. Before customers use the Product, create desig including the Product, or incorporate the Product into their own applicatio, customers must also refer to and comply with (a) the latest versio of all relevant TOSIBA information, including without limitation, this document, the specificatio, the data sheets and application notes for Product and the precautio and conditio set forth in the "TOSIBA Semiconductor Reliability andbook" and (b) the itructio for the application with which the Product will be used with or for. Customers are solely respoible for all aspects of their own product design or applicatio, including but not limited to (a) determining the appropriateness of the use of this Product in such design or applicatio; (b) evaluating and determining the applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating parameters for such desig and applicatio. TOSIBA ASSUMES NO IABIITY FOR CUSTOMERS' PRODUCT DESIGN OR APPICATIONS. PRODUCT IS NEITER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS TAT REQUIRE EXTRAORDINARIY IG EES OF QUAITY AND/OR REIABIITY, AND/OR A MAFUNCTION OR FAIURE OF WIC MAY CAUSE OSS OF UMAN IFE, BODIY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBIC IMPACT ("UNINTENDED USE"). Except for specific applicatio as expressly stated in this document, Unintended Use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trai, ships and other traportation, traffic signaling equipment, equipment used to control combustio or explosio, safety devices, elevators and escalators, devices related to electric power, and equipment used in finance-related fields. IF YOU USE PRODUCT FOR UNINTENDED USE, TOSIBA ASSUMES NO IABIITY FOR PRODUCT. For details, please contact your TOSIBA sales representative. Do not disassemble, analyze, reverse-engineer, alter, modify, tralate or copy Product, whether in whole or in part. Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulatio. The information contained herein is presented only as guidance for Product use. No respoibility is assumed by TOSIBA for any infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No licee to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise. ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROIDED IN TE REEANT TERMS AND CONDITIONS OF SAE FOR PRODUCT, AND TO TE MAXIMUM EXTENT AOWABE BY AW, TOSIBA (1) ASSUMES NO IABIITY WATSOEER, INCUDING WITOUT IMITATION, INDIRECT, CONSEQUENTIA, SPECIA, OR INCIDENTA DAMAGES OR OSS, INCUDING WITOUT IMITATION, OSS OF PROFITS, OSS OF OPPORTUNITIES, BUSINESS INTERRUPTION AND OSS OF DATA, AND (2) DISCAIMS ANY AND A EXPRESS OR IMPIED WARRANTIES AND CONDITIONS REATED TO SAE, USE OF PRODUCT, OR INFORMATION, INCUDING WARRANTIES OR CONDITIONS OF MERCANTABIITY, FITNESS FOR A PARTICUAR PURPOSE, ACCURACY OF INFORMATION, OR NONINFRINGEMENT. Do not use or otherwise make available Product or related software or technology for any military purposes, including without limitation, for the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapo or missile technology products (mass destruction weapo). Product and related software and technology may be controlled under the applicable export laws and regulatio including, without limitation, the Japanese Foreign Exchange and Foreign Trade aw and the U.S. Export Administration Regulatio. Export and re-export of Product or related software or technology are strictly prohibited except in compliance with all applicable export laws and regulatio. Please contact your TOSIBA sales representative for details as to environmental matters such as the RoS compatibility of Product. Please use Product in compliance with all applicable laws and regulatio that regulate the inclusion or use of controlled substances, including without limitation, the EU RoS Directive. TOSIBA ASSUMES NO IABIITY FOR DAMAGES OR OSSES OCCURRING AS A RESUT OF NONCOMPIANCE WIT APPICABE AWS AND REGUATIONS. 20 Toshiba Corporation

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