MITOPENCOURSEWARE High-Speed Communication Circuits and Systems Lecture 29 Lowpass and Bandpass Delta-Sigma Modulation.
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1 MITOPENCOURSEWARE MASSACUSETTS INSTITUTE OF TECHNOLOGY High-Speed Communication Circuits and Systems Lecture 29 Lowpass and Bandpass Delta-Sigma Modulation Richard Schreier ANALOG DEVICES Copyright 2003 Richard Schreier 1
2 Outline 1 Σ Basics 1 st -Order Modulator 2 Advanced Σ High-Order Σ Modulators Multi-bit and Multi-Stage Modulation 3 Bandpass Σ Modulation 4 Example Bandpass ADC 2
3 1. Σ Basics 3
4 CTMOD1: A 1 st -Order Continuous-Time Σ Modulator The input signal, U, is converted into a sequence of bits, V (0,1). C U R Y V CK 0,I 4
5 Properties of CTMOD1 DC Inputs Integrator ensures that input current is exactly balanced by the (average) feedback current Infinite resolution Signals which alias to DC are rejected Inherent anti-aliasing 5
6 Non-ideal Effects in CTMOD1 Component shifts R R+ R or I I+ I merely changes full-scale. C C+ C scales the output of the integrator, but does not affect the comparator s decisions. Op-amp offset, input bias current, DAC imbalance All translate into a DC offset, which is unimportant in many communications applications. Comparator offset & hysteresis Overcome by integrator. Finite op-amp gain Creates dead-bands. 6
7 Non-ideal Effects (cont d) DAC jitter Adds noise. Resistor nonlinearity (e.g. due to self-heating) Introduces distortion. DAC nonlinearity Introduces distortion and intermodulation of shaped quantization noise. Capacitor nonlinearity Irrelevant. Op-amp nonlinearity Same effects as DAC nonlinearity, but less severe. 7
8 CTMOD1 Model Normalize R=1Ω, C=1F, I=1A, F s =1Hz Full-scale range is [0,1]V. Assume comparator and DAC are delay-free u c y c y v v c DAC 8
9 y c 1 Waveforms/Timing u = 0.2 Comparator Threshold 0-1 t v c 1 v(4) V = v(0) v(1) v(2) v(3) t 9
10 5% 1 s density l(r) l(ck) 1 v(u) v(yn) l(v) time, x1e-6 Seconds 10
11 10% 1 s density l(r) l(ck) 1 v(u) v(yn) l(v) time, x1e-6 Seconds 11
12 51% 1 s density l(r) l(ck) 1 v(u) v(yn) 0-1 l(v) time, x1e-6 Seconds 12
13 1 s density l(r) l(ck) 1 v(u) v(yn) l(v) time, x1e-6 Seconds 13
14 Analysis of CTMOD1 From the diagram: y c ( n) = y c ( n 1) + ( u c () τ v c () τ )dτ n n 1 1) Sample y c at integer time and identify y(n) = y c (n). n 2) Observe that 3) Define THEN v c ()dτ τ = vn ( 1) n 1 n un ( ) = u c ()dτ τ n 1 yn ( ) = yn ( 1) + un ( ) vn ( 1) Also, from the diagram vn ( ) = Qyn ( ( )) 14
15 CTMOD1 Equivalent MOD1 u c 1 0 dt u y v z -1 z -1 CTMOD1 is the same as a discrete-time firstorder modulator (MOD1) preceded by a sinc filter! 15
16 CTMOD1 NTF and STF The NTF is the same as MOD1: NTF( z) = 1 z 1 z-plane: MOD1 s STF is 1, so the overall STF is just the TF of the prefilter: 0 STF( s) = e st g p () t dt 1 e st ( 1 e = dt s ) = s ( 1 z 1 ) = , where z = e s s s-plane: 4π 2π 16
17 Frequency Responses 10 0 NTF db Q. Noise Notch STF Inherent Anti-Aliasing Frequency (Hz) 17
18 CTMOD1 Spectra 0 spec1 u = 1/32 db spec2-6db peak db -50 u = FS sine-wave freq, x1e6 Hertz 18
19 Properties of MOD1 Single-bit quantization yields inherent linearity. The DAC defines two points and two points can always be joined with a line. (Not so simple in continuous-time.) 0 u 1 y 1 MOD1 is stable for inputs all the way up to full-scale. The quantizer in MOD1 does not overload. Assuming the quantization error is white with power σ2 e, the in-band noise power is π 2 σ2 N2 e 0. ~12-bit performance at OSR=256. 3OSR ( ) 3 Doubling OSR reduces noise power by a factor of bits increase in SNR per octave increase in OSR 19
20 MOD1 Properties (cont d) a b The spectrum of the error is not white! Spectrum consists of a finite set of harmonics of b. DC input u = -- results in period-b behavior. Irrational DC inputs result in aperiodic behavior. Nonetheless, the spectrum of the error is still discrete! Spectrum consists of an infinite number of tones with frequencies that are irrational fractions of. Finite op-amp gain shifts NTF zero inside the unit circle and allows a range of u values to produce the same limit cycle. Worst case is around u = 0, 1, 1 ; 2 -- etc. yields dead bands. The behavior of MOD1 is erratic. f s f s 20
21 2. Advanced Σ 21
22 A Single-Loop Σ Modulator E U L 0 Y V L 1 Y = L 0 U+ L 1 V V = Y + E V = GU+ HE, where 1 H = & G = L 1 L 0 H 1 Inverse Relations: L 1 = 1 1/H, L 0 = G/H The zeros in H come from the poles in L 1 22
23 A 5 th -Order Lowpass NTF Zeros optimized for OSR=32 Pole/Zero diagram: 1 optimization flag OSR = 32; H = synthesizentf(5,osr,1);... Zeros spread across the band-of-interest to minimize the rms value of the NTF. Poles such that H =
24 Example: 5 th -Order Modulator 1 0 dbfs Time (sample number) NBW = 1.8x10 4 f s (8K-Point FFT) 0 Normalized Frequency (1 f s )
25 SQNR Limits for Binary Modulators 140 N = 8 N = 7 N = 6 N = 5 N = 4 N = 3 N = Peak SQNR (db) N = OSR 25
26 Multi-Bit Quantization Toolbox Conventions Single-bit quantizer output interpreted as ±1 instead of 0,1. Quantizer step size,, is 2; input range is [-1,+1]. Convention for multi-bit quantization is: M = v y e M = 2 M = v 1 y -1-2 e -3 mid-tread quantizer; v: even integers mid-rise quantizer; v: odd integers = 2; # of Q. levels is nlev = M+1, from M to +M; no-overload range ( e 1) is nlev to +nlev. v y e 26
27 SQNR Limits for 3-bit Modulators 140 N = 8 N = 7 N = 6 N = 5 N = 4 N = 3 N = 2 Peak SQNR (db) N = OSR 27
28 Theoretical SNR Limits for Multi-Bit Modulators SNR OSR = 8 with 1 LSB (peak) input H 2 = H = 4 N = 2 H = 8 N = 3 H = 16 N = 4 H = 32 N = 5 N = 6 H is the max. gain of the NTF over all frequencies. N = 8 N = Total RMS Noise Power (LSBs) 28
29 Multi-Bit Quantization Pros and Cons Multi-bit quantization overcomes stabilityinduced restrictions on the NTF Dramatic improvements are possible! Multi-bit quantization loses the inherent linearity property of a binary DAC DAC levels are not evenly spaced and so cannot be joined with a straight line. DAC errors are effectively added to the input, and thus are not shaped. Can be overcome with calibration, digital correction or mismatch-shaping. 29
30 Digital Correction u v Look-up Table v dig v dac DAC Lookup table contains the digital equivalent of each DAC level In practice, the look-up table only needs to store the differences between the actual and ideal DAC levels. Thus v dig = v dac, so DAC errors are now shaped by the loop! 30
31 Mismatch-Shaping Shapes mismatch-induced noise by ensuring that each element in a unit-element DAC is driven by a shaped sequence Two popular forms of mismatch-shaping are 16 element-rotation and element-swapping. Thermometer 16 Rotation 16 Swapping Time 1 Time 1 Time 31
32 Multi-Stage Modulation u 2 nd -order modulator 0.25 x 2 v 1 z -1 (2 - z -1 ) v mod = mod2; ABCD = mod.abcd; [v1 x] = simulatedsm(input,abcd); v2 = simulatedsm(x(2,:)/4,abcd); v = filter([0 2-1],1,v1) *filter([1-2 1],1,v2); 2 nd -order modulator G = z -1, H = (1 - z -1 ) 2 v 2 Composite NTF is 4H 2 4(1 - z -1 ) 2 dbfs OSR=32 SQNR = 56 db -120 NBW=1.8E v 1 v SQNR = 81 db 32
33 Σ Toolbox Summary Click on Control Systems, then delsig Specify OSR, lowpass/bandpass, no. of Q. levels. synthesizentf calculatetf scaleabcd NTF (and STF) available. Time-domain simulation and SNR measurements. realizentf predictsnr, simulatedsm, simulatesnr Parameters for a specific topology. Also designlcbp designhbf simulateesl stuffabcd mapabcd ABCD: state-space description of the modulator. Convex positive invariant set. findpis, find2dpis 33
34 3. Bandpass Σ 34
35 A Bandpass Σ ADC Like a lowpass Σ ADC, a bandpass Σ ADC converts its analog input into a bit-stream The output bit-stream is essentially equal to the input in the band of interest. A digital filter removes out-of-band noise and mixes the signal to baseband u v complex w analog input Bandpass Σ Modulator 1 Bandpass Filter/ Decimator digital output signal shaped noise baseband signal f s 2 f s 2 f s 2 f s 2 f B 35
36 BP Σ Perspective #1 It is just Filtering and Feedback Putting the poles of the loop filter at ω 0 forces H to have zeros at ω 0 Example system diagram: ω s 2 + ω2 0 Lots of gain at ω 0 DAC 36
37 BP Σ Perspective #2 It is just the result of an N-Path Transformation z z 2 (a pseudo 2-path transformation ) applied to Hz () = 1 z 1 yields H' () z = 1+ z 2 This transformation can be applied to any system that processes DT signals, including SC filters, digital filters, Σ modulators and even mismatch-shaping logic By replacing the state storage elements (registers), or by interleaving two copies of the original system and negating alternate inputs and outputs 37
38 BP Σ Perspective #3 It is something New and Valuable BP Σ offers a way to make a tuned ADC Possibly the only way. Ideally-suited to narrowband systems, i.e. radios. BP Σ keeps the signal away from 1/f noise as well as low-frequency distortion products Like regular narrowband bandpass systems, second-harmonic distortion is not problematic. z -1 z -1 z -1-1 OR 1,1,-1,-1 1,1,-1,-1 H(z) H(z) 38
39 A 6 th -Order Bandpass NTF Pole/Zero diagram: OSR = 64; f0 = 1/6; H=synthesizeNTF(6,OSR,1,[],f0);
40 Example Waveform 8 th -Order f s /8 Bandpass Modulator u 1 v Time (sample number) 40
41 Example Spectrum 8 th -Order f s /8 Bandpass Modulator 0-20 SQNR = 100 OSR = 64 dbfs/nbw NBW = 1.8x10 4 f s Normalized Frequency (1 f s ) 41
42 Bandpass Modulator Structure u Resonator Resonator Q Quantizer v Loop Filter The loop filter consists of a cascade of resonators The resonance frequencies determine the poles of the loop filter and hence the zeros of the NTF. Multibit and multistage variants are also possible 42
43 4. Design Example 43
44 A Dual-Conversion Superheterodyne Receiver LNA AGC ADC DSP LO 1 LO 2 CK RF 1 st IF 2 nd IF Sample Rate MHz MHz 2-4 MHz ksps A bandpass ADC fits naturally into this narrowband system Perfect I/Q, high dynamic range. Low power? 44
45 System Partitioning Front End Back End N Custom DSP LO 1 LO 2 CK Goal: a general-purpose, high-performance, low-power back-end 45
46 Traditional Implementation MIXER IF 1 LNA AAF VGA IF 2 BP ADC LO 2 Numerous high-dynamic range blocks Noise and power budgets are very tight Large VGA range needed 46
47 Eliminating the AAF with a Continuous-Time BP Σ ADC IF 2 g m g m FLASH IDAC IDAC Anti-alias filtering is inherent But still need a low-noise, linear V-I converter 47
48 Eliminating the Input g m Mixer IF 1 LNA g m Remainder of ADC LO 2 IDAC The output of the mixer is available in current form, so 48
49 Merge ADC with Mixer! MIXER ADC input is a current! ADC No DC drop! LO 2 IDAC TO/FROM ADC BACKEND IF 1 LNA V-I CONVERTER Eliminates redundant I-V & V-I conversion Gives mixer and IDAC more headroom 49
50 Merge ADC with Mixer! No noise! No distortion! No power! LO 2 IDAC IF 1 LNA V-I CONVERTER LC tank effectively adds gain, without adding noise, adding distortion or consuming power 50
51 Noise Analysis v n g m Z + v n Z v n + V in g m V in Z LNA/Mixer Tank Noise in the ADC backend is attenuated by g m times the tank impedance In this work, g m 10 ma/v 51
52 Z eff Near resonance, Z L = Z C Z L,C 300Ω in this design At resonance, Z Q Z L,C About 6kΩ for Q = 20 g m Z 60. More generally, the effective tank impedance is found by integrating the input-referred noise over the band of interest: v n dω g m Z( ω) v n = Y( ω) 2 dω = g m v n g m Z eff Z eff = ( Y rms ) 1 52
53 Z vs. Frequency Z 10K 5K 2K Ideal Z eff = 7K Q = 20 Z eff = 4.4K 1K 0.07 f f/f 0 Q = 20 reduces Z eff by about 4 db 53
54 Tuning the LC Tank f 0 /f 0 = 2% 3 db reduction in Z eff Inductor accuracy is 10%, so tuning is required Make an oscillator: Off-chip tank Cap. array Negative-g m 54
55 Remainder of ADC? ADC Backend Flash IDAC Add resonator stages until the quantization noise of the flash is low enough 55
56 Second Resonator? ADC Backend Flash IDAC LC: Needs more external components plus associated pins Active-RC: 2 ma for 50nV/ Hz input-referred noise Switched-Cap: est. >10mA for same noise 56
57 Third Resonator? +? Flash + Active-RC: Q 10 Need 4 th resonator Switched-Cap: Q is high & drift is low; <1 ma for 300 nv/ Hz i.r.n. 57
58 Complete ADC L C RC SC 9-Level Flash Data out IF 1 LO 2 LNA/ Mixer IDAC DEM 9mA 2 ma 3 ma 1 ma 1 ma Eliminates high-power VGA & AAF 2/3 of the total power used by LNA, Mixer & IDAC Uses cts-time and discrete-time elements, plus multi-bit quantization and mismatch-shaping 58
59 ADC in More Detail External LC Tank Tunable Elements f CLK = 9-36 MHz OSR = 48 to 960 RC SC Flash IF MHz LNA Mixer IDAC DEM LO 2 Full-Scale Adjust Can save power under small-signal conditions by reducing IDAC s full-scale By a factor of 4, in this ADC 59
60 Noise vs. Full-Scale Total LNA/Mixer Input-Referred Noise (db relative to a 300Ω resistor) RC Quantization IDAC MismatchIDAC Thermal SC -30 dbm -18 dbm 50mV Full-Scale pp 200 mv pp 60
61 Measured STF & NTF 0 20 Measured STF STF dbfs/nbw f 0 = f CLK /8 Measured PSD NBW = 5.9 khz NTF (scaled) f CLK = 32 MHz Frequency (MHz) 61
62 In-Band Spectrum (OSR=48) dbfs/nbw SNR = 81 db f IF1 = 103 MHz f CLK = 26 MHz SFDR = 103dB -120 BW = 270kHz NBW = 200Hz Frequency Offset (khz) 62
63 In-Band Spectrum (OSR=900) dbfs/nbw SNR = 92 db f IF1 = 73 MHz f CLK = 36 MHz SFDR = 106dB khz offset -120 NBW = 15Hz Frequency Offset (khz) 63
64 SNR vs. Input Power OSR =900 f IF1 = 273 MHz f CLK = 32 MHz SNR (db) OSR = FS range: 30 to 18 dbm DR = 90dB P in (dbm) 64
65 Architectural Highlights Merging a mixer with a continuous-time bandpass ADC containing an LC tank yields a flexible, high-performance, low-power receiver backend. Performing a component-count/performance/ power trade-off in each resonator section results in a multi-bit, hybrid continuous-time/discretetime architecture. A variable full-scale saves power and reduces noise. 65
66 Performance Summary Bandwidth khz Input Frequency MHz Clock Frequency 9-36 MHz Full-Scale Range 12 db Die Area 5 mm f IF = 73MHz, BW = 333kHz, f CLK = 32MHz, VDD = 3V: Dynamic Range 90dB Current Consumption 16.5 ma Noise min FS 9 db IIP3 0dBm 66
67 Bandpass Σ ADCs 120 Dynamic Range (db) kHz Jantzi/Ferguson 1994 Schreier 2002 Veldhoven 2003 Salo 2002 Ueno 2002 Tabatabaei 2000 Hairapetian 1996 Norman 1996 Henkel 2002 Salo MHz Bandwidth Bulzachelli 2003 Raghavan MHz 67
68 Summary Σ is fun All kinds of exotic behavior: limit-cycles, dead-bands sub-harmonic locking and even chaotic dynamics! Σ is a rich field ADCs and DACs; Single-bit and Multi-bit; Singlestage and Multi-stage; Lowpass and Bandpass; Discrete-time and Continuous-time A bandpass Σ ADC converts an IF signal into digital form and can do so with high dynamic range and low power consumption With wideband or tunable modulators, conversion of RF to digital may soon be feasible. ADC = Antenna to Digital Converter 68
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