DATASHEET EL5156, EL5157, EL5256, EL5257. Features. Applications. Pinouts. <1mV Voltage Offset, 600MHz Amplifiers

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1 EL6, EL7, EL6, EL7 <mv Voltage Offset, 6MHz Amplifiers NOT RECOMMENDED FOR NEW DESIGNS NO RECOMMENDED REPLACEMENT contact our Technical Support Center at 888INTERSIL or DATASHEET FN786 Rev 6. July 7, 9 The EL6, EL7, EL6, and EL7 are 6MHz bandwidth db voltage mode feedback amplifiers with DC accuracy of <.%, mv offsets and kv/v open loop gains. These amplifiers are ideally suited for applications ranging from precision measurement instrumentation to high speed video and monitor applications demanding the very highest linearity at very high frequency. Capable of operating with as little as 6.mA of current from a single supply ranging from V to V and dual supplies ranging from ±.V to ±.V, these amplifiers are also well suited for handheld, portable and batterypowered equipment. With their capability to output as much as ma, any member of this family is comfortable with demanding load conditions. Single amplifiers are available in SOT packages and duals in a Ld MSOP package for applications where board space is critical. Additionally, singles and duals are available in the industrystandard 8 Ld SOIC package. All parts operate over the industrial temperature range of C to 8 C. Features 6MHz db bandwidth, MHz.dB bandwidth 7V/µs slew rate <mv input offset Very high open loop gains 9dB Low supply current = 6mA ma output current Single supplies from V to V Dual supplies from ±.V to ±V Fast disable on the EL6 and EL6 Low cost Pbfree available (RoHS compliant) Applications Imaging Pinouts EL6 (8 LD SOIC) TOP VIEW Instrumentation Video Communications devices EL7 ( LD SOT) TOP VIEW NC 8 CE OUT VS IN IN 7 6 VS OUT IN VS IN VS NC EL6 ( LD MSOP) TOP VIEW EL7 (8 LD SOIC) TOP VIEW INA INA OUTA 8 VS CEA VS CEB OUTA VS OUTB INA 7 6 OUTB INA VS INB INB INB 6 INB FN786 Rev 6. Page of 7 July 7, 9

2 EL6, EL7, EL6, EL7 Ordering Information PART NUMBER PART MARKING PACKAGE PKG. DWG. # EL6IS 6IS 8 Ld SOIC ( mil) MDP7 EL6IST7* 6IS 8 Ld SOIC ( mil) MDP7 EL6IST* 6IS 8 Ld SOIC ( mil) MDP7 EL6ISZ (Note) 6ISZ 8 Ld SOIC ( mil) (Pbfree) MDP7 EL6ISZT7* (Note) 6ISZ 8 Ld SOIC ( mil) (Pbfree) MDP7 EL6ISZT* (Note) 6ISZ 8 Ld SOIC ( mil) (Pbfree) MDP7 EL7IWT7* BHAA Ld SOT MDP8 EL7IWT7A* BHAA Ld SOT MDP8 EL7IWZT7* (Note) BAAM Ld SOT (Pbfree) MDP8 EL7IWZT7A* (Note) BAAM Ld SOT (Pbfree) MDP8 EL6IY BAHAA Ld MSOP (.mm) MDP EL6IYT7* BAHAA Ld MSOP (.mm) MDP EL6IYT* BAHAA Ld MSOP (.mm) MDP EL7IS 7IS 8 Ld SOIC ( mil) MDP7 EL7IST7* 7IS 8 Ld SOIC ( mil) MDP7 EL7IST* 7IS 8 Ld SOIC ( mil) MDP7 EL7IY BAJAA 8 Ld MSOP (.mm) MDP EL7IYT7* BAJAA 8 Ld MSOP (.mm) MDP EL7IYT* BAJAA 8 Ld MSOP (.mm) MDP *Please refer to TB7 for details on reel specifications. NOTE: These Intersil Pbfree plastic packaged products employ special Pbfree material sets; molding compounds/die attach materials and % matte tin plate PLUS ANNEAL e termination finish, which is RoHS compliant and compatible with both SnPb and Pbfree soldering operations. Intersil Pbfree products are MSL classified at Pbfree peak reflow temperatures that meet or exceed the Pbfree requirements of IPC/JEDEC J STD. FN786 Rev 6. Page of 7 July 7, 9

3 EL6, EL7, EL6, EL7 Absolute Maximum Ratings (T A = C) Supply Voltage between V S and V S V Maximum Slewrate from V S and V S V/µs Maximum Continuous Output Current ma Current into I N, I N, CE ma Pin Voltages GND.V to V S.V Thermal Information Junction Temperature C Storage Temperature C to C Ambient Operating Temperature C to 8 C Power Dissipation See Curves Pbfree reflow profile see link below CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: T J = T C = T A Electrical Specifications V S = V, V S = V, CE = V, R F = R G = 6, R L =, T A = C, Unless Otherwise Specified. PARAMETER DESCRIPTION CONDITIONS MIN (Note ) TYP MAX (Note ) UNIT AC PERFORMANCE BW db Bandwidth A V =, 6 MHz A V =, R L = 8 MHz GBWP Gain Bandwidth Product R L = MHz BW.dB Bandwidth A V = 7 MHz SR Slew Rate V O =.V to.v, A V =, R L = 6 V/µs V O =.V to.v, A V =, 7 V/µs t S.% Settling Time A V = ns dg Differential Gain Error A V =, R L =. % dp Differential Phase Error A V =, R L =. V N Input Referred Voltage Noise nv/ Hz I N Input Referred Current Noise. pa/ Hz DC PERFORMANCE V OS Offset Voltage. mv T C V OS Input Offset Voltage Temperature Coefficient Measured from T MIN to T MAX µv/ C A VOL Open Loop Gain V O is from.v to.v kv/v INPUT CHARACTERISTICS CMIR Common Mode Input Range Guaranteed by CMRR test.. V CMRR Common Mode Rejection Ratio V CM =.V to.v 8 8 db I B Input Bias Current EL6 and EL7. µa EL6 and EL7 6 6 na I OS Input Offset Current na R IN Input Resistance M C IN Input Capacitance pf OUTPUT CHARACTERISTICS V OUT Output Voltage Swing R L = to GND ±. ±.6 V to GND ±.6 ±.8 V I OUT Peak Output Current R L = to GND ±8 ± ma FN786 Rev 6. Page of 7 July 7, 9

4 EL6, EL7, EL6, EL7 Electrical Specifications V S = V, V S = V, CE = V, R F = R G = 6, R L =, T A = C, Unless Otherwise Specified. (Continued) PARAMETER DESCRIPTION CONDITIONS MIN (Note ) TYP MAX (Note ) UNIT ENABLE (EL6 and EL6 ONLY) t EN Enable Time ns t DIS Disable Time ns I IHCE CE Pin Input High Current CE = V S µa I ILCE CE Pin Input Low Current CE = V S µa V IHCE CE Input High Voltage for Powerdown V S V V ILCE CE Input Low Voltage for Powerup V S V SUPPLY I SON Supply Current Enabled (per amplifier) No load, V IN = V, CE = V ma I SOFF Supply Current Disabled (per amplifier) No load, V IN = V, CE = V µa PSRR Power Supply Rejection Ratio DC, V S = ±.V to ±6.V 7 9 db NOTE:. Parts are % tested at C. Overtemperature limits established by characterization and are not production tested. Typical Performance Curves R L = A V = A V = A V = A V = PHASE ( ) R L = A V = A V = A V = 6 k M M M G k M M M G FIGURE. SMALL SIGNAL FREQUENCY RESPONSE GAIN FIGURE. SMALL SIGNAL FREQUENCY RESPONSE PHASE FOR VARIOUS GAINS V S = ±V A V = R F = R G = 6 R L = R L = 7 R L = GAIN (db) A V = C L = 7pF C L = pf C L = pf 6 k M M M G k M M M G FIGURE. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS R L FIGURE. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS C L FN786 Rev 6. Page of 7 July 7, 9

5 EL6, EL7, EL6, EL7 Typical Performance Curves (Continued) A V = R F = R G = C L = pf C L = pf C L = 8.pF C L = pf GAIN (db) 6 8 A V = R L = R F = R G = 6 C L = pf C L = pf C L = pf C L = pf C L = 8pF k M M M G FIGURE. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS C L k M M M G FIGURE 6. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS C L A V = C L = 8pF C L = pf C L = 68pF C L = pf A V = ±.V ±.V ±.V ±.V k M M M G FIGURE 7. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS C L k M M M G FIGURE 8. FREQUENCY RESPONSE vs POWER SUPPLY A V = A V = A V = A V = V S = ±V R F = 6 R L = A V = A V = k M M M G FIGURE 9. EL6 SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS GAINS 6 k M M M G FIGURE. SMALL SIGNAL INVERTING FREQUENCY RESPONSE FOR VARIOUS GAINS FN786 Rev 6. Page of 7 July 7, 9

6 EL6, EL7, EL6, EL7 Typical Performance Curves (Continued) A V = C L =.pf R L = R L = A V = R L = R L = R L = 6 k M M M G FIGURE. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS R L k M M M G FIGURE. EL6 SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS R L A V = R F = C IN = pf C IN = 8.pF C IN =.7pF C IN =.pf C IN = pf A V = R F = C IN = 68pF C IN = 7pF C IN = pf C IN = pf C IN =.7pF k M M M FIGURE. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS C IN 6 k M M M FIGURE. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS C IN V S = ±V A V = R L = R R F = R G = k F = R G = R F = R G = 6 R F = R G = R F = R G = 6 A V = R F = R G = k R F = R G = k R F = R G = k R F = R G = R F = R G = 6 k M M M G FIGURE. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS R F AND R G k M M M G FIGURE 6. EL6 SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS R F AND R G FN786 Rev 6. Page 6 of 7 July 7, 9

7 EL6, EL7, EL6, EL7 Typical Performance Curves (Continued) A V = R L = 7dBm dbm dbm dbm dbm A V = CH CH k M M M G FIGURE 7. LARGE SIGNAL FREQUENCY RESPONSE FOR VARIOUS INPUT AMPLITUDES k M M M G FIGURE 8. CHANNEL TO CHANNEL FREQUENCY RESPONSE CROSS TALK (db) 6 8 A V = BW (MHz) 7 6 A V =,, C L = pf A V =, R L = A V =, R L = k M M M G FIGURE 9. EL6 CROSSTALK vs FREQUENCY CHANNEL A TO B AND B TO A V S (V) FIGURE. BANDWIDTH vs SUPPLY VOLTAGE A V = R L = R L = R L = k VOLTAGE NOISE (nv/ Hz), CURRENT NOISE (pa/ Hz) k V N I N 6 k M M M G FIGURE. SMALL SIGNAL FREQUENCY RESPONSE FOR VARIOUS R L k M M M M M G FIGURE. VOLTAGE AND CURRENT NOISE vs FREQUENCY FN786 Rev 6. Page 7 of 7 July 7, 9

8 EL6, EL7, EL6, EL7 Typical Performance Curves (Continued) k A V = R L = R G = R F = CMRR (db) 6 8 IMPEDANCE ( ) k k k M M M FIGURE. CMRR. k k k M M M FIGURE. OUTPUT IMPEDANCE DISABLED ISOLATION (db) 7 9 V S = ±V A V = R L = k M M M G I S (ma) I S.7 I S V S (V) FIGURE. INPUT TO OUTPUT ISOLATION vs FREQUENCY DISABLE FIGURE 6. SUPPLY CURRENT vs SUPPLY VOLTAGE A V = SUPPLY = ±V ±.ma A V = C L = pf ENABLE 9ns DISABLE ns PEAKING (db)..... TIME (ns/div) FIGURE 7. ENABLE/DISABLE RESPONSE V S (V) FIGURE 8. PEAKING vs SUPPLY VOLTAGE FN786 Rev 6. Page 8 of 7 July 7, 9

9 EL6, EL7, EL6, EL7 Typical Performance Curves (Continued) A V = SUPPLY = ±V ±.ma OUTPUT = mv PP A V = SUPPLY = ±V ±.ma OUTPUT = mv PP V OUT (mv/div) RISE % TO 8% t =.ns V OUT (mv/div) FALL 8% TO % t =.7ns TIME (ns/div) TIME (ns/div) FIGURE 9. SMALL SIGNAL RISE TIME FIGURE. SMALL SIGNAL FALL TIME V OUT (mv/div) A V = SUPPLY = ±V ±.ma OUTPUT =.V PP RISE % TO 8% t =.67ns V OUT (mv/div) A V = SUPPLY = ±V ±.ma OUTPUT =.V PP FALL 8% TO % t =.7ns TIME (ns/div) TIME (ns/div) FIGURE. LARGE SIGNAL RISE TIME FIGURE. LARGE SIGNAL FALL TIME JEDEC JESD7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD.8 JEDEC JESD LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD. POWER DISSIPATION (W) W 87mW mw SOT JA = C/W SO8 JA = C/W MSOP JA = C/W POWER DISSIPATION (W) mW 88mW 86mW MSOP JA = C/W SO8 JA = 6 C/W SOT JA = 6 C/W AMBIENT TEMPERATURE ( C) AMBIENT TEMPERATURE ( C) FIGURE. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FN786 Rev 6. Page 9 of 7 July 7, 9

10 EL6, EL7, EL6, EL7 EL6 Product Description The EL6, EL7, EL6, and EL7 are wide bandwidth, single or dual supply, low power and low offset voltage feedback operational amplifiers. Both amplifiers are internally compensated for closed loop gain of or greater. Connected in voltage follower mode and driving a load, the db bandwidth is about 6MHz. Driving a load and a gain of, the bandwidth is about 8MHz while maintaining a 6V/µs slew rate. The EL6 and EL6 are available with a powerdown pin to reduce power to 7µA typically while the amplifier is disabled. Input, Output and Supply Voltage Range The EL6 and EL7 families have been designed to operate with supply voltage from V to V. That means for single supply application, the supply voltage is from V to V. For split supplies application, the supply voltage is from ±.V to ±V. The amplifiers have an input common mode voltage range from.v above the negative supply (VS pin) to.v below the positive supply (VS pin). If the input signal is outside the above specified range, it will cause the output signal to be distorted. The outputs of the EL6 and EL7 families can swing from V to V for V S = ±V. As the load resistance becomes lower, the output swing is lower. If the load resistor is, the output swing is about V at a V supply. If the load resistor is, the output swing is from.v to.v. Choice of Feedback Resistor and Gain Bandwidth Product For applications that require a gain of, no feedback resistor is required. Just short the output pin to the inverting input pin. For gains greater than, the feedback resistor forms a pole with the parasitic capacitance at the inverting input. As this pole becomes smaller, the amplifier's phase margin is reduced. This causes ringing in the time domain and peaking in the frequency domain. Therefore, R F can't be very big for optimum performance. If a large value of R F must be used, a small capacitor in the few Pico farad range in parallel with R F can help to reduce the ringing and peaking at the expense of reducing the bandwidth. For gain of, R F = is optimum. For the gains other than, optimum response is obtained with R F between to 7. The EL6 and EL7 families have a gain bandwidth product of MHz. For gains, its bandwidth can be predicted by Equation : Gain BW = MHz (EQ. ) Video Performance For good video performance, an amplifier is required to maintain the same output impedance and the same frequency response as DC levels are changed at the output. This is especially difficult when driving a standard video load of, because of the change in output current with DC level. The dg and dp for these families are about.6% and.%, while driving at a gain of. Driving high impedance loads would give a similar or better dg and dp performance. Driving Capacitive Loads and Cables The EL6 and EL7 families can drive 7pF loads in parallel with with less than db of peaking at gain of. If less peaking is desired in applications, a small series resistor (usually between to ) can be placed in series with the output to eliminate most peaking. However, this will reduce the gain slightly. If the gain setting is greater than, the gain resistor R G can then be chosen to make up for any gain loss which may be created by the additional series resistor at the output. When used as a cable driver, double termination is always recommended for reflectionfree performance. For those applications, a backtermination series resistor at the amplifier's output will isolate the amplifier from the cable and allow extensive capacitive drive. However, other applications may have high capacitive loads without a backtermination resistor. Again, a small series resistor at the output can help to reduce peaking. Disable/PowerDown The EL6 and EL6 can be disabled and their output placed in a high impedance state. The turnoff time is about ns and the turnon time is about ns. When disabled, the amplifier's supply current is reduced to 7µA typically, thereby effectively eliminating the power consumption. The amplifier's powerdown can be controlled by standard TTL or CMOS signal levels at the ENABLE pin. The applied logic signal is relative to VS pin. Letting the ENABLE pin float or applying a signal that is less than.8v above V S will enable the amplifier. The amplifier will be disabled when the signal at ENABLE pin is above V S.V. Output Drive Capability The EL6 and EL7 families do not have internal short circuit protection circuitry. They have a typical short circuit current of 9mA and 7mA. If the output is shorted indefinitely, the power dissipation could easily overheat the die or the current could eventually compromise metal integrity. Maximum reliability is maintained if the output current never exceeds ±ma. This limit is set by the design of the internal metal interconnect. Note that in transient applications, the part is robust. Power Dissipation With the high output drive capability of the EL and EL families, it is possible to exceed the C absolute maximum junction temperature under certain load current conditions. Therefore, it is important to calculate the maximum junction temperature for an application to determine if load conditions or package types need to be modified to assure operation of the amplifier in a safe operating area. FN786 Rev 6. Page of 7 July 7, 9

11 EL6, EL7, EL6, EL7 The maximum power dissipation allowed in a package is determined according to Equation : T JMAX T AMAX PD MAX = (EQ. ) JA Where: T JMAX = Maximum junction temperature T AMAX = Maximum ambient temperature JA = Thermal resistance of the package The maximum power dissipation actually produced by an IC is the total quiescent supply current times the total power supply voltage, plus the power in the IC due to the load, or: For sourcing: PD MAX = n V OUTi V S I SMAX V S V OUTi R Li (EQ. ) i = For sinking: n PD MAX = V S I SMAX V OUTi V S I (EQ. ) LOADi Where: V S = Supply voltage i = I SMAX = Maximum quiescent supply current V OUT = Maximum output voltage of the application R LOAD = Load resistance tied to ground By setting the two PD MAX equations equal to each other, we can solve the output current and R LOAD to avoid the device overheat. Power Supply Bypassing Printed Circuit Board Layout As with any high frequency device, a good printed circuit board layout is necessary for optimum performance. Lead lengths should be as short as possible. The power supply pin must be well bypassed to reduce the risk of oscillation. For normal single supply operation, where the VS pin is connected to the ground plane, a single.7µf tantalum capacitor in parallel with a.µf ceramic capacitor from VS to GND will suffice. This same capacitor combination should be placed at each supply pin to ground if split supplies are to be used. In this case, the V S pin becomes the negative supply rail. See Figure 7 for a complete tuned power supply bypass methodology. Printed Circuit Board Layout For good AC performance, parasitic capacitance should be kept to a minimum. Use of wire wound resistors should be avoided because of their additional series inductance. Use of sockets should also be avoided if possible. Sockets add parasitic inductance and capacitance that can result in compromised performance. Minimizing parasitic capacitance at the amplifier's inverting input pin is very important. The feedback resistor should be placed very close to the inverting input pin. Strip line design techniques are recommended for the signal traces. I LOAD = Load current N = number of amplifiers (max = ) FN786 Rev 6. Page of 7 July 7, 9

12 EL6, EL7, EL6, EL7 Application Circuits Sallen Key Low Pass Filter A common and easy to implement filter taking advantage of the wide bandwidth, low offset and low power demands of the EL. A derivation of the transfer function is provided for convenience (See Figure ). Sallen Key High Pass Filter Again this useful filter benefits from the characteristics of the EL. The transfer function is very similar to the low pass so only the results are presented (See Figure 6). TUNED POWER BYPASS NETWORK C V V L µh R k C nf C nf K R B = R A V O = K R C S V O V O V V i K V V O V i = R R C S K H s = R C R C S K R C R C R C s V R k R k C nf nf V V V OUT R 7 k H jw = w R C R C jw K R C R C R C Holp = K R A k R B k TUNED POWER BYPASS NETWORK C nf R 6 k C nf wo = R C R C Q = R K C R C R C R C R C R C Holp = K L µh V V wo = RC Q = K Equations simplify if we let all components be equal to R = C FIGURE. SALLEN KEY LOW PASS FILTER FN786 Rev 6. Page of 7 July 7, 9

13 EL6, EL7, EL6, EL7 V V Holp = K wo = R C R C TUNED POWER BYPASS NETWORK L µh R k C C nf Q = R K C R C R C R C R C R C C nf Holp = K K V R k R k C nf nf V V V OUT R 7 k wo = RC Q = K R B R A k k TUNED POWER BYPASS NETWORK C nf R 6 k L µh C nf V V Equations simplify if we let all components be equal to R = C FIGURE 6. SALLEN KEY HIGH PASS FILTER Differential Output Instrumentation Amplifier The addition of a third amplifier to the conventional three amplifier instrumentation amplifier introduces the benefits of differential signal realization, specifically the advantage of using common mode rejection to remove coupled noise and ground potential errors inherent in remote transmission. This configuration also provides enhanced bandwidth, wider output swing and faster slew rate than conventional three amplifier solutions with only the cost of an additional amplifier and a few resistors. e A R R G R R R R A R R e o REF e o R A e o e A R R e o = R R G e e e o = R R G e e e o = R R G e e BW f C = A Di A Di = R R G FN786 Rev 6. Page of 7 July 7, 9

14 EL6, EL7, EL6, EL7 Strain Gauge The strain gauge is an ideal application to take advantage of the moderate bandwidth and high accuracy of the EL. The operation of the circuit is very straightforward. As the strain variable component resistor in the balanced bridge is subjected to increasing strain, its resistance changes, resulting in an imbalance in the bridge. A voltage variation from the referenced high accuracy source is generated and translated to the difference amplifier through the buffer stage. This voltage difference as a function of the strain is converted into an output voltage. FIGURE 7. STRAIN GAUGE OPERATIONAL CIRCUIT FN786 Rev 6. Page of 7 July 7, 9

15 EL6, EL7, EL6, EL7 Small Outline Package Family (SO) A D h X N (N/) E E PIN # I.D. MARK c A SEE DETAIL X B. M C A B (N/) L C e H A SEATING PLANE GAUGE PLANE.. C. M C A B b A DETAIL X L ± MDP7 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SO6 SO6 (. ) SO SO SO8 SYMBOL SO8 SO (. ) (SOL6) (SOL) (SOL) (SOL8) TOLERANCE NOTES A MAX A A b c D , E E , e Basic L L Basic h Reference N Reference Rev. M /7 NOTES:. Plastic or metal protrusions of.6 maximum per side are not included.. Plastic interlead protrusions of. maximum per side are not included.. Dimensions D and E are measured at Datum Plane H.. Dimensioning and tolerancing per ASME Y.M99 FN786 Rev 6. Page of 7 July 7, 9

16 EL6, EL7, EL6, EL7 SOT Package Family. C D X C E SEATING PLANE. C NX e N. C AB X (L) A 6 e B. M C AB D b NX D H E A D. C X A MDP8 SOT PACKAGE FAMILY MILLIMETERS SYMBOL SOT SOT6 TOLERANCE A.. MAX A.. ±. A.. ±. b.. ±. c.. ±.6 D.9.9 Basic E.8.8 Basic E.6.6 Basic e.9.9 Basic e.9.9 Basic L.. ±. L.6.6 Reference N 6 Reference Rev. F /7 NOTES:. Plastic or metal protrusions of.mm maximum per side are not included.. Plastic interlead protrusions of.mm maximum per side are not included.. This dimension is measured at Datum Plane H.. Dimensioning and tolerancing per ASME Y.M99.. Index area Pin # I.D. will be located within the indicated zone (SOT6 only). 6. SOT version has no center lead (shown as a dashed line). A GAUGE PLANE. c L FN786 Rev 6. Page 6 of 7 July 7, 9

17 EL6, EL7, EL6, EL7 Mini SO Package Family (MSOP). M C A B A D (N/) N MDP MINI SO PACKAGE FAMILY MILLIMETERS SYMBOL MSOP8 MSOP TOLERANCE NOTES A.. Max. A.. ±. E E PIN # I.D. A ±.9 b...7/.8 c.8.8 ±. B (N/) D.. ±., E.9.9 ±. E.. ±., C e H e.6. Basic L.. ±. SEATING PLANE. C N LEADS c L b SEE DETAIL "X".8 M C A B A L.9.9 Basic N 8 Reference Rev. D /7 NOTES:. Plastic or metal protrusions of.mm maximum per side are not included.. Plastic interlead protrusions of.mm maximum per side are not included.. Dimensions D and E are measured at Datum Plane H.. Dimensioning and tolerancing per ASME Y.M99. A GAUGE PLANE. A L DETAIL X ± Copyright Intersil Americas LLC 9. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN786 Rev 6. Page 7 of 7 July 7, 9