ISD-VM1110A Chip-On-Board Module 10-Second Duration

Transcription

1 ISD-VM0A Chip-On-Board Module 0-Second Duration FEATURES Easy-to-use single-chip voice Record/Playback chip-on-board module High-quality, natural voice/audio reproduction Push-button interface Playback can be edge- or levelactivated Automatic power-down mode Enters standby mode immediately following a Record or Playback cycle 0.5 µa standby current (typical) Zero-power message storage Eliminates battery backup circuits Fully addressable to handle multiple messages 00-year message retention (typical) 00,000 record cycles (typical) On-chip clock source No algorithm development required Single +5 volt power supply (4.5 V to 5.5 V V CC ) Available in printed circuit board form with COB Chip-On-Board construction ISD-VM0A DEVICE SUMMARY Part Number Minimum Duration (Seconds) Input Sample Rate (KHz) Typical Filter Pass Band (KHz) ISD-VM0A Information Storage Devices, Inc. 29

2 ISD-VM0A Product Data Sheets - GENERAL DESCRIPTION Information Storage Devices ISD-VM0A Chip- On-Board module provides high-quality, singlechip record/playback solutions to short-duration messaging applications. The ISD-VM0A module integrates the ISD0 ChipCorder die, which contains an on-chip oscillator, microphone pre-amplifier, automatic gain control, antialiasing filter, smoothing filter, and a speaker amplifier, along with passive components on a single PC board. The ISD-VM0A enables a minimum record/playback subsystem to be configured easily with a microphone, a speaker, two push-buttons, and a power source. All connections are provided via a multi-pin edge connector or through-holes for a 00-mil header or wire connections. Recordings are stored in on-chip nonvolatile memory cells, providing zero-power message storage. This unique, single-chip solution is made possible through ISD's patented multilevel storage technology. Voice and audio signals are stored directly into memory in their natural form, providing high-quality, solid-state voice reproduction. DETAILED DESCRIPTION Speech Quality ISD s patented ChipCorder technology provides natural speech Record and Playback. The input voice signals are stored directly in nonvolatile EEPROM cells and are reproduced without the synthetic effect often heard with digital solid-state speech solutions. A complete sample is stored in a single cell, minimizing the memory necessary to store a recording of a given duration. Basic Operation The ISD-VM0A module is controlled by a single signal, REC, and either of two push-button control Playback signals, PLAYE (edge-activated Playback), and PLAYL (level-activated Playback). Module operation is explained on page -39. Automatic Power-Down Mode At the end of a Playback or Record cycle, the ISD- VM0A module automatically returns to a lowpower standby mode, consuming typically 0.5 µa. During a Playback cycle, the device powers down automatically at the end of the message. During a ISD-VM0A CHIP-ON-BOARD MODULE 27 mm C 220 uf C5 R4 C6 4.7 uf R R3 C4 U ISD0 R5 C3 R2 R9 R8 R BATT SPKR+ SPKR MIC MIC+ ANA IN PLAYL/ PLAYE/ RECLED/ REC/ BATT+ C2 R7 C7 3.5 mm 38.5 mm 4.49 mm 7.0 mm mm 2 BACK SIDE Board Thickness with Components = 8 mm (typ) BATT+ XCLK A0 A A2 A3 A4 A5 A6 A7 BATT Mounting holes for header or wire connections (NOT TO SCALE) Equal spaces at.27 mm pitch mm 30

3 Product Data Sheets ISD-VM0A Record cycle, the device powers down immediately after REC is released and immediately pulled HIGH. Although the module powers down automatically to conserve power consumption, the typical drain on the battery when driving 6-ohm speakers to full volume averages 30 to 40 ma. This must be taken into consideration when selecting batteries with their inherent internal resistance. Mounting Options The ISD-VM0A module is designed with several mounting options. The edge connector has been designed to use a standard 5 dual position series connector (AMP or equivalent). Additionally, a series of through holes are placed in the board to accept standard 00-mil grid headers (Molex 8624 or equivalent). These holes may also be used for hard-wire connection to the board. Addressing (Optional) In addition to providing simple message playback, the ISD-VM0A module provides a full addressing capability. The ISD-VM0A module has 80 distinct addressable segments providing 25 ms resolution per segment. See the ISD Application Notes and Design Manual in this book for ISD0 device address tables. PIN DESCRIPTIONS NOTE The REC signal is debounced for 50 ms. on the rising edge to prevent a false retriggering from a push-button switch. REC, PLAYL, PLAYE, A6, and A7 have internal pull-ups to V CC. Holding one of these pins LOW will increase standby current consumption. A0, A, A2, A3, A4, A5, and XCLK have internal pull-down to V ss. Holding one of these pins HIGH will increase standby current consumption. Pins 3, 8: Voltage Inputs (V CC, BATT+) Analog and digital circuits internal to the ISD0 chip use separate power buses on the module to minimize noise on the chip. These power buses are on separate traces and are decoupled on the module. The power buses are tied together at the BATT+ pin. Pins 3, 28: Ground Inputs (V SS /GND, BATT-) Similar to V CC, the analog and digital circuits internal to the chip use separate ground buses on the module to minimize noise. These pins are tied together at the BATT pin. Pin 2: Record (REC) The REC input is an active-low Record signal. The device records whenever REC is LOW. This signal must remain LOW for the duration of the Recording. REC takes precedence over either Playback (PLAYE or PLAYL) signal. If REC is pulled LOW during a Playback cycle, the playback immediately ceases and Recording begins at the beginning of the device. A Record cycle is completed when REC is pulled HIGH. An end-of-message (EOM) marker is internally recorded, enabling a subsequent Playback cycle to terminate appropriately. The device automatically powers down to standby mode when REC goes HIGH. This pin has an on-board pull-up resistor. 3

4 ISD-VM0A Product Data Sheets - Pin 0: Playback, Edge-Activated (PLAYE) When a LOW-going transition is detected on this input signal, a Playback cycle begins. Playback continues until an end-of-message marker is encountered or the end of the memory space is reached. Upon completion of the Playback cycle, the device automatically powers down into standby mode. Taking PLAYE HIGH during a Playback cycle will not terminate the current cycle. This pin has an on-board pull-up resistor. Pin 9: Playback, Level-Activated (PLAYL) When this input signal transitions from HIGH to LOW, a Playback cycle is initiated. Playback continues until PLAYL is pulled HIGH, an end-ofmessage marker is detected, or the end of the device space is reached. The device automatically powers down to standby mode upon completion of the playback cycle. This pin has an on-board pull-up resistor. NOTE In Playback, if either PLAYE or PLAYL is held LOW during EOM or OVERFLOW, the device will still enter standby and the internal oscillator and timing generator will stop. However, the rising edge of PLAYE and PLAYL are not debounced, and any subsequent falling edge present (particularly switch bounce) on the input pins will initiate another Playback. Pin : Record LED Output (RECLED) The output RECLED is LOW during a Record cycle. It can be used to drive an LED to provide feedback that a Record cycle is in progress. In addition, RECLED pulses LOW momentarily when an end-of-message marker is encountered in a Playback cycle. Pin 7: Microphone Input (MIC+) An electret microphone (the positive terminal) is connected to this pin with a maximum input signal of 20 mv peak-to-peak. The microphone input (MIC+) provides an Automatic Gain Control (AGC) to dynamically adjust the preamplifier gain, and therefore extend the range of input signals which can be applied to the microphone input without causing distortion. The AGC considerably extends the dynamic range of recordable sound from whispers to loud noises. Pin 6: Microphone Reference (MIC-) This pin is the negative connection for the two-terminal electret microphone. Pin 8: Analog Input (ANA IN) The ANA IN pin may be used to input alternative sources of analog signals (instead of the microphone signal) at a maximum of 50 mv peak-topeak. IF THIS PIN IS NOT USED, IT MUST NOT BE CON- NECTED TO ANY SIGNAL OR VOLTAGE. IT MUST FLOAT. Pin 9: Optional External Clock (XCLK) This pin is held LOW by an internal pulldown; however, if greater timing precision is desired, the chip can be externally clocked through this pin. The internal clock has a ±2.25% tolerance over temperature and voltage range. Pins 4, 5: Speaker Outputs (SPKR+, SPKR ) The SPKR+ and SPKR pins provide direct drive for loudspeakers with impedances as low as 6 ohms. A single output may be used, but, for direct-drive loudspeakers, the two opposite-polarity outputs provide an improvement in output power of up to four times over a single-ended connection. Furthermore, when SPKR+ and SPKR are used, a speaker-coupling capacitor is not required. A single-ended connection will require an AC-coupling capacitor between the SPKR pin and the speaker. The speaker outputs are in a high-impedance state during a Record cycle, and held at V SSA /GND (BATT ) during Power Down. Pins 20-27: Address Inputs (A0-A7) The Address Inputs have two functions, depending upon the level of the two Most Significant Bits (MSB) of the address (A6 and A7). 32

5 Product Data Sheets ISD-VM0A If either of the two MSBs is LOW, the inputs are all interpreted as address bits and are used as the start address for the current Record or Playback cycle. The address pins are inputs only and do not output internal address information as the operation progresses. Address inputs are latched by the falling edge of PLAYE, PLAYL or REC. A6 and A7 have internal pull-up devices. A0, A, A2, A3, A4 and A5 have internal pull-down devices. Address Termination The ISD-VM0A was designed with internal terminating resistors for all the addresses and control lines. This allows the signals to be left floating if not used. A0, A, A2, A3, A4, A5 and XCLK are pulled LOW and A6, A7, PLAYL, PLAYE and REC are pulled HIGH. Each of these internal pull-up or pull-down resistors have a value of 50K to 00K ohms. OPERATIONAL MODE The ISD-VM0A module is designed with a built-in operational mode that enables the continuous repetition of a single message. This operational mode uses the address pins on the ISD- VM0A module, but is mapped outside the valid address range. When the two Most Significant Bits (MSBs) are HIGH, the remaining address signals are interpreted as mode bits and NOT as address bits. Therefore, the operational mode and direct addressing are not compatible and cannot be used simultaneously. Looping Capability The ISD-VM0A Module has a built-in looping function enabling it to continuously repeat a single message. This is accomplished by taking A3 HIGH to continuously loop from the end of the message to the beginning of the message space. Looping is initiated by a negative transition on PLAYE pin with A7, A6 and A3 held HIGH. Then PLAYE is brought back HIGH. Looping will continue indefinitely with all three control pins (PLAYL, PLAYE, REC) remaining HIGH. To stop the looping, PLAYL pin is momentarily taken LOW, then back HIGH. As long as A7, A6 and A3 remain HIGH, a new playback loop will begin with the next negative transition on the PLAYE pin. Another way to control looping is to use PLAYL pin alone. Taking this pin LOW begins the looping and it continues until the pin is taken HIGH again. This is a continuous control rather than the pulsed control of the previous paragraph. 33

6 ISD-VM0A Product Data Sheets ISD0 DEVICE BLOCK DIAGRAM XCLK Internal Clock Timing Sampling Clock ANA IN Amp 5-Pole Active Antialiasing Filter Analog Transceivers R ANA OUT MIC MIC REF AGC Pre- Amp Automatic Gain Control (AGC) Decoders 64K Cell Nonvolatile Multilevel Storage Array 5-Pole Active Smoothing Filter Amp SP+ SP Power Conditioning Device Control - V CCA V SSA V SSD V CCD A0 A A2 A3 A4 A5 A6 A7 REC PLAYE PLAYL RECLED 34

7 Product Data Sheets ISD-VM0A TIMING DIAGRAMS Record T REC T REC REC T LED T LED2 RECLED T SET THOLD T SET THOLD A0-A7 MIC ANA IN T RPUD T RPDD Playback REC PLAYL T PLAY PLAYE T SET T HOLD T SET T HOLD T SET THOLD A0-A7 SP+/- T PPUD T PPDD T PPDD T PPUD RECLED T EOM T EOM NOTES:. REC must be HIGH for the entire duration of a Playback cycle. 2. RECLED functions as an EOM during Playback. 35

8 ISD-VM0A Product Data Sheets PIN/PAD DESIGNATIONS Connector Pin No. Pin Name Pin Function - Not Used Not Used 2 Not Used Not Used 3 BATT Power Source and Negative Terminal (Module s Sig. Ref.) 4 SPKR+ Speaker Driver Positive Output 5 SPKR Speaker Driver Negative Output 6 MIC Electret Microphone Negative Terminal 7 MIC+ Electret Microphone Positive Terminal 8 ANA IN Analog Input to Array 9 PLAYL Play Level Control 0 PLAYE Play Edge Control RECLED Record LED Output Ind. 2 REC Record Control 3 BATT+ Positive Source and Positive Terminal 4 Not Used Not Used 5 Not Used Not Used 6 Not Used Not Used 7 Not Used Not Used 8 BATT+ Positive Source and Positive Terminal 9 XCLK External Clock Input 20 A0 Address 0 2 A Address 22 A2 Address 2 23 A3 Address 3 24 A4 Address 4 25 A5 Address 5 26 A6 Address 6 27 A7 Address 7 28 BATT Power Source and Negative Terminal (Module s Sig. Ref.) 29 Not Used Not Used 30 Not Used Not Used NOTE: Pins 3 and 28 are the same connection, and Pins 3 and 8 are the same connection. 36

9 Product Data Sheets ISD-VM0A ABSOLUTE MAXIMUM RATINGS OPERATING CONDITIONS Condition Value Condition Value Junction temperature Storage temperature range Voltage applied to any pin Voltage applied to any pin (Input current limited to ±20 ma) NOTE: 0 to +50 C 40 C to +85 C (V SS 0.3 V) to (V CC V) (V SS.0 V) to (V CC +.0 V) Stresses above those listed may cause permanent damage to the device. Exposure to the absolute maximum ratings may affect device reliability. Functional operation is not implied at these conditions. Commercial operating temperature range () Supply voltage (V CC ) (2) Ground voltage (V SS ) (3) NOTES:. Case temperature. 2. V CC = V CCA = V CCD. 3. V SS = V SSA = V SSD. 0 C to +50 C +4.5 V to +5.5 V 0 V DC PARAMETERS Symbol Parameters Min (2) Typ () Max (2) Units Conditions V IL Input Low Voltage 0.8 V V IH Input High Voltage 2.4 V V OL Output Low Voltage 0.4 V I OL = 2.5 ma V OH Output High Voltage 2.4 V I OH =.6 ma I CC V CC Current (Operating) 5 35 ma R EXT = I SB V CC Current (Standby) 0.5 µa (3) I IL Input Leakage Current 0 µa I ILPU Input Current LOW w/pull Up 95 µa Force V (4) SS I ILPD Input Current HIGH w/pull Down 95 µa Force V CC (5) R EXT Output Load Impedance 6 Ω Speaker Load A ARP ANA IN to SP+/- Gain 22 db NOTES:. Typical T A = 25 C and 5.0 V. 2. All Min/Max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 00% tested. 3. REC, PLAYL, PLAYE, A6, and A7 must be HIGH/Floating and A0, A, A2, A3, A4, A5, and XCLK must be LOW/Floating. 4. REC, PLAYL, and PLAYE, A6, and A7. 5. A0, A, A2, A3, A4, A5, and XCLK. 37

10 ISD-VM0A Product Data Sheets AC PARAMETERS Symbol Characteristic Min (2) Typ () Max (2) Units Conditions F S Sampling Frequency KHz Internal Oscillator (3) F CF Filter Pass Band 2.6 KHz 3 db Roll-Off Point (3)(4) T REC Record Duration 0 sec T PLAY Playback Duration 0 sec T LED RECLED ON Delay 5 µsec T LED2 RECLED OFF Delay 48.5 msec T SET Address Setup Time 300 nsec T HOLD Address Hold Time 0 nsec - T RPUD Record Power-Up Delay 32 msec T RPDD Record Power-Down Delay 32 msec T PPUD Play Power-Up Delay 32 msec T PPDD Play Power-Down Delay 8. msec T EOM EOM Pulse Width msec THD Total Harmonic Distortion KHz (3) P OUT Speaker Output Power 2.2 mw R EXT = 6 Ω (3) V OUT Voltage Across Speaker Pins V p p R EXT = 600 Ω (3) V IN MIC Input Voltage 20 mv Peak-to-Peak (3) V IN2 ANA IN Input Voltage 50 mv Peak-to-Peak (3) NOTES:. Typical T A = 25 C and 5.0 V and 6.2 KHz sample rate. 2. All Min/Max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 00% tested. 3. Measurements made with power supply with output impedance of <20Ω. 4. Filter specification applies to the antialiasing filter and the smoothing filter. 38

11 Product Data Sheets ISD-VM0A ISD-VM0A APPLICATION EXAMPLE (SINGLE MESSAGE MODE) REC LED (Optional) PLAYL PLAYE RECORD A0 A7 RECLED PLAYL PLAYE REC XCLK V CC R9 00 KΩ R6 KΩ 2 R KΩ R7 A0 A A2 A3 A4 A5 A6 A7 PLAYL PLAYE REC RECLED XCLK V CCD V CCA V SSD V SSA SP+ SP ANA IN ANA OUT MIC REF MIC AGC ISD0 C7.00 µf 00 KΩ R5 470 KΩ R KΩ ISD-VM0A SCHEMATIC V CC C3 C6 4.7 µf C2 0. µf 0. µf C4 0. µf R KΩ R3 0 KΩ C 220 µf C5 0. µf 3,8 BATT 3, 28 V SS R4 0 KΩ 6 BATT+ V CC SPKR+ SPKR 6 Ω SPEAKER ANA IN MIC+ MIC ELECTRET MICROPHONE NOTES:. R7, R8, and R9 are installed on the board to ensure commonality between other modules using the ISD printed circuit board. These resistors are not expressly needed for the VM0A module, but are included. 2. Components outside shaded areas must be supplied by customer. MODULE OPERATION EXAMPLE The following example operating sequence demonstrates the functionality of the ISD-VM0A module.. Record a message filling the memory. Pulling the REC signal LOW initiates a Record cycle from the beginning of the message space. If REC is held LOW, the Recording continues until the message space has been filled. Once the message space is filled, Recording ceases. The device will automatically power down after REC is released HIGH (disconnected). 2. Edge-activated Playback. Pulling the PLAYE signal LOW initiates a Playback cycle from the beginning of the message memory or a selected location. The rising edge of PLAYE has no effect on operation. If a Recording has filled the message space, the entire message is played. When the device reaches the EOM marker, it automatically powers down. A subsequent falling edge on PLAYE initiates a new Play cycle from the beginning of the memory. 3. Level-activated Playback. Pulling the PLAYL signal LOW initiates a Playback cycle from the beginning of the message memory or a selected location. If Recording has filled the message space, the entire message is played. When the device reaches the EOM marker, it automatically powers down. A subsequent falling edge on PLAYL initiates a new Play cycle from the beginning of the message memory. 39

12 ISD-VM0A Product Data Sheets - 4. Level-activated Playback (truncated). If PLAYL is pulled HIGH any time during the Playback cycle, the device stops playing and enters the power-down mode (i.e., useful for push-button interface). 5. Record (interrupting Playback). The REC signal takes precedence over other operations. Any LOW-going transition on REC initiates a new Record operation from the beginning of the memory or a selected location, regardless of any current operation in progress. 6. Record a message, partially filling the memory. A Record operation need not fill the entire memory. Releasing the REC signal HIGH before filling the message space causes the recording to stop and an EOM marker to be placed. The device powers down automatically. 7. Play back a message that partially fills the memory. Pulling the PLAYE or PLAYL signal LOW initiates a Playback cycle, which is then completed when the EOM marker is encountered. Playback ceases and the device powers down. 8. RECLED operation. The RECLED output pin provides an active- LOW signal which can be used to drive an LED as a Record-in- progress indicator. It returns to a HIGH state when the REC pin is released HIGH or when the recording is completed due to the memory being filled. The module has a KΩ resistor in series with this pin for LED current limiting. This pin also pulses LOW to indicate an EOM at the end of a message being played. 40

13 Product Data Sheets ISD-VM0A ORDERING INFORMATION Product Number Descriptor Key ISD-VM A _ ISDVoice Module ISD00 Series Duration: 0 = 0 Seconds Special Temperature Field: Blank = Commercial Temperature (0 C to +50 C) When ordering ISD-VM0A Chip-On-Board modules, please refer to the following valid part number. Part Number ISD-VM0A For the latest product information, access ISD s worldwide website at 4

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