Ultra Low Jitter LVPECL or LVDS Clock
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- Berniece Howard
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1 Features Ceramic Surface Mount Package Ultra Low Phase Jitter Performance, 100fs Typical Fundamental or 3 rd Overtone Crystal Design Frequency Range MHz * +2.5V or +3.3V Operation Output Enable Standard Tape and Reel Packaging, EIA418 Applications SerDes Storage Area Networking Broadband Access SONET/SDH/DWDM PON Ethernet/GbE/SyncE Fiber Channel Test and Measurement Part Dimensions: mm 62.00mg Standard Frequencies, 100fs Maximum MHz MHz MHz MHz * Check with factory for availability. Description CTS is a low cost, high performance clock oscillator supporting differential LVPECL or LVDS outputs. Employing the latest IC technology, M655 has excellent stability and very low jitter/phase noise performance. Ordering Information Model 655 Frequency Code Frequency Temperature Supply Output Type [MHz] Stability Range Voltage P XXX or XXXX 3 I 3 Packaging T Code Output Code Stability Code Voltage P LVPECL Pin 1 Enable 6 ±20ppm Vdc L LVDS Pin 1 Enable 5 ±25ppm Vdc E LVPECL Pin 2 Enable 3 ±50ppm V LVDS Pin 2 Enable 2 ±100ppm Code Frequency Code Temp. Range Code Packing A T Product Frequency Code 1 10 C to +60 C 1k pcs./reel C 20 C to +70 C I 40 C to +85 C Notes: 1] Refer to document , Frequency Code Tables. 3digits for frequencies <100MHz, 4digits for frequencies 100MHz or greater. 2] Consult factory for availability of 6I Stability/Temperature combination. Not all performance combinations and frequencies may be available. Contact your local CTS Representative or CTS Customer Service for availability. DOC# Rev. A Page 1 of 7
2 Operating Conditions Maximum Supply Voltage V CC V Supply Voltage V CC ±5% V Supply Current LVPECL LVDS Operating Temperature T A Storage Temperature T STG C Frequency Stability Frequency Range LVPECL LVDS Frequency Stability [Note 1] Δf/f O 20, 25, 50 or 100 ±ppm Aging Δf/f 25 First +25 C, nominal V CC 3 3 ppm 1.] Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 1st year aging. Output Parameters I CC Maximum Load f O Output Type LVPECL Output Load R L Terminated to V CC 2.0V 50 Ohms V OH V CC V CC PECL Load, 20 C to +70 C V V OL V CC V CC Output Voltage Levels V OH V CC V CC PECL Load, 40 C to +85 C V V OL V CC V CC Output Duty Cycle V CC 1.3V % Rise and Fall Time T R, T 20%/80% Levels, R L = 50 Ohms ns ma C MHz Output Type LVDS Output Load R L Between Outputs 100 Ohms Output Voltage Levels V OH LVDS Load V OL V Output Duty Cycle 1.25V % Differential Output Voltage V OD R L = 100 Ohms mv Offset Voltage V OS LVDS Load V Rise and Fall Time T R, T 20%/80% Levels, R L = 100 Ohms ns DOC# Rev. A Page 2 of 7
![Output Parameters Start Up Time T S Application of V CC 2 5 ms Enable Function [Standby] Enable Input Voltage V IH Pin 1 or 2 Logic '1', Output Enabled 0.](/docs-images/75/71667821/images/3-0.jpg "7V CC V Disable Input Voltage V IL Pin 1 or 2 Logic '0', Output Disabled 0.")
3 Output Parameters Start Up Time T S Application of V CC 2 5 ms Enable Function [Standby] Enable Input Voltage V IH Pin 1 or 2 Logic '1', Output Enabled 0.7V CC V Disable Input Voltage V IL Pin 1 or 2 Logic '0', Output Disabled 0.3V CC V Disable Time T PLZ Pin 1 or 2 Logic '0', Output Disabled 200 ns Enable Time T PLZ Pin 1 or 2 Logic '1', Output Enabled 2 ms Phase Jitter, RMS tjrms MHz, Bandwidth 12 khz 20 MHz 200 fs MHz, Bandwidth 12 khz 20 MHz 100 Period Jitter, pkpk pjpkpk 2.6 ps Period Jitter, RMS pjrms 25 ps Enable Truth Table Pin 1 or Pin 2 Pin 4 & Pin 5 Logic 1 Output Open Output Logic 0 High Imp. Test Circuit LVPECL LVDS Output Waveform LVPECL or LVDS DOC# Rev. A Page 3 of 7
![Performance Data Phase Noise [typical] 125.00MHz, LVPECL, V CC = 3.](/docs-images/75/71667821/images/4-1.jpg "3V, T A = +25 C 156.25MHz, LVPECL, V CC = 3.3V, T A = +25 C DOC# 00805500 Rev.")
4 Performance Data Phase Noise [typical] MHz, LVPECL, V CC = 3.3V, T A = +25 C MHz, LVPECL, V CC = 3.3V, T A = +25 C DOC# Rev. A Page 4 of 7
![Performance Data Phase Noise [typical] 156.25MHz, LVDS, V CC = 3.3V, T A = +25 C Phase Noise Tabulated Typical, V CC = 3.](/docs-images/75/71667821/images/5-1.jpg "3V, T A = +25 C PARAMETER SYMBOL CONDITIONS TYP UNIT PARAMETER SYMBOL CONDITIONS TYP UNIT LVPECL @ 125.00MHz LVPECL @ 156.25MHz Phase Noise Single Side Band Phase Noise Single Side Band @ 10Hz 79.")
5 Performance Data Phase Noise [typical] MHz, LVDS, V CC = 3.3V, T A = +25 C Phase Noise Tabulated Typical, V CC = 3.3V, T A = +25 C PARAMETER SYMBOL CONDITIONS TYP UNIT PARAMETER SYMBOL CONDITIONS TYP UNIT MHz MHz Phase Noise Single Side Band Phase Noise Single Side 10Hz 10Hz 100Hz 100Hz 1kHz kHz kHz 10kHz 100kHz 100kHz 1MHz 1MHz 5MHz 20MHz Phase Jitter, RMS tjrms Integration Bandwidth 12kHz 20MHz fs Phase Jitter, RMS tjrms Integration Bandwidth 12kHz 20MHz fs PARAMETER SYMBOL CONDITIONS TYP UNIT MHz Phase Noise Single Side 10Hz 100Hz 1kHz kHz 100kHz 1MHz 20MHz Phase Jitter, RMS tjrms Integration Bandwidth 12kHz 20MHz fs DOC# Rev. A Page 5 of 7
6 Mechanical Specifications Package Drawing CTS**D 655OSTV xxxx Marking Information 1. ** Manufacturing Site Code. 2. D Date Code. See Table I for codes. 3. O Output Type; P or E = LVPECL, L or V = LVDS. 3. ST Frequency Stability/Temperature Code. [Refer to Ordering Information] 4. V Voltage Code; 3 = 3.3V, 2 = 2.5V. 5. xxxx Frequency Code. 3digits, frequencies below 100MHz 4digits, frequencies 100MHz or greater [See document , Frequency Code Tables.] Recommended Pad Layout Notes 1. JEDEC termination code (e4). Barrierplating is nickel [Ni] with gold [Au] flash plate. 2. Reflow conditions per JEDEC JSTD020; +260 C maximum, 20 seconds. 3. MSL = 1. Pin Assignments Pin Symbol Function 1 EOH or N.C. Enable [std] or No Connect 2 N.C. or EOH No Connect or Enable [opt] 3 GND Circuit & Package Ground 4 Output RF Output 5 Output Complimentary RF Output 6 V CC Supply Voltage Table I Date Code MONTH YEAR JAN FEB MAR APR MAY JUN JUL AUG SEP OCT NOV DEC A B C D E F G H J K L M N P Q R S T U V W X Y Z a b c d e f g h j k l m n p q r s t u v w x y z DOC# Rev. A Page 6 of 7
7 Packaging Tape and Reel Tape Drawing Reel Drawing Notes 1. Device quantity is 1k pieces per 180mm reel. 2. Complete CTS part number, frequency value and date code information must appear on reel and carton labels. DOC# Rev. A Page 7 of 7
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Low-Jitter Precision LVPECL Oscillator
DSC0 General Description The DSC0 & series of high performance oscillators utilizes a proven silicon MEMS technology to provide excellent jitter and stability over a wide range of supply voltages and temperatures.
Programmable Low-Jitter Precision LVDS Oscillator
General Description The & series of high performance fieldprogrammable oscillators utilizes a proven silicon MEMS technology to provide excellent jitter and stability over a wide range of supply voltages
LVDS 3.2 x 2.5mm 3.3V Oscillator
LVDS 3.2 x 2.5mm 3.3V Oscillator This part is no longer available from Fox, please contact IDT for this product. Model: FXO-LC33 SERIES Freq: 0.75 MHz to 1.35GHz Features XTREMELY Low Jitter Low Cost XPRESS
VFH230C Series XO Low Jitter 3.3V 5x7mm SMD, LVPECL / LVDS
5x7mm SMD, LV / Features 750kHz to 800MHz frequency range
BLOCK DIAGRAM. Functionality Table 1 details the differences between the parts to assist designers in selecting the optimal part for their design.
FEATURES LVPECL Outputs Optimized for Very Low Phase Noise (-165dBc/Hz) Up to 800MHz Bandwidth Selectable 1, 2 Output Selectable Enable Logic 3.0V to 3.6V Operation RoHS Compliant Pb Free Packages BLOCK
PSE Technology Corporation
PSE Technology Corporation SPECIFICATION FOR APPROVAL CUSTOMER NOMINAL FREQUENCY HOLDER TYPE SPEC. NO. ( P/N ) CUSTOMER P/N ISSUE DATE VERSION 100.000000 MHz TYPE FK 3.2X2.5 SEAM SEALED CRYSTAL CLOCK OSCILLATOR
C5310. Tight Stability. 1 MHz 700 MHz
Typical Applications Base Stations Test Equipment Switching Portable Equipment Frequency range Standard frequencies Features Surface Mount Package Reflow Process Compatible AT-Cut Crystal Low Phase Noise
Block Diagram. COutput Output XTAL HPLL. Vc OE Gnd. Figure 1 - Block Diagram
X7 Single Frequency HPLL CXO X7 Features Features Description Applications The X7 is a voltage controlled crystal oscillator, CXO, based upon ectron s HPLL high performance phase locked loop frequency
DSC2022. Low-Jitter Configurable Dual LVPECL Oscillator. Features. General Description. Block Diagram. Applications
General Description The DSC2022 series of high performance dual output oscillators utilize a proven silicon MEMS technology to provide excellent jitter and stability while incorporating additional device
Programmable Low-Jitter Precision CMOS Oscillator
DSC8121 General Description The DSC8101 & DSC8121 series of high performance fieldprogrammable oscillators utilizes a proven silicon MEMS technology to provide excellent jitter and stability over a wide
PSE Technology Corporation
PSE Technology Corporation SPECIFICATION FOR APPROVAL CUSTOMER NOMINAL FREQUENCY HOLDER TYPE SPEC. NO. ( P/N ) CUSTOMER P/N ISSUE DATE VERSION 50.000000 MHz TYPE FK 3.2x2.5 SEAM SEALED CRYSTAL CLOCK OSCILLATOR
PSE Technology Corporation
PSE Technology Corporation SPECIFICATION FOR APPROAL CUSTOMER NOMINAL FREQUENCY PRODUCT TYPE SPEC. NO. ( P/N ) CUSTOMER P/N ISSUE DATE ERSION 156.250000 MHz TYPE UX 7.0x5.0 SEAM SEALED CRYSTAL CLOCK OSCILLATOR
DSC2042. Low-Jitter Configurable HCSL-LVPECL Oscillator. General Description. Features. Block Diagram. Applications
LowJitter Configurable HCSLLVPECL Oscillator General Description The DSC2042 series of high performance dual output oscillators utilize a proven silicon MEMS technology to provide excellent jitter and
VT-840 VT-840. Temperature Compensated Crystal Oscillator, Voltage Controlled Temperature Compensated Crystal Oscillator.
VT-840 Temperature Compensated Crystal Oscillator, Voltage Controlled Temperature Compensated Crystal Oscillator VT-840 Description Vectron s VT-840 Temperature Compensated Crystal Oscillator (TCXO) is
CPPD C 1 L Z A5 B6 XX.XXXX / YY.YYYY CPPD
Field Programmable Crystal Oscillator Programmed in the field with the PG3200 oscillator programming itrument within seconds. Factory Programmable Standard Package Optio Itrument Part Number: CPPD C 1
VVC1 VVC2 Voltage Controlled Crystal Oscillator
VVC1 VVC2 Voltage Controlled Crystal Oscillator Features The VVC1 Voltage Controlled Crystal Oscillator VCXO with a CMOS output Small 5.0 X 7.0 X 1.9 mm package Output frequencies to 66 MHz 5.0 or 3.3
FD5T Series FD51xxT KHz CMOS Clock Oscillator March 2009
FD5T Series FD51xxT-32.768KHz Pletronics FD51T Series is a quartz crystal controlled precision square wave generator Output frequency 32.768KHz Selectable low jitter or spread spectrum output. Device characteristics
CMOS, Ultra-low Jitter Voltage Controlled Crystal Oscillators (VCXOs)
GTJF538 series (5.0x3.2x1.4 mm, 8 pads), a member of Mercury QuikXO quick-turn Voltage Controlled Crystal Oscillators 9VCXOs), features CMOS output and femtosecond (f. sec.) RMS phase jitter (163 f. sec.