NCP1239. Fixed Frequency Current Mode Controller for Flyback Converter

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1 Fixed Frequency Curren Mode Conroller for Flyback Converer The NCP1239 is a fixed-frequency curren-mode conroller feauring a high-volage sar-up curren source o provide a quick and lossless power-on sequence. This funcion grealy simplifies he design of he auxiliary supply and he V CC capacior by acivaing he inernal sar-up curren source o supply he conroller during sar-up, ransiens, lach, sand-by ec. Wih a supply range up o 35 V, he conroller hoss a jiered 65 or 100-kHz swiching circuiry operaed in peak curren mode conrol. When he power on he secondary side sars o decrease, he conroller auomaically folds back is swiching frequency down o minimum level of 26 khz. As he power furher goes down, he par eners skip cycle while limiing he peak curren ha insures excellen efficiency in ligh load condiion. NCP1239 feaures a imer-based faul deecion circuiry ha ensures a quasi-fla overload deecion, independen of he inpu volage. Feaures Fixed-Frequency 65-kHz or 100-kHz Curren-Mode Conrol Operaion Frequency Foldback Down o 26 khz and Skip Mode o Maximize Performance in Ligh Load Condiions Adjusable Over Power Proecion (OPP) Circui High-Volage Curren Source wih Brown-Ou (BO) Deecion Inernal Slope Compensaion Inernal Fixed Sof-Sar Frequency Jiering in Normal and Frequency Foldback Modes 64-ms Timer-Based Shor-Circui Proecion wih Auo- or Lached Operaion Pre-Shor Ready for Lached OCP Versions Lached OVP on VCC Auorecovery for C and E Versions Lached OVP/OTP Inpu for Improved Robusness 35-V V CC Operaion ±500 ma Peak Source/Sink Drive Capabiliy Inernal Thermal Shudown Exremely Low No-Load Sandby Power Pin-o-Pin Compaible wih he Exising NCP1236/1247 Series These Devices are Pb-Free and are RoHS Complian 1239xfff A L Y W Faul FB CS GND SOIC7 CASE 751U PIN CONNECTIONS MARKING DIAGRAM xfff ALYWX HV VCC DRV = Specific Device Code x = A, B, C, D, E, F, G, H, I, J or K fff = 065 or 100 = Assembly Locaion = Wafer Lo = Year = Work Week = PbFree Package ORDERING INFORMATION See deailed ordering and shipping informaion on page 25 of his daa shee Typical Applicaions AC-DC Converers for TVs, Se-Top Boxes and Priners Offline Adapers for Noebooks and Nebooks Semiconducor Componens Indusries, LLC, 2016 November, 2017 Rev Publicaion Order Number NCP1239/D

2 Vbulk OVP.. Vou NCP NTC OPP adjsu. Table 1. PIN FUNCTION DESCRIPTION Figure 1. Applicaion Schemaic (OPP Adjusmen) Pin No. Pin Name Descripion 1 Faul The conroller eners faul mode if he volage of his pin is pulled above or below he faul hresholds. A precise pull up curren source allows direc inerface wih an NTC hermisor. Faul deecion riggers a lach. 2 FB Hooking an opocoupler collecor o his pin will allow regulaion. 3 CS This pin moniors he primary peak curren bu also offers an overpower compensaion adjusmen. When he CS pin is brough above 1.2 V, he par is permanenly lached off. 4 GND The conroller ground. 5 DRV The driver s oupu o an exernal MOSFET gae. 6 VCC This pin is conneced o an exernal auxiliary volage. An OVP comparaor moniors his pin and offers a means o lach he converer in faul condiions. 7 NC Non-conneced for improved creepage disance. 8 HV Conneced o he bulk capacior or recified ac line, his pin powers he inernal curren source o deliver a sarup curren. I is also used o provide he brown-ou deecion and he HV sensing for he Overpower proecion. 2

3 Table 2. DEVICE OPTION AND DESIGNATIONS Device Frequency OCP Proecion OCP Timer V cc OVP Threshold V cc OVP Proecion Faul pin Proecion BO Levels BO Timer Sof sar Timer DSS Funcion NCP1239AD65R2G 65 khz Lach 64 ms 25.5 V Lach Lach 110 / ms 8 ms Disable NCP1239BD65R2G 65 khz Auo NCP1239CD65R2G 65 khz Auo NCP1239DD65R2G 65 khz Auo NCP1239ED65R2G 65 khz Auo 64 ms 25.5 V Lach Lach 110 / ms 8 ms Disable 64 ms 25.5 V Auo Lach 110 / ms 8 ms Disable 64 ms 25.5 V Lach Lach 101 / ms 8 ms Disable 64 ms 25.5 V Auo Auo 110 / ms 8 ms Disable NCP1239FD65R2G 65 khz Lach 64 ms 32 V Lach Lach 229 / ms 4 ms Disable NCP1239HD65R2G 65 khz Lach 64 ms 25.5 V Lach Lach 229 / ms 8 ms Disable NCP1239ID65R2G 65 khz Lach 128 ms 25.5 V Lach Lach 101 / ms 4 ms Disable NCP1239JD65R2G 65 khz Lach 128 ms 32 V Lach Lach 101 / ms 8 ms Enable NCP1239KD65R2G 65 khz Auo 128 ms 25.5 V Auo Auo 110 / ms 8 ms Disable NCP1239AD100R2G 100 khz Lach 64 ms 25.5 V Lach Lach 110 / ms 8 ms Disable NCP1239BD100R2G 100 khz Auo NCP1239ED100R2G 100 khz Auo 64 ms 25.5 V Lach Lach 110 / ms 8 ms Disable 64 ms 25.5 V Auo Auo 110 / ms 8 ms Disable NCP1239GD100R2G 100 khz Lach 64 ms 25.5 V Lach Lach 95 / ms 8 ms Disable 3

4 NC IOTP Vdd VFaul(OVP) Clock 600ns ime consan Faul Vfaul(clamp) VFaul(OTP) Opion for OVP_VCC Up couner 4 RST OVP/OTP gone? BO TSD HV sample BO BO end TSD HV deecion & sampling Dual HV sarup curren source HV S Q Q Lach Vcc(rese) Vdd UVLO Vcc logic managemen FB Vdd Rup Vskip Skip Foldback Sop Jier Oscillaor 65 khz / 100 khz R Clock Vcc(rese) BO end TSD end OVP_VCC 20us ime consan VCC(OVP) Vcc / 4 + Slope Compensaion Clamp HV sample OPP Curren Generaion Sofsar Ramp 8 ms SS end PWM Sofsar Overcurren Lach S R Q Q BO TSD Drv GND Iopp Vdd Ibias LEB 300 ns VLimi1 PWM S R Q Q OCP_flag Skip CS LEB 120 ns Up couner 4 RST OVP_VCC (opion) Proecion Mode Rese OCP_flag Dmax OCP Timer 64 ms VLimi2 OCP Faul gone? UVLO Vcc(rese) Auorecovery Timer 1 s Figure 2. Simplified Block Diagram 4

5 Table 3. MAXIMUM RATINGS Raing Symbol Value Uni Power Supply Volage, V CC Pin, Coninuous Volage V CC 0.3 o 35 V Maximum Volage on Low Power Pins CS, FB and Faul 0.3 o 5.5 V Maximum Volage on DRV Pin V DRV 0.3 o 20 V High Volage Pin HV 0.3 o 650 V Thermal Resisance Juncion-o-Air Single Layer PCB 25 mm, 2 Oz Cu Prined Circui Copper Clad R θja 250 C/W Maximum Juncion Temperaure T J(max) 150 C Sorage Temperaure Range TSTG 60 o 150 C ESD Capabiliy (Noe 2) Human Body Model All Pins Excep HV Machine Model ESD HBM 4 ESD MM 200 Charged-Device Model ESD Capabiliy per JEDEC JESD22C101E 1 kv Moisure Sensiiviy Level MSL 1 Sresses exceeding hose lised in he Maximum Raings able may damage he device. If any of hese limis are exceeded, device funcionaliy should no be assumed, damage may occur and reliabiliy may be affeced. 1. Refer o ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe Operaing parameers. 2. This device series incorporaes ESD proecion and is esed by he following mehods: ESD Human Body Model esed per JEDEC JESD22A114F ESD Machine Model esed per JEDEC JESD22A115C Charged-Device Model ESD Capabiliy esed per JEDEC JESD22C101E Lach-up Curren Maximum Raing: 150 ma per JEDEC sandard: JESD78 Table 4. ELECTRICAL CHARACTERISTICS (For ypical values T J = 25 C, for min/max Values T J = C o +125 C, V HV = 125 V, V CC = 11 V unless oherwise noed) Parameer Tes Condiions Symbol Min Typ Max Uni START-UP SECTION kv V Minimum Volage for Curren Source Operaion I HV = 90% I START2, V CC = V CC(on) 0.5 V V HV(min) V Curren Flowing Ou of V CC Pin V CC = 0 V I START ma Curren Flowing Ou of V CC Pin V CC = V CC(on) 0.5 V I START ma HV Pin Leakage Curren V HV = 325 V I LEAK A SUPPLY SECTION Sar-Up Threshold HV Curren Source Sop Threshold V CC Increasing V CC(on) V HV Curren Source Resar Threshold V CC Decreasing V CC(min) V Minimum Operaing Volage V CC Decreasing V CC(off) V Operaing Hyseresis V CC(on) = V CC(off) V CC(hys) 3.0 V V CC Level for I START1 o I START2 Transiion V CC(inhibi) V V CC Level where Logic Funcions are Rese V CC Decreasing V CC(rese) V Inernal IC Consumpion Inernal IC Consumpion Inernal IC Consumpion V FB = 3.2 V, F SW = 65 khz and C L =0 V FB = 3.2 V, F SW = 65 khz and C L =1nF V FB = 3.2 V, F SW = 100 khz and C L =0 ICC ma ICC ma ICC ma Produc parameric performance is indicaed in he Elecrical Characerisics for he lised es condiions, unless oherwise noed. Produc performance may no be indicaed by he Elecrical Characerisics if operaed under differen condiions. 1. Guaraneed by design 2. CS pin source curren is a sum of I BIAS and I OPP, hus a V HV = 125 V is observed he I BIAS only, because I OPC is swiched off. 5

6 Table 4. ELECTRICAL CHARACTERISTICS (coninued) (For ypical values T J = 25 C, for min/max Values T J = C o +125 C, V HV = 125 V, V CC = 11 V unless oherwise noed) Parameer SUPPLY SECTION Inernal IC Consumpion Inernal IC Consumpion in Skip Cycle Tes Condiions V FB = 3.2 V, F SW = 100 khz and C L = 1 nf V CC = 12 V, V FB = V Driving 8 A/650 V MOSFET Symbol Min Typ Max Uni ICC ma ICC(sb) 500 A Inernal IC Consumpion in Faul Mode Faul or Lach ICC3 400 A Inernal IC Consumpion before Sar-Up V CC(min) < V CC < V CC(on) ICC4 310 A Inernal IC Consumpion before Sar-Up V CC < V CC(min) ICC5 20 A DRIVE OUTPUT Rise Time (1090%) V DRV from 10 o 90% V CC = V CC(off) V, C L = 1 nf Fall Time (9010%) V DRV from 90 o 10% V CC = V CC(off) V, C L = 1 nf R 40 ns F 30 ns Source Resisance R OH 6 Sink Resisance R OL 6 Peak Source Curren Peak Sink Curren High Sae Volage (Low V CC Level) High Sae Volage (High V CC Level) CURRENT COMPARATOR DRV High Sae, V DRV = 0 V (Noe 1) V CC = V CC(off) V, C L = 1 nf DRV Low Sae, V DRV = V CC (Noe 1) V CC = V CC(off) V, C L = 1 nf V CC = 9 V, R DRV = 33 k DRV High Sae V CC = V CC(OVP) 0.2 V, DRV High Sae and Unloaded I SOURCE 500 ma I SINK 500 ma V DRV(low) 8.8 V V DRV(clamp) V Inpu Pull-Up Curren V CS = 0.7 V I BIAS 1 A Maximum Inernal Curren Sepoin T J from C o +125 C (No OPP) V LIMIT V Abnormal Over-Curren Faul Threshold T J = +25 C (No OPP) V LIMIT V Defaul Inernal Volage Se Poin for Frequency Foldback Trip Poin ~59% of V LIMIT V FOLD(CS) 475 mv Inernal Peak Curren Sepoin Freeze ~31% of V LIMIT V FREEZE(CS) 250 mv Propagaion Delay from V LIMIT Deecion o Gae Off-Sae DRV Oupu Unloaded DEL ns Leading Edge Blanking Duraion LEB1 300 ns Abnormal Over-Curren Faul Blanking LEB2 120 ns Duraion for V LIMIT3 Number of Clock Cycles before Faul Confirmaion COUNT 4 Produc parameric performance is indicaed in he Elecrical Characerisics for he lised es condiions, unless oherwise noed. Produc performance may no be indicaed by he Elecrical Characerisics if operaed under differen condiions. 1. Guaraneed by design 2. CS pin source curren is a sum of I BIAS and I OPP, hus a V HV = 125 V is observed he I BIAS only, because I OPC is swiched off. 6

7 Table 4. ELECTRICAL CHARACTERISTICS (coninued) (For ypical values T J = 25 C, for min/max Values T J = C o +125 C, V HV = 125 V, V CC = 11 V unless oherwise noed) Parameer CURRENT COMPARATOR Inernal Sof-Sar Duraion INTERNAL OSCILLATOR Oscillaion Frequency (65-kHz Version) Oscillaion Frequency (100-kHz Version) Tes Condiions Acivaed upon sarup or auorecovery A,B,C,D,E,G,H,J,K versions F and I versions Symbol SS Min Typ 8 4 Max Uni ms f OSC khz f OSC khz Maximum Duy-Cycle D MAX % Frequency Jiering In Percenage of f OSC Jier is Kep even in Foldback Mode f JITTER ±5 % Swing Frequency f SWING 240 Hz FEEDBACK SECTION Equivalen AC Resisor from FB o GND (Noe 1) R EQ 25 k Inernal Pull-Up Volage on FB Pin FB open V FB(ref) V V FB o Curren Sepoin Division Raio K FB 4 Feedback Volage below which he Peak Curren is Frozen V FREEZE 1.0 V FREQUENCY FOLDBACK Frequency Foldback Level on FB Pin 59% of Maximum Peak Curren V FOLD 1.90 V Transiion Frequency below which Skip-Cycle Occurs V FB =V SKIP V f TRANS khz End of Frequency Foldback Feedback Level f SW = f MIN V FOLD(end) 1.50 V Skip-Cycle Level Volage on FB Pin V SKIP 0.80 V Hyseresis on he Skip Comparaor (Noe 1) V SKIP(hys) 30 mv INTERNAL RAMP COMPENSATION Compensaion Ramp Slope F SW = 65 khz, R UP = 30 k F SW = 100 khz, R UP = 30 k S 65 S mv/ s OVERPOWER COMPENSATION (OPP) V HV o I OPP Conversion Raio K OPP 0.54 A/V Curren Flowing Ou of CS Pin (Noe 2) V HV = 125 V V HV = 162 V V HV = 328 V V HV = 365 V I OPP(125) I OPP(162) I OPP(328) I OPP(365) Percenage of Applied OPP Curren V FB < V FOLD I OPP1 0 % Percenage of Applied OPP Curren V FB > V FOLD V (V OPP ) I OPP2 100 % Clamped OPP Curren V HV > 365 V I OPP A Wachdog Timer for DC Operaion WD(OPP) 32 ms BROWN-OUT (BO) Brown-Ou Thresholds (A,B,C,E & K versions) V HV Increasing V BO(on) V Brown-Ou Thresholds (A,B,C,E & K versions) V HV Decreasing V BO(off) V Produc parameric performance is indicaed in he Elecrical Characerisics for he lised es condiions, unless oherwise noed. Produc performance may no be indicaed by he Elecrical Characerisics if operaed under differen condiions. 1. Guaraneed by design 2. CS pin source curren is a sum of I BIAS and I OPP, hus a V HV = 125 V is observed he I BIAS only, because I OPC is swiched off A 7

8 Table 4. ELECTRICAL CHARACTERISTICS (coninued) (For ypical values T J = 25 C, for min/max Values T J = C o +125 C, V HV = 125 V, V CC = 11 V unless oherwise noed) Parameer Tes Condiions Symbol Min Typ Max BROWN-OUT (BO) Brown-Ou Thresholds (D, I and J versions) V HV Increasing V BO(on) V Brown-Ou Thresholds (D, I and J versions) V HV Decreasing V BO(off) V Brown-Ou Thresholds (F version only) V HV Increasing V BO(on) V Brown-Ou Thresholds (F version only) V HV Decreasing V BO(off) V Brown-Ou Thresholds (G version only) V HV Increasing V BO(on) V Brown-Ou Thresholds (G version only) V HV Decreasing V BO(off) V Brown-Ou Thresholds (H version only) V HV Increasing V BO(on) V Brown-Ou Thresholds (H version only) V HV Decreasing V BO(off) V Brown-Ou Timer Duraion (A, B, C, D, E, F, H, I, J and K versions) V HV Decreasing BO ms Brown-Ou Timer Duraion (G version only) V HV Decreasing BO ms FAULT INPUT (OTP/OVP) Over-Volage Proecion Threshold V FAULT Increasing V FAULT(OVP) V Over-Temperaure Proecion Threshold V FAULT Decreasing V FAULT(OTP) V NTC Biasing Curren V FAULT = 0 V I OTP A Uni Addiional NTC Biasing Curren during Sof-Sar Only V FAULT = 0 V During Sof-Sar Only I OTP_boos A Lach Clamping Volage I FAULT = 0 ma V FAULT(clamp) V Lach Clamping Volage I FAULT = 1 ma V FAULT(clamp) V Blanking Time afer Drive Turn Off LATCH(blank) 1 s Number of Clock Cycles before Lach Confirmaion LATCH(coun) 4 OVER-CURRENT PROTECTION (OCP) Inernal OCP Timer Duraion A, B, C, D, E, F, G and H versions OCP ms Inernal OCP Timer Duraion I, J and K versions OCP ms Auo- Timer AUTOREC s V CC OVER-VOLTAGE (V CC OVP) Lached Over Volage Proecion on V CC Pin A, B, C, D, E, G, H, I and K versions V CC(OVP) V Lached Over Volage Proecion on V CC Pin F and J versions V CC(OVP) V Delay before OVP on V CC Confirmaion OVP(delay) 20 s THERMAL SHUTDOWN (TSD) Temperaure Shudown T J Increasing (Noe 1) T SHDN C Temperaure Shudown Hyseresis T J Decreasing (Noe 1) T SHDN(hys) 20 C Produc parameric performance is indicaed in he Elecrical Characerisics for he lised es condiions, unless oherwise noed. Produc performance may no be indicaed by he Elecrical Characerisics if operaed under differen condiions. 1. Guaraneed by design 2. CS pin source curren is a sum of I BIAS and I OPP, hus a V HV = 125 V is observed he I BIAS only, because I OPC is swiched off. 8

9 TYPICAL PERFORMANCE CHARACTERISTICS V CC(on) (V) 12.0 V CC(min) (V) Figure 3. V CC(on) vs. Juncion Temperaure Figure 4. V CC(min) vs. Juncion Temperaure V CC(off) (V) V CC(inhibi) (V) Figure 5. V CC(off) vs. Juncion Temperaure Figure 6. V CC(inhibi) vs. Juncion Temperaure ICC2 (ma) ICC2 (ma) Figure 7. ICC2 (65-kHz Version) vs. Juncion Temperaure Figure 8. ICC2 (100-kHz Version) vs. Juncion Temperaure 9

10 TYPICAL PERFORMANCE CHARACTERISTICS I START1 (ma) I START2 (ma) Figure 9. I START1 vs. Juncion Temperaure Figure 10. I START2 vs. Juncion Temperaure I LEAK1 ( A) V LIMIT1 (V) Figure 11. I LEAK1 vs. Juncion Temperaure Figure 12. V LIMIT1 vs. Juncion Temperaure V LIMIT2 (V) DEL (ns) Figure 13. V LIMIT2 vs. Juncion Temperaure Figure 14. DEL vs. Juncion Temperaure 10

11 TYPICAL PERFORMANCE CHARACTERISTICS LEB1 (ns) LEB2 (ns) Figure 15. LEB1 vs. Juncion Temperaure Figure 16. LEB2 vs. Juncion Temperaure SS (ms) 8 f OSC (khz) Figure 17. SS vs. Juncion Temperaure Figure 18. f OSC (65-kHz Version) vs. Juncion Temperaure f OSC (khz) 100 D MAX (%) Figure 19. f OSC (100-kHz Version) vs. Juncion Temperaure Figure 20. D MAX vs. Juncion Temperaure 11

12 TYPICAL PERFORMANCE CHARACTERISTICS R EQ (k ) I OOP3 ( A) Figure 21. R EQ vs. Juncion Temperaure Figure 22. I OOP3 vs. Juncion Temperaure V BO(on) (V) V BO(off) (V) Figure 23. V BO(on) vs. Juncion Temperaure Figure 24. V BO(off) vs. Juncion Temperaure BO (ms) V FAULT(OVP) (V) Figure 25. BO vs. Juncion Temperaure Figure 26. V FAULT(OVP) vs. Juncion Temperaure 12

13 TYPICAL PERFORMANCE CHARACTERISTICS V FAULT(OTP) (V) I OTP ( A) Figure 27. V FAULT(OTP) vs. Juncion Temperaure Figure 28. I OTP vs. Juncion Temperaure OCP (ms) 65 AUTOREC (s) Figure 29. OCP vs. Juncion Temperaure Figure 30. AUTOREC vs. Juncion Temperaure V CC(OVP) (V) Figure 31. V CC(OVP) vs. Juncion Temperaure 13

14 DEFINITION General The NCP1239 implemens a sandard curren mode archiecure where he swich-off even is dicaed by he peak curren sepoin. This componen represens he ideal candidae where low par-coun and cos effeciveness are he key parameers, paricularly in low-cos ac-dc adapers, open-frame power supplies ec. The NCP1239 packs all he necessary componens normally needed in oday modern power supply designs, bringing several enhancemens such as a non-dissipaive over power proecion (OPP), a brown-ou proecion or HV sar-up curren source. Curren-Mode Operaion wih Inernal Ramp Compensaion Implemening peak curren mode conrol operaing a a 65 or 100-kHz swiching frequency, he NCP1239 offers a fixed inernal compensaion ramp ha can easily by summed up o he sensed curren. The conroller can be used in CCM applicaions wih wide inpu volage range hanks o is fixed ramp compensaion ha prevens he appearance of sub-harmonic oscillaions Inernal Brown-Ou Proecion A porion of he bulk volage is inernally sensed via he high-volage pin monioring (pin 8). When he volage on his pin is oo low, he par sops pulsing. No re-sar aemp is made unil he conroller senses ha he volage is back wihin is normal range. When he brown-ou comparaor senses he volage is accepable, de-lach occurs and he conroller auhorizes a re-sar synchronized wih V CC(on). Adjusable Overpower Compensaion The high inpu volage sensed on he HV pin is convered ino a curren. This curren builds an offse superimposed on he curren sense volage which is proporional o he inpu volage. By choosing he resisance value in series wih he CS pin, he amoun of compensaion can be adjused o he applicaion. High-Volage Sar-Up Low sandby power resuls canno be obained wih he classical resisive sar-up nework. In his par, a high-volage curren-source provides he necessary curren a sar-up and urns off aferwards. An opion is available o acivae he Dynamic SelfSupply (DSS). The sarup curren source is urned on o supply he conroller if he Vcc volage drops below a cerain level in ligh load. EMI Jiering An inernal low-frequency modulaion signal varies he pace a which he oscillaor frequency is modulaed. This helps spreading ou energy in conduced noise analysis. To improve he EMI signaure a low power levels, he jiering will no be disabled in frequency foldback mode (ligh load condiions). Frequency Foldback Capabiliy A coninuous flow of pulses is no compaible wih no-load/ligh-load sandby power requiremens. To excel in his domain, he conroller observes he feedback pin and when i reaches a level of 1.9 V, he oscillaor sars o reduce is swiching frequency as he feedback level coninues o decrease. When he feedback level reaches 1.5 V, he frequency his is lower sop a 26 khz. When he feedback pin goes furher down and reaches 1.0 V, he peak curren sepoin is inernally frozen. Below his poin, if he power coninues o drop, he conroller eners classical skip-cycle mode a a 31% frozen peak curren. Inernal Sof-Sar A sof-sar precludes he main power swich from being sressed upon sar-up. In his conroller, he sof-sar is inernally fixed o 8 ms. Sof-sar is acivaed when a new sar-up sequence occurs or during an auo-recovery hiccup. Faul Inpu The NCP1239 includes a dedicaed faul inpu accessible via is faul pin (pin 1). I can be used o sense an over-volage condiion on he adaper. The circui can be lached off by pulling he pin above he upper faul hreshold, V FAULT(OVP), ypically 3.0 V. The conroller is also disabled if he faul pin volage, V FAULT, is pulled below he lower faul hreshold, V FAULT(OTP), ypically 0.4 V. The lower hreshold is normally used for deecing an over-emperaure faul (by he means of an NTC). OVP Proecion on V CC I is someimes ineresing o implemen a circui proecion by sensing he V CC level. This is wha his conroller does by monioring is V CC pin. When he volage on his pin exceeds V cc(ovp) hreshold, he pulses are immediaely sopped and he par eners in an endless hiccup or auo-recovery mode depending on conroller opions. Shor-Circui/Overload Proecion Shor-circui and especially overload proecions are difficul o implemen when a srong leakage inducance beween auxiliary and power windings affecs he ransformer (he aux winding level does no properly collapse in presence of an oupu shor). Here, every ime he inernal 0.8-V maximum peak curren limi is acivaed, an error flag is assered and a ime period sars, hanks o he 64-ms imer. When he faul is validaed, all pulses are sopped and he conroller eners an auo-recovery burs mode, wih a sof-sar sequence a he beginning of each cycle. An inernal imer keeps he pulses off for 1 s ypically which, associaed o he 64-ms pulsing re-ry period, ensures a duy-cycle in faul mode less han 10%, independen from he line level. As soon as he faul disappears, he SMPS resumes operaion. Please noe ha some version offers an auo-recovery mode (B, C, D, E and K versions) as we jus described, some do no and lach off in case of a shor-circui (A, F, G, H, I and J versions). 14

15 HV CURRENT SOURCE PIN The NCP1239 HV circuiry provides hree feaures: Sar-Up Curren Source o Charge he V CC Capacior a Power On Brown-Ou Proecion: when he HV Pin Volage is below V BO(off) for he 68-ms Blanking Time (136 ms for G version), he NCP1239 Sops Operaing and Recovers whenhe HV Pin Volage Exceeds V BO(on) Over Power Proecion: HV Pin Volage is Sensed o Deermine he Amoun of OPP Curren Flowing Ou he CS Pin The HV pin can be conneced eiher o he bulk capacior or o he inpu line erminals hrough a diode. I is furher recommended o implemen one or wo resisors (in he range of 2.2 k ) o reduce he noise ha can be picked-up by he HV pin. START-UP SEQUENCE The sar-up ime of a power supply largely depends on he ime necessary o charge he V CC capacior o he conroller sar-up hreshold (V CC(on) which is 12 V ypically). The NCP1239 high-volage curren-source provides he necessary curren for a promp sar-up and urns off aferwards. The delivered curren (I START1 ) is reduced o less han 0.5 ma when he V CC volage is below V CC(inhibi) (1.2 V ypically). This feaure reduces he die sress if he V CC pin happens o be accidenally grounded. When V CC exceeds V CC(inhibi), a 3-mA curren (I START2 ) is provided and charges he V CC capacior. Please noe ha he inernal IC consumpion is increased from few A o 310 A (ICC4) when V CC crosses V CC(min) in order o have inernal logic wake-up when V CC reaches V CC(on). The V CC charging ime is hen he oal of he hree following duraions: Charge from 0 V o V CC(inhibi) : V CC(inhibi) C VCC START1 I START1 ICC5 (eq. 1) Charge from V CC(inhibi) o V CC(min) : START2 VCC(min) V CC(inhibi) CVCC I START2 ICC5 Charge from V CC(min) o V CC(on) : START3 VCC(on) V CC(min) CVCC I START2 ICC4 (eq. 2) (eq. 3) Assuming a 22- F V CC capacior is seleced and replacing I START1, I START2, ICC4, ICC5, V CC(inhibi) and V CC(on) by heir ypical values, i comes: u START1 500 u 20 u 55 ms (eq. 4) (10 1.2) 22 u START2 65 ms (eq. 5) 3m 20 u (12 10) 22 u START3 16 ms (eq. 6) 3m 310 u START START1 START2 START3 136 ms (eq. 7) V cc(on) V cc(min) V cc(inhibi) v cc () sar1 sar2 sar3 Figure 32. The V CC a Sar-Up is Made of Two Segmens Given he Shor-Circui Proecion Implemened on he HV Source 15

16 If he V CC capacior is firs dimensioned o supply he conroller for he radiional 5 o 50 ms unil he auxiliary winding akes over, no-load sandby requiremens usually cause i o be larger. The HV sar-up curren source is hen a key feaure since i allows keeping shor sar-up imes wih large V CC capaciors (he oal sar-up sequence duraion is ofen required o be less han 1 s). When he DSS mode is enable (NCP1239JD65), he V CC volage is mainained beween V CC(on) and V CC(min) by urning he HV sarup curren source on and off. This funcion can be used only during ransien load or in ligh load condiion. The HV curren source canno supply he conroller in Fixedfrequency operaion oherwise he die will overhea. As a resul, an auxiliary volage source is needed o supply V CC during normal operaion. BROWN-OUT CIRCUITRY For he vas majoriy of conrollers, inpu line sensing is performed via a resisive nework monioring he bulk volage or he incoming ac signal. When in he ques of low sandby power, he exernal nework adds a consumpion burden and deerioraes he power supply sandby power performance. Owing o is proprieary high-volage echnology, ON Semiconducor now offers onboard line sensing wihou using an exernal nework. The sysem includes a 90-M resisive nework ha brings a minimum sar-up hreshold and an auo-recovery brown-ou proecion. Boh levels are independen from he inpu volage ripple. The brown-ou hresholds are fixed (see levels in he elecrical characerisics able), bu hey are designed o fi mos of sandard ac-dc converer applicaions. The simplified inernal schemaic appears in Figure 33 while ypical operaing waveforms are drawn in Figure 34 and Figure 35. Vbulk HV Rbo_H N L1 EMI Filer Rbo_L BO_OK GND VBO Figure 33. A Simplified View of he Brown-Ou Circuiry When he HV pin volage drops below he V BO(off) hreshold, he brown-ou proecion rips: he conroller sops generaing DRV pulses once he BO imer elapses. V CC is discharged o V CC(min) by he conroller consumpion iself. When his level is reached, he HV curren source is acivaed o lifs V CC up again. A new V CC(on), BO signal is again sensed. If V HV >V BO(on), he pars resars. If he condiion is no me, no drive pulse is delivered and inernal IC consumpion brings V CC down again. As a resul, V CC operaes in hiccup mode during a BO even. 16

17 v cc () BO_OK = "0" Drive pulse sops V cc(on) V cc(min) V cc(off) V cc hiccup waiing BO signal v DRV () No pulse area BO() BO_OK = "1" BO_OK = "0" BO_OK = "1" Figure 34. BO Even during Normal Operaion v cc () BO no OK No drive pulse Firs drive pulse V cc(on) V cc(min) V cc(off) V cc hiccup waiing BO signal BO_OK = "1" Wai he nex V cc(on) for fresh sar-up sequence V cc(inhibi) BO() BO_OK = "0" BO_OK = "1" Figure 35. BO Even before Sar-Up 17

18 OVER POWER PROTECTION Over Power Proecion (OPP) is a known means o limi he oupu power runaway a high mains. Several elemens such as propagaion delays and operaing mode explain why a converer operaed a high line delivers more power han a low line. NCP1239 senses he inpu volage via HV pin. This line volage is ransformed ino a curren informaion furher applied o he curren sense pin (CS). A resisor placed in series from he sense resisor o he CS pin will creae an offse volage proporional o he inpu volage variaion. An added curren sink will ensure a zero OPP curren a low line (125 V dc), leaving he converer power capabiliy inac in he lowes operaing volage. Figure 36 presens he inernal simplified archiecure of his OPP circuiry. N EMI Filer Vbulk HV HV deecion & sampling HV sample L1 OPP curren generaion Vfb Iopp ROPP offse CS To CS comparaor Rsense Figure 36. Over Power Proecion is Provided via he Bulk Volage Presen on HV Pin The HV volage will be ransformed ino a curren equal o 67.5 A when he HV pin is biased o 125 V. However, here is an inernal fixed sink of 67.5 A. Therefore, he ne curren flowing ino R OPP is 0 a his low-volage inpu ( 125 V dc), ensuring an almos non-compensaed converer a low line: a a 115-V rms inpu (162 V dc), he curren from he OTA block will induce a A curren, urning ino a 20- A offse curren flowing ino R OPP. Now, assume a 260-V rms inpu volage (365 V dc), he conroller will generae an offse curren of: u 67.5 u 130 A (eq. 8) Assume we need o reduce he maximum peak curren sepoin by 250 mv o limi he maximum power a he considered 260-V rms inpu. In ha case, we will need o generae a 250-mV offse across R OPP. Wih a 130- A curren, R OPP should be equal o: 250 m 130 u 192 k (eq. 9) A small pF capacior closely conneced beween he CS and GND pins will form an effecive noise filer and nicely improves he converer immuniy. Now, wih his 1.92-k resisance, he low-line 20- A offse curren will incur a 38-mV drop, which, in relaionship o a 800-mV maximum peak, generaes a small 5% reducion. Assuming a full DCM operaion, he power would be reduced by or 9.75% only. Please noe ha he OPP curren is clamped for a HV pin volage greaer han 365 V dc. Should you lif he pin above his volage, here will be no increase of he OPP curren. The offse volage can affec he sandby power performance by reducing he peak curren sepoin in ligh-load condiions. For his reason, i is desirable o cancel 18

19 is acion as soon as frequency folback occurs. A ypical curve variaion is shown in Figure 37. A low power, below he frequency folback saring poin, 100% of he OPP curren is inernally absorbed and no offse is creaed hrough he CS pin. When feedback increases again and reaches he frequency foldback poin, as he frequency goes up, OPP sars o build up and reaches is full value a V FOLD V. v FB () max F sw decreases F sw increases V V fold I OPP (%) Figure 37. The OPP Curren is Applied when he Feedback Volage Exceeds he Folback Poin. I is 0 below i FAULT INPUT The NCP1239 includes a dedicaed faul inpu accessible via he faul pin. Figure 38 shows he archiecure of he faul inpu. The conroller can be lached by pulling up he pin above he upper faul hreshold, V FAULT(OVP), ypically 3.0 V. An acive clamp prevens he Faul pin volage from reaching he V FAULT(OVP) if he pin is open. To reach he upper hreshold, he exernal pull-up curren has o be higher han he pull-down capabiliy of he clamp. V FAULT(OVP) V FAULT(clamp) R FAULT(clamp) i.e. approximaely 1.2 ma 3V 1.35 V 1.35 k, (eq. 10) This funcion is ypically used o deec a V CC or auxiliary winding over-volage by means of a Zener diode generally in series wih a small resisor (see Figure 38). Neglecing he resisor volage drop, he OVP hreshold is hen: V AUX(OVP) V Z V FAULT(OVP) (eq. 11) where V Z is he Zener diode Volage. The conroller can also be lached off if he faul pin volage, V FAULT, is pulled below he lower faul hreshold, V FAULT(OTP), ypically 0.4 V. This capabiliy is normally used for deecing an over-emperaure faul by means of an NTC hermisor. A pull up curren source I OTP, (ypically 45 A) generaes a volage drop across he hermisor. The resisance of he NTC hermisor decreases a higher emperaures resuling in a lower volage across he hermisor. The conroller deecs a faul once he hermisor volage drops below V FAULT(OTP). The circui deecs an over-emperaure siuaion when: R NTC I OTP V FAULT(OTP) (eq. 12) Hence, he OTP proecion rips when V FAULT(OTP) R NTC I OTP 8.9 k (Typically) (eq. 13) 19

20 The conroller bias curren is reduced during power up by disabling mos of he circui blocks including I FAULT(OTP). This curren source is enabled once V CC reaches V CC(min). A bypass capacior is usually conneced beween he Faul and GND pins. I will ake some ime for V FAULT o reach is seady sae value once I OTP is enabled. Therefore, he lower faul comparaor (i.e. over-emperaure deecion) is ignored during sof-sar. In addiion, in order o speed up his faul pin capacior, OTP curren is doubled during he sof-sar period. Vaux 600 ns Time consan Up couner 4 Faul Vdd IOTP VFaul(OVP) 1 s Blanking Time DRV Falling edge RST OVP/OTP gone S R Q Q Lach NTC Rfaul(clamp) Vfaul(clamp) VFaul(OTP) Power on rese Figure 38. Faul Deecion Schemaic As a maer of fac, he conroller operaes normally while he faul pin volage is mainained wihin he upper and lower faul hresholds. Upper and lower faul deecors have blanking delays o preven noise from riggering hem. Boh OVP and OTP comparaor oupu are validaed only if is high-sae duraion lass a minimum of 600 ns. Below his value, he even is ignored. Then, a couner ensures ha OVP/OTP evens occurred for 4 successive drive clock pulses before acually laching he par. When he par is lached-off, he drive is immediaely urned off and V CC goes in endless hiccup mode. The power supply needs o be un-plugged o rese he par (V CC(rese) or BO even). Please noe ha his proecion on he Faul pin is auorecovery for he E version. AUTO-RECOVERY SHORT-CIRCUIT PROTECTION In case of oupu shor-circui or if he power supply experiences a severe overloading siuaion, an inernal error flag is raised and sars a coundown imer. If he flag is assered longer han he imer s programmed value, he driving pulses are sopped and a 1-s auo-recovery imer sars. If V CC volage is below V CC(min), HV curren source is acivaed o build up he volage o V CC(on). On he conrary, if V CC volage is above V CC(min), HV curren source is no acivaed, V CC falls down as he auxiliary pulses are missing and he conroller wais ha V CC(min) is crossed o enable he sa-up curren source. During he imer coun down, he conroller purposely ignores he re-sar when V CC crosses V CC(on) and wais for anoher V CC cycle. By lowering he duy cycle in faul condiion, i naurally reduces he average inpu power and he rms curren in he oupu cable. Illusraion of such principle appears in Figure 39. Please noe ha sof-sar is acivaed upon re-sar aemp. 20

21 V cc(on) v cc () Overload on he oupu volage V cc(min) OCP imer Auorecovery imer OCP imer Auorecovery imer V cc(off) v DRV () No pulse area Figure 39. An Auo- Hiccup Mode is Enered in Case a Fauly Even Longer han 64 ms is Acknowledged by he Conroller The hiccup is operaing regardless of he brown-ou level. However, when he inernal comparaor oggles indicaing ha he conroller recovers from a brown-ou siuaion (he inpu line was ok, hen oo low and back again o normal), he hiccup is inerruped and he conroller re-sars o he nex available V CC(on). Figure 40 displays he resuling waveform: he conroller is proecing he converer agains an overload. The mains suddenly wen down, and hen back again a a normal level. Righ a his momen, he hiccup logic receives a rese signal and ignores he nex hiccup o immediaely iniiae a re-sar signal. V cc(on) v cc () Overload on he oupu volage V cc(min) OCP imer Auorecovery imer V cc(off) v DRV () No pulse area BO() BO_OK = "1" BO_OK = "1" BO_OK = "0" Figure 40. BO Even in Auo- or Lach Mode 21

22 LATCHED SHORT CIRCUIT PROTECTION WITH PRE-SHORT In some applicaions, he conroller mus be fully lached in case of an oupu shor circui presence. When he error flag is assered, meaning he conroller is asked o deliver is full peak curren, upon imer compleion, he conroller laches off: all pulses are immediaely sopped and V CC hiccups beween he wo levels, V CC(on) and V CC(min). However, in presence of a small V CC capacior, i can very well be he case where he sored energy does no give enough ime o le he imer elapse before V CC ouches he V CC(off). When his happens, he lach is no acknowledged since he imer coundown has been premaurely abored. To avoid his problem, NCP1239 combines he error flag asserion ogeher wih he UVLO flag: upon sar up, as maximum power is asked o increase V OUT, he error flag is emporarily raised unil regulaion is me. If during he ime he flag is raised an UVLO even is deeced, he par laches off immediaely. When lached, V CC hiccups beween he wo levels, V CC(on) and V CC(min) unil a rese occurs (Brown-ou even or V CC cycled down below V CC(rese) ). In normal operaion, if a UVLO even is deeced for any reason while he error flag is no assered, he conroller will naurally resume operaions. Please also noe ha his pre-shor proecion is acivaed only during sar-up sequence. In normal operaion, even if an UVLO even occurs while he error flag is assered, he conroller will eners in auo-recovery mode. Deails of his behavior are given in Figure 41. v cc () lached rese Fb OK resumed V cc(on) V cc(min) V cc(off) New sequence Glich or overload v DRV () UVLO AND OCP flag a sarup 1 OCP flag 0 Figure 41. UVLO Even during Sar-Up Sequence and in Normal Operaion LATCHING OR AUTO-RECOVERY MODE The B, C, D, E and K versions are auo-recovery. When an overload faul is deeced, hey sop generaing drive pulses and V CC hiccups beween V CC(min) and V CC(on) during he auo-recovery imer before iniiae a fresh sar-up sequence wih sof-sar. The A, F, G, H, I and J versions lach off when hey deec an overload siuaion. In his condiion, he circui sops generaing drive pulses and le V CC drop down. When V CC has reached 10-V CC(min) level, he circui charged up V CC o V CC(on). The conroller eners in an endless hiccup mode. The device canno recover operaion unil V CC drops below V CC(rese) or brownou recovery signal is applied. Pracically, he power supply mus be unplugged o be rese (V CC <V CC(rese) ). Please noe ha he conroller always eners in auo-recovery mode when he UVLO even occurs wihou inernal error flag signal (ie: wihou overload). 22

23 FREQUENCY FOLDBACK The reducion of no-load sandby power associaed wih he need for improving he efficiency, requires o change he radiional fixed-frequency ype of operaion. This conroller implemens a swiching frequency folback when he feedback volage passes below a cerain level, V FOLD, se a 1.9 V. A his poin, he oscillaor urns ino a Volage-Conrolled Oscillaor (VCO) and reduces swiching frequency down o a feedback volage of 1.5 V where swiching frequency is 26 khz ypically. Below Frequency 1.5 V, he frequency is fixed and canno go furher down. The peak curren sepoin is free o follow he feedback volage from 3.2 V (full power) down o 1 V. A 1 V, as boh frequency and peak curren are frozen (250 mv or 31% of he maximum 0.8-V sepoin) he only way o furher reduce he ransmied power is o ener skip cycle. This is wha happens when he feedback volage drops below 0.8 V ypically. Figure 42 depics he adoped scheme for he par. Peak curren sepoin F SW V CS FB 65 khz V fold(end) max 0.8 V max 0.47 V 26 khz min skip 0.8 V 1.5 V 1.9 V 3.2 V V skip V fold V FB 0.25 V min 0.8 V V skip 1.0 V 1.9 V V freeze V fold 3.2 V V FB Figure 42. By Observing he Volage on he Feedback Pin, he Conroller Reduces is Swiching Frequency for an Improved Performance a Ligh Load SLOPE COMPENSATION Slope compensaion is a known means o figh sub-harmonic oscillaions in peak-curren mode conrolled power converers (flyback in our case). By adding an arificial ramp o he curren sense informaion or subracing i from he feedback volage, you implemen slope compensaion. How much compensaion do you need? The simples way is o consider he primary-side inducor downslope and apply 50% of is value for slope compensaion. For insance, assume a 65-kHz/19-V oupu flyback converer whose ransformer urns raio 1:N is 1:0.25. The primary inducor is 600 H. As such, assuming a 1-V forward drop of he oupu recifier, he downslope is evaluaed o: V OUT V f 19 1 S OFF (eq. 14) NL p u If we have a sense resisor, hen he curren downslope urns ino a volage downslope whose value is simply: S OFF S OFF R SENSE (eq. 15) 133 m mv s 50% of his value is 22 mv/ s. The inernal slope compensaion level is ypically 29 mv/ s (for he 65-kHz version) so i will nicely compensae his design example. Wha if my converer is under compensaed? You can sill add compensaion ramp via a simple RC arrangemen showed in Figure 43. Please look a AND8029 available from regarding calculaion deails of his configuraion. 133 ka s or133ma s 23

24 DRV R1 D1 1N4148 CS C1 R4 R3 Rsense Figure 43. An Easy Means o Add Slope Compensaion is by Using an Exra RC Nework Building a Ramp from he Drive Signal A 2 ND OVER-CURRENT COMPARATOR FOR ABNORMAL OVER-CURRENT FAULT DETECTION A severe faul like a winding shor-circui can cause he swich curren o increase very rapidly during he on-ime. The curren sense signal significanly exceeds V ILIM1. Bu, because he curren sense signal is blanked by he LEB circui during he swich urn on, he power swich curren can become huge causing sysem damage. The NCP1239 proecs agains his faul by adding an addiional comparaor for abnormal over-curren faul deecion. The curren sense signal is blanked wih a shorer LEB duraion, LEB2, ypically 120 ns, before applying i o he abnormal over-curren faul comparaor. The volage hreshold of he comparaor, V ILIM2, ypically 1.2 V, is se 50 % higher han V LIMIT1, o avoid inerference wih normal operaion. Four consecuive abnormal over-curren fauls cause he conroller o ener lach mode. The coun o 4 provides noise immuniy during surge esing. The couner is rese each ime a DRV pulse occurs wihou acivaing he Faul Over-Curren Comparaor. Please noe ha like imer-based shor-circui proecion, A, F, G, H, I and J versions are laching off compared o B, C, D, E and K versions ha are auo-recovery. OVER-VOLTAGE PROTECTION ON V CC PIN The NCP1239 hoss a dedicaed comparaor on he V CC pin. When he volage on his pin exceeds 25.5 V ypically (32.0 V for F and J versions) for more han 20 s, a signal is sen o he inernal lach and he conroller immediaely sops he driving pulses while remaining in a lockou sae. Depending conroller opions, his OVP on V CC pin can be auo-recovery or lached. For laching-off versions, he par can be rese by cycling down is V CC, for insance by pulling off he power plug bu also if a brown-ou recovery is sensed by he conroller. This echnique offers a simple and cheap means o proec he converer agains opocoupler. PROTECTING FROM A FAILURE OF THE CURRENT SENSING A 1- A (ypically) pull-up curren source, I CS, pulls up he CS pin o disable he conroller if he pin is lef open. In addiion he maximum duy raio limi (80% ypically) avoids ha he MOSFET says permanenly on if he swich curren canno reach he sepoin when for insance, he inpu volage is low or if he CS pin is grounded. In his case, he OCP imer is acivaed. If he imer elapses, he conroller eners in auo-recovery or endless hiccup mode depending on he conroller opion. This unexpeced operaion can lead o deep CCM wih desrucive consequences. 24

25 SOFT-START Sof-sar is achieved by ramping up an inernal reference, V SSTART, and comparing i o curren sense signal. V SSTART ramps up from 0 V once he conroller powers up. The sepoin rise is hen limied by he V SSTART ramp so ha a gradual increase of he power swich curren during sar-up. The sof-sar duraion (ha is, he ime necessary for he ramp o reach he V ILIM1 seady sae curren limi), SSTART, is ypically 8 ms. DRIVER The NCP1239 maximum supply volage, V CC(max), is 25.5 V (32.0 V for F and J versions). Typical high-volage MOSFETs have a maximum gae-source volage raing of 20 V. The DRV pin incorporaes an acive volage clamp o limi he gae volage on he exernal MOSFETs. The DRV volage clamp, V DRV(high) is ypically 13.5 V wih a maximum limi of 16 V. THERMAL SHUTDOWN An inernal hermal shudown circui moniors he juncion emperaure of he IC. The conroller is disabled if he juncion emperaure exceeds he hermal shudown hreshold, T SHDN, ypically 150 C. A coninuous V CC hiccup is iniiaed afer a hermal shudown faul is deeced. The conroller resars a he nex V CC(on) once he IC emperaure drops below below T SHDN by he hermal shudown hyseresis, T SHDN(HYS), ypically 20 C. The hermal shudown is also cleared if V CC drops below V CC(rese) or a brown-ou faul is deeced. A new power up sequences commences a he nex V CC(on) once all he fauls are removed. Table 5. ORDERING INFORMATION Device Marking Freq. OCP Proecion V CC OVP Proecion Faul Pin Proecion NCP1239AD65R2G 1239A khz Lach Lach Lach 110/101 NCP1239BD65R2G 1239B khz Auo- Lach Lach 110/101 NCP1239CD65R2G 1239C khz Auo- Auo- Lach 110/101 NCP1239DD65R2G 1239D khz Auo- Lach Lach 101/95 NCP1239ED65R2G 1239E khz Auo- Auo- Auo- 110/101 NCP1239FD65R2G 1239F khz Lach Lach Lach 229/176 NCP1239HD65R2G 1239H khz Lach Lach Lach 229/224 NCP1239ID65R2G 1239I khz Lach Lach Lach 101/95 NCP1239JD65R2G 1239J khz Lach Lach Lach 101/95 NCP1239KD65R2G 1239K khz Auo- Auo- Auo- 110/101 NCP1239AD100R2G 1239A khz Lach Lach Lach 110/101 NCP1239BD100R2G 1239B khz Auo- Lach Lach 110/101 NCP1239ED100R2G 1239E khz Auo- Auo- Auo- 110/101 NCP1239GD100R2G 1239G khz Lach Lach Lach 95/86 BO Levels Package Shipping SOIC7 (Pb-Free) 2500 / Tape & Reel For informaion on ape and reel specificaions, including par orienaion and ape sizes, please refer o our Tape and Reel Packaging Specificaion Brochure, BRD8011/D. 25

26 PACKAGE DIMENSIONS 8 1 A 5 4 B S 0.25 (0.010) M SOIC7 CASE 751U ISSUE E B M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B ARE DATUMS AND T IS A DATUM SURFACE. 4. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 5. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. T H G D 7 PL C SEATING PLANE 0.25 (0.010) M T B S A S R X 45 M K J MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D G 1.27 BSC BSC H J K M N S SOLDERING FOOTPRINT* SCALE 6:1 mm inches *For addiional informaion on our PbFree sraegy and soldering deails, please download he ON Semiconducor Soldering and Mouning Techniques Reference Manual, SOLDERRM/D. ON Semiconducor and are rademarks of Semiconducor Componens Indusries, LLC dba ON Semiconducor or is subsidiaries in he Unied Saes and/or oher counries. ON Semiconducor owns he righs o a number of paens, rademarks, copyrighs, rade secres, and oher inellecual propery. A lising of ON Semiconducor s produc/paen coverage may be accessed a /sie/pdf/paenmarking.pdf. ON Semiconducor reserves he righ o make changes wihou furher noice o any producs herein. ON Semiconducor makes no warrany, represenaion or guaranee regarding he suiabiliy of is producs for any paricular purpose, nor does ON Semiconducor assume any liabiliy arising ou of he applicaion or use of any produc or circui, and specifically disclaims any and all liabiliy, including wihou limiaion special, consequenial or incidenal damages. Buyer is responsible for is producs and applicaions using ON Semiconducor producs, including compliance wih all laws, regulaions and safey requiremens or sandards, regardless of any suppor or applicaions informaion provided by ON Semiconducor. Typical parameers which may be provided in ON Semiconducor daa shees and/or specificaions can and do vary in differen applicaions and acual performance may vary over ime. All operaing parameers, including Typicals mus be validaed for each cusomer applicaion by cusomer s echnical expers. ON Semiconducor does no convey any license under is paen righs nor he righs of ohers. ON Semiconducor producs are no designed, inended, or auhorized for use as a criical componen in life suppor sysems or any FDA Class 3 medical devices or medical devices wih a same or similar classificaion in a foreign jurisdicion or any devices inended for implanaion in he human body. Should Buyer purchase or use ON Semiconducor producs for any such uninended or unauhorized applicaion, Buyer shall indemnify and hold ON Semiconducor and is officers, employees, subsidiaries, affiliaes, and disribuors harmless agains all claims, coss, damages, and expenses, and reasonable aorney fees arising ou of, direcly or indirecly, any claim of personal injury or deah associaed wih such uninended or unauhorized use, even if such claim alleges ha ON Semiconducor was negligen regarding he design or manufacure of he par. ON Semiconducor is an Equal Opporuniy/Affirmaive Acion Employer. This lieraure is subjec o all applicable copyrigh laws and is no for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Lieraure Disribuion Cener for ON Semiconducor E. 32nd Pkwy, Aurora, Colorado USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderli@onsemi.com N. American Technical Suppor: Toll Free USA/Canada Europe, Middle Eas and Africa Technical Suppor: Phone: Japan Cusomer Focus Cener Phone: ON Semiconducor Websie: Order Lieraure: hp:///orderli For addiional informaion, please conac your local Sales Represenaive NCP1239/D

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