STB13N60M2, STD13N60M2

Transcription

1 STB13N60M2, STD13N60M2 N-channel 600 V, 0.35 Ω typ., 11 A MDmesh M2 Power MOSFETs in D 2 PAK and DPAK packages Datasheet - production data Features Order code VDS@TJMAX. RDS(on) max. ID STB13N60M2 STD13N60M2 650 V 0.38 Ω 11 A Figure 1: Internal schematic diagram G(1) D(2, TAB) Extremely low gate charge Excellent output capacitance (COSS) profile 100% avalanche tested Zener-protected Applications Switching applications Description These devices are N-channel Power MOSFETs developed using MDmesh M2 technology. Thanks to their strip layout and improved vertical structure, these devices exhibit low on-resistance and optimized switching characteristics, rendering them suitable for the most demanding high efficiency converters. S(3) AM01476v1_tab Table 1: Device summary Order code Marking Package Packing STB13N60M2 D 2 PAK 13N60M2 Tape and reel STD13N60M2 DPAK September 2016 DocID Rev 4 1/23 This is information on a product in full production.

2 Contents STB13N60M2, STD13N60M2 Contents 1 Electrical ratings Electrical characteristics Electrical characteristics (curves) Test circuits Package mechanical data D 2 PAK (TO-263) type A package information DPAK (TO-252) type A2 package information DPAK (TO-252) type C2 package information D 2 PAK and DPAK packing information Revision history /23 DocID Rev 4

3 STB13N60M2, STD13N60M2 Electrical ratings 1 Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VGS Gate-source voltage ± 25 V ID Drain current (continuous) at TC = 25 C 11 A ID Drain current (continuous) at TC = 100 C 7 A IDM (1) Drain current (pulsed) 44 A PTOT Total dissipation at TC = 25 C 110 W dv/dt (2) Peak diode recovery voltage slope 15 dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns Tstg Tj Storage temperature range - 55 to 150 C Operating junction temperature range Notes: (1) Pulse width limited by safe operating area. (2) ISD 11 A, di/dt 400 A/µs; VDS peak < V(BR)DSS, VDD = 400 V. (3) VDS 480 V. Table 3: Thermal data Value Symbol Parameter D 2 PAK DPAK Rthj-case Thermal resistance junction-case max Rthj-pcb (1) Thermal resistance junction-pcb max Unit C/W Notes: (1) When mounted on FR-4 board of 1 inch², 2 oz Cu. Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR EAS Avalanche current, repetetive or not repetetive (pulse width limited by Tjmax.) Single pulse avalanche energy (starting Tj = 25 C, ID = IAR; VDD = 50 V) 2.8 A 125 mj DocID Rev 4 3/23

4 Electrical characteristics STB13N60M2, STD13N60M2 2 Electrical characteristics TC = 25 C unless otherwise specified Table 5: On/off-states Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS IDSS Drain-source breakdown voltage Zero-gate voltage drain current VGS = 0 V, ID = 1 ma 600 V VGS = 0 V, VDS = 600 V 1 µa VGS = 0 V, VDS = 600 V, TC = 125 C (1) 100 µa IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µa VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µa V RDS(on) Notes: Static drain-source onresistance (1) Defined by design, not subject to production test. VGS = 10 V, ID = 5.5 A Ω Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Coss Crss Coss eq. (1) RG Input capacitance Output capacitance Reverse transfer capacitance Equivalent output capacitance Intrinsic gate resistance VDS= 100 V, f = 1 MHz, VGS = 0 V pf pf pf VDS = 0 to 480 V, VGS = 0 V pf f = 1 MHz, ID = 0 A Ω Qg Total gate charge nc Qgs VDD = 480 V, ID = 11 A, VGS = 10 V Gate-source (see Figure 17: "Test circuit for gate charge charge behavior") nc Qgd Gate-drain charge nc Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 4/23 DocID Rev 4

5 STB13N60M2, STD13N60M2 Table 7: Switching times Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit Turn-on ns delay time VDD = 300 V, ID = 5.5 A, RG = 4.7 Ω, tr Rise time VGS = 10 V (see Figure 16: "Test circuit for ns Turn-offdelay time "Switching time waveform") resistive load switching times" and Figure 21: ns td(on) td(off) tf Fall time ns Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD ISDM (1) VSD (2) trr Qrr IRRM trr Qrr IRRM Notes: Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current Reverse recovery time Reverse recovery charge Reverse recovery current (1) Pulse width is limited by safe operating area. (2) Pulsed: pulse duration = 300 µs, duty cycle 1.5% A - 44 A VGS = 0 V, ISD = 11 A V ISD = 11 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 18: "Test circuit for inductive load switching and diode recovery times") ISD = 11 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 C (see Figure 18: "Test circuit for inductive load switching and diode recovery times") ns µc A ns µc - 19 A DocID Rev 4 5/23

6 Electrical characteristics STB13N60M2, STD13N60M2 2.2 Electrical characteristics (curves) Figure 2: Safe operating area for D 2 PAK Figure 3: Thermal impedance for D 2 PAK K δ = 0.5 CG20930 δ = δ = 0.1 δ = 0.05 δ = 0.02 δ = 0.01 SINGLE PULSE Z th th = k R thj-c thj-c δ = t p / Ƭ t p Ƭ 10-1 t p (s) Figure 4: Safe operating area for DPAK Figure 5: Thermal impedance for DPAK 6/23 DocID Rev 4

7 STB13N60M2, STD13N60M2 Figure 6: Output characteristics Electrical characteristics Figure 7: Transfer characteristics Figure 8: Normalized V(BR)DSS vs. temperature Figure 9: Static drain-source on-resistance Figure 10: Gate charge vs. gate-source voltage Figure 11: Capacitance variations DocID Rev 4 7/23

8 Electrical characteristics Figure 12: Normalized gate threshold voltage vs. temperature STB13N60M2, STD13N60M2 Figure 13: Normalized on-resistance vs. temperature Figure 14: Source-drain diode forward characteristics Figure 15: Output capacitance stored energy 8/23 DocID Rev 4

9 STB13N60M2, STD13N60M2 Test circuits 3 Test circuits Figure 16: Test circuit for resistive load switching times Figure 17: Test circuit for gate charge behavior V DD RL V GS I G = CONST 100 Ω D.U.T. pulse width 2200 μf kω 47 kω V G 1 kω AM01469v10 Figure 18: Test circuit for inductive load switching and diode recovery times Figure 19: Unclamped inductive load test circuit Figure 20: Unclamped inductive waveform Figure 21: Switching time waveform DocID Rev 4 9/23

10 Package mechanical data STB13N60M2, STD13N60M2 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. 4.1 D 2 PAK (TO-263) type A package information Figure 22: D²PAK (TO-263) type A package outline _A_rev22 10/23 DocID Rev 4

11 STB13N60M2, STD13N60M2 Package mechanical data Table 9: D²PAK (TO-263) type A package mechanical data mm Dim. Min. Typ. Max. A A b b c c D D D E E E e 2.54 e H J L L L R 0.4 V2 0 8 DocID Rev 4 11/23

12 Package mechanical data STB13N60M2, STD13N60M2 Figure 23: D²PAK (TO-263) type A recommended footprint (dimensions are in mm) 12/23 DocID Rev 4

13 STB13N60M2, STD13N60M2 Package mechanical data 4.2 DPAK (TO-252) type A2 package information Figure 24: DPAK (TO-252) type A2 package outline _type-A2_rev21 DocID Rev 4 13/23

14 Package mechanical data Dim. STB13N60M2, STD13N60M2 Table 10: DPAK (TO-252) type A2 mechanical data mm Min. Typ. Max. A A A b b c c D D E E e e H L L L L R 0.20 V /23 DocID Rev 4

15 STB13N60M2, STD13N60M2 Package mechanical data Figure 25: DPAK (TO-252) type A2 recommended footprint (dimensions are in mm) DocID Rev 4 15/23

16 Package mechanical data STB13N60M2, STD13N60M2 4.3 DPAK (TO-252) type C2 package information Figure 26: DPAK (TO-252) type C2 package outline 16/23 DocID Rev 4

17 STB13N60M2, STD13N60M2 Dim. Package mechanical data Table 11: DPAK (TO-252) type C2 mechanical data mm Min. Typ. Max. A A A b b c c D D E E e H L L REF L L BSC L L BSC θ θ V2 0 8 DocID Rev 4 17/23

18 Package mechanical data STB13N60M2, STD13N60M2 Figure 27: DPAK (TO-252) type C2 recommended footprint (dimensions are in mm) FP_ _21 18/23 DocID Rev 4

19 STB13N60M2, STD13N60M2 4.4 D 2 PAK and DPAK packing information Figure 28: Tape outline Package mechanical data DocID Rev 4 19/23

20 Package mechanical data Figure 29: Reel outline STB13N60M2, STD13N60M2 Table 12: D²PAK tape and reel mechanical data Tape Reel Dim. mm mm Dim. Min. Max. Min. Max. A A 330 B B 1.5 D C D D 20.2 E G F N 100 K T 30.4 P P Base quantity 1000 P Bulk quantity 1000 R 50 T W /23 DocID Rev 4

21 STB13N60M2, STD13N60M2 Package mechanical data Table 13: DPAK tape and reel mechanical data Tape Reel Dim. mm mm Dim. Min. Max. Min. Max. A A 330 B B 1.5 B C D D 20.2 D1 1.5 G E N 50 F T 22.4 K P Base qty P Bulk qty P R 40 T W DocID Rev 4 21/23

22 Revision history STB13N60M2, STD13N60M2 5 Revision history Table 14: Document revision history Date Revision Changes 22-Apr First release. 28-Jun Mar Sep Document status promoted from preliminary data to production data - Minor text changes Updated: Table 10 and Table 25 - Minor text changes Updated the title, features and the description. Updated Section 4.1: "D2PAK (TO-263) type A package information", Section 4.2: "DPAK (TO-252) type A2 package information", Section 4.3: "DPAK (TO-252) type C2 package information" and Section 4.4: "D2PAK and DPAK packing information". 22/23 DocID Rev 4

23 STB13N60M2, STD13N60M2 IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document STMicroelectronics All rights reserved DocID Rev 4 23/23