Arithmetic Circuits. (Part II) Randy H. Katz University of California, Berkeley. Fall Overview BCD Circuits. Combinational Multiplier Circuit

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1 (art II) Randy H. Katz University of alifornia, Berkeley Fall 25 Overview BD ircuits ombinational Multiplier ircuit Design ase tudy: Bit Multiplier equential Multiplier ircuit R.H. Katz Lecture #2: -1 R.H. Katz Lecture #2: -2 BD Addition BD Number Representation Decimal digits thru 9 represented as thru 11 in binary BD Addition Adder Design A 3 B 3 A 2 B 2 A 1 B 1 A B Addition: 5 = 11 3 = 11 1 = 5 = 11 = = 13! roblem when digit sum exceeds 9 O I O I O I O A1 11XX I in olution: add 6 (11) if sum exceeds 9! A2 1X1X 5 = 11 = = = 1 3 in BD 9 = 11 7 = = in binary 6 = = 1 6 in BD O I O I out Add 11 to sum whenever it exceeds 11 (11XX or 1X1X) R.H. Katz Lecture #2: -3 R.H. Katz Lecture #2: - ombinational Multiplier Basic oncept multiplicand multiplier artial products * 111 (13) 111 (11) (13) product of 2 -bit numbers is an -bit number 7 ombinational Multiplier artial roduct Accumulation A3 B3 A3 B2 A2 B3 A3 B1 A2 B2 A1 B3 A3 B3 A3 B A2 B1 A1 B2 A B3 A2 B2 A2 B A1 B1 A B2 A1 B1 A1 B A B1 A B A B R.H. Katz Lecture #2: -5 R.H. Katz Lecture #2: -6

2 ombinational Multiplier artial roduct Accumulation ombinational Multiplier Another Representation of the ircuit A 3 B 3 A 3 B 2 A 2 B 3 A 3 B 1 A 2 B 2 A 1 B 3 A 3 B A 2 B 1 A 1 B 2 A B 3 A 2 B A 1 B 1 A B 2 A B 1 A 1 B A B um In X Building block: full adder + and Y out A B O I in um Out A3 A2 A1 A Note use of parallel carry-outs to form higher order sums 12 Adders, if full adders, this is 6 gates each = 72 gates gates form the partial products B B1 B2 B3 A3 B A2 B A1 B A B B1 B1 B1 A3 B1 A2 A1 A B2 B2 B2 A3 B2 A2 A1 A B3 B3 B3 A3 B3 A2 A1 A total = gates! R.H. Katz Lecture #2: x array of building blocks R.H. Katz Lecture #2: - TTL Multipliers A A 1 A 2 A 3 B B 1 B 2 B 3 2 A A 3 A 2 A 1 A Y 7 Y 6 Y 5 Y 9 1 B 3 B 2 B 1 B B 2 A A 3 A 2 A 1 A Y 3 Y 2 Y 1 Y B 3 B 2 B 1 B B 13 roblem Decomposition How to implement x multiply in terms of x multiplies? bit products A7- * B7- * A7- B7- A7- * B3- A3- * B7- A3- B3- A3- * B = = 1 = 2 = 3 Y 6 Y Y 2 Y Y 7 Y 5 Y 3 Y 1 Two chip implementation of x multipler 3- = 3-7- = = = arry-in + arry-in + arry-in R.H. Katz Lecture #2: -9 R.H. Katz Lecture #2: -1 A6 A A7 A5 B7 alculation of artial roducts B6 B5 B A2 A A3 A1 B7 B6 B5 B A6 A A7 A5 B2 B B3 B1 A2 A A3 A1 B2 B B3 B1 Three-At-A-Time Adder lever use of the arry Inputs um A[3-], B[3-], [3-]: x Multiplier 72/25 x Multiplier 72/25 x Multiplier 72/25 x Multiplier 72/25 A3 B3 A2 B2 A1 B1 A B Use x multipliers to create the partial products Two Level Adder ircuit Note: arry lookahead schemes also possible! R.H. Katz Lecture #2: -11 R.H. Katz Lecture #2: -12

3 + Three-At-A-Time Adder with TTL omponents Accumulation of artial roducts 3 B3 A3 2 B2 A2 1 B1 A1 B A B A B A 713 Adder 713 Adder B A B A 713 Adder 713 Adder Adders (2 per package) B A B A B A B A B A B A B A B A B3 A3 B2 A2 B1 A1 B A + -bit ALU/Adder 711 F3 F2 F1 F + tandard ALU configured as -bit cascaded adder (with internal carry lookahead) B3 A3 B2 A2 B1 A1 B A B3 A3 B2 A2 B1 A1 B A B3 A3 B2 A2 B1 A1 B A -bit 711 ALU/Adder -bit ALU/Adder 711 -bit ALU/Adder F3 F2 F1 F F3 F2 F1 F F3 F2 F1 F Just a case of cascaded three-at-a-time adders! Note the off-set in the outputs R.H. Katz Lecture #2: -13 R.H. Katz Lecture #2: -1 The omplete ystem (Actual TTL packages) A7- artial roduct alculation x 72, B7-3- ackage ount and erformance 72/725 pairs = packages 713, 3 711, = packages packages total artial product calculation (72/25) = ns typ, 6 ns max Intermediate sums (713) = 9 ns/2ns = 15 ns average, 33 ns max econd stage sums w/carry lookahead x x L11: carry and = 2 ns typ, 3 ns max : second level carries = 13 ns typ, 22 ns max L11: formations of sums = 15 ns typ, 26 ns max 13 ns typ, 171 ns max z +y +x R.H. Katz Lecture #2: -15 R.H. Katz Lecture #2: - equential Multiplier -Bit Multiplier Example: 3 x = 12 Four cycles to completion ycle Multiplier Multiplicand roduct Initialize 11 1 ycle, Multiplier[]= ycle 1, Multiplier[]= ycle 2, Multiplier[]= 1 11 ycle 3, Multiplier[]= 1 11 equential Multiplier Datapath and ontrol Block Diagram External load signals for Multiplier and Multiplicand Low order bit of multiplier: if, shift; if 1, shift and add Multiplicand Multiplier Load1 Digit Load2 hift lock tart Digit ontrol roduct = For i = to 3 do If Multiplier[] = 1 then roduct = roduct + Multiplicand hift right the Multiplier hift left the Multiplicand Accumulator roduct Load3 hift Load3 R.H. Katz Lecture #2: -17 R.H. Katz Lecture #2: -1

4 equential Multiplier tate Diagram One state for each bit Reset Idle tart tart/ R.H. Katz Lecture #2: -19 lk tate tart Load hift equential Multiplier ontrol Timing Behavior Idle Idle Digit Digit1 Digit2 Digit3 Digit Digit5 Digit6 Digit7 R.H. Katz Lecture #2: -2 equential Multiplier lightly Revised Block Diagram If multiplier low order bit is than assert into accumulator Else pass multiplicand through to accumulator implifies the control! Multiplicand ass or Zero Multiplier Load1 Digit Load2 ass/zero lock ontrol tart equential Multiplier Revised tate Diagram Reset Idle Fewer control outputs! tart/ tart 5 Accumulator roduct 6 7 R.H. Katz Lecture #2: -21 R.H. Katz Lecture #2: -22 equential Multiplier ymbolic/encoded tate Transition Table tate assignment chosen as follows:» Idle state set to, i.e., TART resets the state FFs» tates to 7 set to 1 to 1111, easy to implement as a counter urrent tate tart Next tate Idle Idle Idle Idle 1 Booth Multiplier earching for ways to speed up the basic multiply step Tricky encoding scheme to reduce the number of stages in a binary multiplier onsiders two bits at a time rather than one this cuts the number of multiplier steps in half Each step is slightly more complex compared to the simple multiplier, but is almost as fast as the basic multiplier stage that it replaces R.H. Katz Lecture #2: -23 R.H. Katz Lecture #2: -2

5 Alternative Multiply Hardware 32-bit Multiplicand reg, 32 -bit ALU, 6-bit roduct reg, (-bit Multiplier reg) Rather than shift multiplier right and multiplicand left, we can shift BOTH the product and the multiplier to the right Multiplicand 32 bits Multiply ontrol Multiplicand roduct 1 11 roduct = 1 tart 1. Test roduct 1a. Add multiplicand to the left half of product & place the result in the left half of roduct register roduct = 2. hift the roduct register right 1 bit. 32-bit ALU hift Right roduct (Multiplier) ontrol 6 bits Write R.H. Katz Lecture #2: nd repetition? No: < 32 repetitions Yes: 32 repetitions Done R.H. Katz Lecture #2: -26 Motivation for Booth s Algorithm Example 2 x 6 = 1 x 11: 1 x 11 + shift ( in multiplier) + 1 add (1 in multiplier) + 1 add (1 in multiplier) + shift ( in multiplier) 11 If ALU can subtract as well as add, get same result as follows: 6 = = = For example 1 x 11 shift ( in multiplier) 1 sub(first 1 in multiplier) shift (mid string of 1s) + 1 add (prior step had last 1) 11 Just add (twos complement of 2) R.H. Katz Lecture #2: -27 Booth Multiplier: an Introduction Recode each 1 in multiplier as +2-1 onverts sequences of 1 to 1 (-1) Might reduce the number of 1 s R.H. Katz Lecture #2: -2 Recoding (Encoding) Example Booth Multiplication Example () () () () () () If you use the last row in multiplication, you should get exactly the same result as using the first row (after all, they represent the same number!) 1 1 6x (-6) ign extension R.H. Katz Lecture #2: -29 R.H. Katz Lecture #2: -3

6 Booth s Algorithm: Implementation Approach end of run middle of run beginning of run urrent Bit Bit to the Right Explanation Example Op 1 Begins run of 1s 1111 sub 1 1 Middle of run of 1s 1111 none 1 End of run of 1s 1111 add Middle of run of s 1111 none Originally for peed (when shift is faster than add, it is advantageous to replace adds and subs with shifts) Basic idea: replace a string of 1s in multiplier with an initial subtract for rightmost 1 in a run of 1 s, then later add back a 1 for the bit to the left of the last 1 in the run R.H. Katz Lecture #2: -31 Booth s Example (2 x 7) Operation Multiplicand roduct next?. initial value > sub 1a. = - m shift (sign ext) 1b > nop, shift > nop, shift > add a shift b done R.H. Katz Lecture #2: -32 Booth s Example (2 x -3) Operation Multiplicand roduct next?. initial value > sub 1a. = - m shift (sign ext) 1b > add + 1 2a shift 2b > sub a shift 3b > nop a shift Lecture Review We have covered: BD Adders imple extension of binary adders Multipliers x multiplier: partial product accumulation extension to x case equential Multipliers Booth Multiply tep Recoding to speed up the calculation b done R.H. Katz Lecture #2: -33 R.H. Katz Lecture #2: -3

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