SILICON PHOTONICS FOR DATA COMMUNICATIONS

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SILICON PHOTONICS FOR DATA COMMUNICATIONS Gideon Yoffe Kaiam Corporation, California Visitor at ICT, KTH Kista Introduction Kaiam packaging technology Data

1 SILICON PHOTONICS FOR DATA COMMUNICATIONS Gideon Yoffe Kaiam Corporation, California Visitor at ICT, KTH Kista Introduction Kaiam packaging technology Data communication, Datacenters Silicon Photonics Two possible commercial applications Multi-wavelength transmitters Low-cost tunable lasers Conclusions ADOPT Winter School

2 KAIAM: Use Si MEMS to build complex optical assemblies 1. Build a PCB using a silicon MEMS breadboard simple low cost process, can be done at many foundries 2. Depending on the PIC, bond components on the PCB standard die bonding tools used for electronics 3. Micro machine optically connects the components micro lenses move to maximize coupling, micro heaters lock with solder quick process, cheap tools, tolerant of mechanical positioning errors and shifts 4. Standard packaging and testing follows 2 ADOPT Winter School 2014

3 Implementation of MEMS alignment Shunt driver PLC upside down on spacer Microlens MEMS bench Laser diode 3 ADOPT Winter School 2014

4 MEMS alignment 40Gb/s (4 x 10Gb/s) optical subassembly Shunt driver lens PLC (upside down on spacer) laser Note: MEMS details not shown for simplicity All parts assembled using conventional tools, then aligned with MEMS and locked ADOPT Winter School

5 Solder lock of MEMS structure 1) On chip heater melts solder ball 2) MEMS moves the lens into optimal position. Tab is somewhere in solder ball 3) Heater is turned off, locking part in position tab moves into solder ball AuSn solder buried Ni/Cr heater Air gap for thermal isolation ADOPT Winter School

6 Tolerance to die bonding error Lens adjustment compensates for initial non-optimal component placement 20um placement error ~< 0.6dB penalty MEMS design also demagnifies post-solder shift ADOPT Winter School

7 Advantages of Kaiam approach Leverages generally available single-function components No need to build complex monolithically integrated chips Much higher performance Discrete chips can be optimized for high performance. Better than monolithically integration, where material compromises must be made Very low development time and resources For each Photonic Integrated Circuit, only a new PCB is needed Very high yield Questionable parts can be tested / burned-in before assembly Don t have to reject the assembly because one part is bad Kaiam Corporation, ECOC 2012 WS09 7

8 Data use growing fast, but not revenue! Telecom Revenue growth is limited (GDP based) Exabytes per month Internet traffic growth is high (30-100% CAGR) Mobility Business Internet Business IP WAN Consumer Internet Consumer IPTV/CATV Source: Independent Analyst Research and Cisco Analysis; Cisco Visual Networking Index From Ori Gerstel, Cisco ADOPT Winter School

9 Datacenters Vast amount of data to/from datacenters servers per datacenter Need power, cooling Facebook set up in Luleå ADOPT Winter School

Many layers of switches required Server-to-switch links now moving from 1Gb/s to 10Gb/s

10 Datacenter Interconnects Need layers of switches between servers Far more data travels within a datacenter than to/from a datacenter A search might be sent to servers Many layers of switches required Server-to-switch links now moving from 1Gb/s to 10Gb/s Links between switches moving to 40Gb/s now, some to 100Gb/s ADOPT Winter School

first for long haul, now for shorter and shorter links Main cited application for silicon

11 Dreams for Integrated Silicon Photonics Si electronic circuits perform switching (logic) of signals Photonics is very appealing for, transport, routing of signals Fiber optics used first for long haul, now for shorter and shorter links Main cited application for silicon photonics is optical interconnect, chip-to-chip or on-chip DARPA IBM ADOPT Winter School

12 Near-term uses for Silicon Photonics As electronics moves to 25Gb/s I/O, optical transceivers on faceplate will suffer. Optics embedded on or very close to Si IC will be needed Power dissipation from III-V s would be a concern Clear opportunity here for Si photonics chip, maybe with remote light source For now, Si photonics chip likely to be separate from electronics ADOPT Winter School

13 Silicon Photonics Use CMOS line to make optical components, in silicon on insulator, 220nm thick Foundries like imec, IME, have processes well controlled Offer multi-project wafers;circuits generally perform as expected! Univ Delaware / Opsis /IME ADOPT Winter School

$Silicon Waveguide Very small optical mode, <0.5um Very high refractive index contrast Silicon n=3.46 SiO 2 n=1.$

14 Silicon Waveguide Very small optical mode, <0.5um Very high refractive index contrast Silicon n=3.46 SiO 2 n=1.46 Very tight bends, tiny circuits possible Output beam at facet very divergent, hard to couple Single-mode fiber 9um mode diameter High delta Silica waveguide 4um mode diameter ADOPT Winter School

15 Waveguide Couplers, Splitters Y-branch Directional coupler, tap Multi-mode interference (MMI) device 1X2 2X2 ADOPT Winter School

16 Ring Resonators Resonant coupling of light into a ring Can resonantly couple out into a second waveguide Imec drop B. Little MIT 1997 through ADOPT Winter School

17 AWG Arrayed Waveguide Gratings Integrated optics device in silica or other waveguides Used as mux or demux, channel spacing as low as 50GHz (0.4nm) waveguide array, different lengths output guides input guide free-space regions ADOPT Winter School

18 Silica, Silicon AWG Silica AWG Typically 20 X 30mm Silicon AWG 0.2 X 0.35mm NTT Bend radius for silica ~few mm Bend radius for silicon ~10um Problem for Silicon wavelength accuracy Thickness tolerance gives 10nm uncertainty ADOPT Winter School

Optical Coupling - Edge Direct attachment of single-mode fiber would give 20dB loss Need to expand optical mode Inverse taper, coupling to waveguide with effective index ~

19 Optical Coupling - Edge Direct attachment of single-mode fiber would give 20dB loss Need to expand optical mode Inverse taper, coupling to waveguide with effective index ~ 1.6, often polymer Obtain 2-3um spot size, <1dB loss to lensed fiber or via a lens to SMF similar to coupling a laser diode to fiber U Gent IBM ADOPT Winter School

20 CMOS compatible edge coupler Some labs insist on only using CMOS processes no polymer Can get good results with inverse taper alone, etched facet to control position of tip. But what does CMOS compatible really mean? ADOPT Winter School

Optical Coupling - Grating Grating couplers couple light out of a waveguide, into a fiber Generally 10 degrees off vertical to break backward-forward symmetry and to minimize

21 Optical Coupling - Grating Grating couplers couple light out of a waveguide, into a fiber Generally 10 degrees off vertical to break backward-forward symmetry and to minimize back-reflections Waveguide tapers out to 10um width to match single-mode fiber Basic grating coupler gives about 25-30% coupling efficiency to fiber ADOPT Winter School

overlay to break up-down symmetry Apodize, vary grating duty-cycle, to try to

22 Advanced Grating Couplers With added complexity, still CMOS compatible, can achieve up to 70% coupling at peak, fairly broad spectrum Add poly-silicon overlay to break up-down symmetry Apodize, vary grating duty-cycle, to try to match output beam profile to fiber mode U Gent / Imec Luxtera ADOPT Winter School

23 Choice, Grating vs Edge Coupler? Parameter Grating Edge Choice Coupling 1.5dB loss to SMF 1dB to lensed fiber Edge efficiency Optical Bandwidth Back Reflections Convenience Typically 60nm 3dB, higher to smaller spot. ~2%, very hard to eliminate. May require isolator. Place coupler anywhere on chip. Full-wafer testing. >100nm Edge <0.1% with good design Edge At edge only. Dicing and extra steps required. Grating CMOS compatibility Standard process throughout Non-standard steps required. Breaks metal guard ring. Grating Package cost /complexity Low-cost custom component to turn beam. Large/selected spot size for easy alignment. Standard geometry. Smaller spotsize requires more precise alignment. Tie ADOPT Winter School

24 Active Devices: Refractive index Change Index change through free-carriers, plasma effect, known since 1987 n can be for doping 1E18/cm^3, but depletion region width small compared to waveguide so effect on mode is small very weak effect for micron-scale waveguides Holes give bigger effect than electrons, with lower loss Some accompanying free-carrier absorption ADOPT Winter School

25 Carrier density change: reverse biased pn diode Change depletion region size in pn diode For given reverse bias V, doping density N, very roughly: Depletion region width ~ 1/ N No. of carriers moved, modal index change ~ N Length for pi phase shift ~ 1/ N Capacitance/unit length ~ N Absorption/unit length ~N Higher N gives: Shorter modulator for pi phase shift Little change in capacitance Higher absorption loss Tradeoff length for loss through doping, little effect on speed Depletion region at pn junction, due to drift/diffusion ~0.4um ADOPT Winter School

26 Silicon Modulators - Ring Shift transmission resonance by applied signal Very compact, fast Very temperature-sensitive, 0.07nm/deg C Need active tuning Not suitable for low-cost uncooled applications Sun/ Kotura ADOPT Winter School

$Silicon Mach-Zehnder Modulators Amplitude modulation through refractive index$ Not too sensitive to temperature Doesn t need active tuning Better suited to

Not too sensitive to temperature Doesn t need active tuning Better suited to

27 Silicon Mach-Zehnder Modulators Amplitude modulation through refractive index change in one path of an interferometer Operates over wide wavelength range Not too sensitive to temperature Doesn t need active tuning Better suited to communications, but bigger than ring resonator From IMEC ADOPT Winter School

28 Depletion width, Capacitance vs Voltage Index change ~N (doping level), depletion width ~1/sqrt(N) Higher doping gives bigger modal index change, phase shift, but higher capacitance Note depletion region, where action takes place, ~0.1um wide Capacitance, Depletion Width vs Voltage 3mm long, doping level 1E18/cm^ Junction capacitance, pf capacitance IMEC data depletion w idth Depletion region width, um From S. Sze, Semiconductor Devices Reverse bias (Volts) ADOPT Winter School

29 Phase shift vs Voltage Calculate change of mode effective index with voltage, through overlap of changing depletion region width Calculate phase shift Phase Shift, Capacitance vs Voltage 1.5mm long, doping 1E18/cm^ Phase shift (radians) Phase shift Capacitance Capacitance (pf) Vpi = 9.7V Vpi.L = 14.5V.mm Capacitance at 0V = 0.7pF Simulations, data agree, despite simple 1-D model Reverse bias (Volts) ADOPT Winter School

30 Mach-Zehnder Modulator Operation The available refractive index change in silicon is fairly small, so modulation is not very efficient. Vπ.L product around 26V.mm for good high-speed devices With 3mm long device, push-pull, can get decent extinction ratio with 2-3V swing MZM output, Vpi.L=26Vmm, L=3mm, push-pull Output intensity Vp-p V ADOPT Winter School

Modulator Performance With lumped electrodes, speed limited to about 10Gb/s for good extinction ratio direct tradeoff of phase shift and capacitance with doping Traveling-wave electrodes get past RC

31 Modulator Performance With lumped electrodes, speed limited to about 10Gb/s for good extinction ratio direct tradeoff of phase shift and capacitance with doping Traveling-wave electrodes get past RC limitations, used for all 25Gb/s applications But electrode characteristic impedance typically ~30 ohms, due to capacitance On-chip modulator insertion loss typically ~5dB Mostly due to P/N doping in phase-shifters All published data has been at 1550nm. IMEC, Opsis/IME, now starting 1310nm From IMEC modulator multi-project wafer run announcement. ADOPT Winter School

Integrated Light Source for Silicon Silicon diodes do not emit light, unlike GaAs, InP No easy integrated light source Some hero experiments showing light emission without

32 Integrated Light Source for Silicon Silicon diodes do not emit light, unlike GaAs, InP No easy integrated light source Some hero experiments showing light emission without III-V: Porous silicon, 1990 s Strained Ge, GeSn, on Si Thulium Silicates optically-pumped lasing of strained Ge on Si MIT, Gp IV Photonics Meeting 2012 ADOPT Winter School

40 deg/w for 800um laser active Yield questions Epitaxial InP on Silicon

33 Hybrid-Integrated Light Source Wafer bonding passive UCSB, Intel Inefficient laser, poor confinement in gain region Thermal problems SiO2 40 deg/w for 800um laser active Yield questions Epitaxial InP on Silicon S. Lourdudoss, KTH Very appealing Looks very difficult ADOPT Winter School

34 Caveats on Silicon Photonics Not cheap just because it s silicon Expensive mask set, process, don t have volume Performance of devices is mediocre Losses higher than SiO2, InP Electro-optic effects weaker than in InP, simpler physics Detector (Ge) efficiency 0.5 to 0.7A/W, while InGaAs is close to 1A/W No easy light source Optical coupling is difficult Real benefits expected when integrated with electronic circuitry But generally photonics not made on same CMOS line as top-end electronics Beware power consumption/heating ADOPT Winter School

Application 1: 4 wavelength transmitter design exercise 10Gb/s datacenter links moving to 40Gb/s, QSFP package, 4 lanes at 10Gb/s each Short reach using 850nm VCSEL s, 4 parallel multimode fibers, up

35 Application 1: 4 wavelength transmitter design exercise 10Gb/s datacenter links moving to 40Gb/s, QSFP package, 4 lanes at 10Gb/s each Short reach using 850nm VCSEL s, 4 parallel multimode fibers, up to 100~300m For longer reach use 4 wavelengths multiplexed onto single-mode fiber Use directly-modulated semiconductor lasers, uncooled to save power Standard is 20nm channel spacing: 1270, 1290, 1310, 1330nm. Existing Kaiam 4X10Gb/s optical sub-assembly for QSFP transceiver for 10km link Shunt driver lens PLC (upside down on spacer) laser Note: MEMS details not shown for simplicity ADOPT Winter School

36 4 channel eyes from QSFP TOSA ADOPT Winter School

Luxtera Silicon short-reach version Single laser diode as light source, split between 4 modulators Silicon photonics integrated with drivers nice for distributed travelling wave drive Sold in Active

37 Luxtera Silicon short-reach version Single laser diode as light source, split between 4 modulators Silicon photonics integrated with drivers nice for distributed travelling wave drive Sold in Active Optical Cable, short links, 4 single-mode optical fibers, 10Gb/s each. Maybe cheap in volume for short distance, but ribbon fiber, termination expensive Customers often prefer connectorized transceivers. ADOPT Winter School

38 Silicon for Next-Gen 100Gb/s Now we need to plan for 4X25Gb/s, for 100Gb/s link. Strong preference for uncooled operation to save electric power Not clear that directly modulated semiconductor lasers can give 25Gb/s at high T Interest in using Silicon Photonics to generate the 25Gb/s signals Modulators + Multiplexer, tap waveguides to monitor laser power How good a chip can we make in a multi-project wafer run, e.g. at IMEC? CW Lasers det Mod Si Chip Mod det det Mod Mux Output fiber Mod det ADOPT Winter School

L=26Vmm, L=3mm, push-pull 0.18 0.16 0.14 quadrature 0.12 0.1 0.08 0.06 0.04 0.

39 Modulators with MMI splitters Layout in Fimmprop apply index modulation Output intensity pi/2 modulation: output high MZM output, Vpi.L=26Vmm, L=3mm, push-pull quadrature V zero modulation: quadrature -pi/2 modulation: output low ADOPT Winter School

40 Estimated Loss Budget Estimate losses from foundry guidance, to see how much laser power we need We want about 0dBm, or 1mW average power per wavelength in the output fiber For the current design, we need laser power 27dBm,=500mW!!! Totally impractical. Need to be able to run off 30mW lasers, maximum Output grating coupler is a big contributor because of 60+nm wavelength range Good edge couplers will save up to 8dB, but we still need more savings elsewhere. Item Loss db Comments Grating coupler specified 2.5dB loss to SMF;additional loss transforming laser mode to Input coupler 4 SMF. Use edge coupler when available MZM insertion loss 5 Mostly due to doping of phase shifters For low voltage operation will need to bias with MZM modulation loss 4 some loss at "1" level Passive waveguide loss 1 Loss is 1.5 to 2.5dB/cm in undoped waveguide Mux loss 4 AWG Taps 1 Taps on input guides to monitor optical power Output coupler 8 Limited bandwidth of grating. Want edge coupler! Total losses 27 ADOPT Winter School

41 Feasibility of Si Photonics Well-characterized building blocks through most of the design Modulators should give about 15GHz bandwidth, able to achieve 6dB extinction ratio Uncertainty of precise silicon thickness leads to wavelength uncertainty Multiplexer, grating wavelengths can easily be wrong by up to 10nm Losses will be quite high, over 20dB from laser chip to output fiber Would need an optical amplifier in order to measure eye diagrams Chip would not be good enough to make a product Could be used for lab demonstrations and investigations of silicon photonics Performance is always improving as the foundries tune their processes and designs Maybe the concept can be practical in 2-3 years. ADOPT Winter School

42 Example 2: Tunable laser for WDM fiber-to-the-home Bandwidth demand in the last mile is pushing interest in WDM fiber-to-the-home Many architectures use tunable transceiver at end user Requires very low-cost tunable laser Central Office TX/RX 1 TX/RX 2 TX/RX 3 TX/RX 4 TX/RX 5 Homes, Labs, Companies TX/RX 32 ADOPT Winter School

43 Commercial Tunable Lasers Syntune Integrated devices dominate in compact tunable transmitter market Complex, large InP chips too expensive JDSU ADOPT Winter School

Kaiam performed proof-of-concept demonstration, reported at OFC 2012.

44 Kaiam Tunable Laser Exploit silicon photonics: integrate tunable filter function into silicon Couple to external InP gain chip Package can be very compact, cheap Kaiam performed proof-of-concept demonstration, reported at OFC Silicon PLC prism lens InP gain chip Proposed TO-style package ADOPT Winter School

45 PLC tunable reflectors Vernier tuning of two sets of reflection peaks Silicon tuning ~ 0.07nm per deg C Thermally tuned micro-ring resonators, diameter ~50um PLC reflector with micro ring resonators heaters gain chip grating coupler Vernier tuning with ring resonators intensity wavelength Ring 1 Ring 2 ADOPT Winter School

5um Near-normal incidence grating couplers for 70% coupling Kaiam, OFC 2012 grating coupler

46 Custom PLC s in Sub-Micron SOI PLC s, 900X300um, were fabricated to our design on 193nm 8-inch CMOS line SOI 0.25um thick, waveguide width ~0.5um Near-normal incidence grating couplers for 70% coupling Kaiam, OFC 2012 grating coupler heater electrodes 1. Rings in loop configuration 2. Rings in series, Bragg mirror for return path Bragg grating ADOPT Winter School

47 Tunable Reflection spectra Measured using broadband SLD source and a fiber-optic circulator Envelope of spectrum corresponds to grating coupler and SLD, each 40-50nm FWHM 7 Thermally tuned reflection spectra Heat applied to one ring only Reflected power (a.u.) mw 5mw 11mw 18mw Wavelength (nm) ADOPT Winter School

48 Lasing Results 1. Spectra Lab bench external-cavity laser using ring-resonator PLC coupled via lens to AR/cleaved gain chip (Alphion) db Wavelength (nm) ADOPT Winter School

49 Lasing Results 2. Fine tuning Align two rings by heating one, then apply heat to both to tune the whole spectrum Lasing mode stays on aligned peaks Fine tuning Wavelength shift (nm) Thermal tuning power (mw) ADOPT Winter School

50 Lasing Results 3. L-I Rings tuned for efficient lasing on one peak Achieve desired 5mW facet power Output power Output power (mw) SOA current (ma) ADOPT Winter School

51 Lasing Results 4. Modulation Directly modulate gain chip with square-wave Rise/fall times ps, adequate for 1.25Gb/s Speed limited by gain chip design intended for DC drive ADOPT Winter School

52 Path Forward Efficiency can be improved by optimization of gain chip for application: Threshold - MQW BH vs wide ridge with bulk active Slope efficiency - Low-reflectance front facet vs as-cleaved Improvements also from optimization of PLC, coupling Simulated Efficiency Improvements Power (mw) present Optimize gain chip only Improve PLC also Current (ma) ADOPT Winter School

53 Conclusions Silicon photonics offer possible path to low-cost optical data links Many functions available modulators, detectors, filters, multiplexers Chips are made in well-characterized CMOS fabs, so they generally behave as expected Light source needs to be in another material Challenges optical coupling, high loss Commercial possibilities for datacenter interconnect and fiber-to-thehome Not easy, even if it is Silicon! ADOPT Winter School

Lecture: Integration of silicon photonics with electronics. Prepared by Jean-Marc FEDELI CEA-LETI

Lecture: Integration of silicon photonics with electronics Prepared by Jean-Marc FEDELI CEA-LETI Context The goal is to give optical functionalities to electronics integrated circuit (EIC) The objectives