Measurement of Voltage Flicker and Implementation Using FPGA

Transcription

1 7th WEA Int. Conf. on INUMENAION, MEAUEMEN,CICUI and YEM (IMCA '08), Hangzhou, China, April 6-8, 008 Measurement of Voltage Flicker and Implementation Using FPGA HU-CHEN WANG YU-JEN CHEN CHI-JUI WU Department of Computer Chung-han Institute of Department of and Communication Engineering cience and echnology Electrical Engineering aipei College of Armaments Bureau National aiwan University Maritime echnology MND of cience and echnology aipei, AIWAN ao-yuan, AIWAN aipei, AIWAN Abstract: - his paper proposes a field-programmable gate array (FPGA)-based integrated circuit (IC) for measuring voltage flicker using the instantaneous voltage vectors. he proposed design scheme is developed using the very high speed integrated-circuit hardware description language (VHDL). he instantaneous voltage vector module, management module, and quantification modules are developed to construct the entire system. ome novel IP (intellectual property) cores, such as CODIC and FF, are used. hen the chip for voltage flicker calculation is designed based on these IP cores and is realized using a signal FPGA (XC31500). ome given simulation waveforms and field-measured waveforms with voltage flicker disturbances are adopted to demonstrate that the designed IC can obtain flicker components precisely. Key-Words: - Electric power quality, Voltage flicker, Field programmable gate array, Instantaneous voltage vector, Fast Fourier transform, FPGA 1 Introduction Voltage flicker means the fluctuations in the envelope of the 50/60 Hz supply voltage that is frequently caused by heavy fluctuating loads [1], [], [3]. everal definitions and calculation methods had been proposed and developed [4], [5], [6]. he P is the IEC standard and was established by the Union for Electroheat (UIE). he Central esearch Institute of the Electric Power Industry (CIEPI) of Japan proposed using the V 10 as the standard for assessing voltage flicker. he aiwan Power Company (PC) also uses V10, and then it is considered in this study. Numerous reports have established that a small voltage flicker, ranging from 0.3% to 0.5% in the frequency range of 6-10 Hz could cause visible incandescent flickering and human discomfort [7], [8], [9], [10]. he FPGA has been applied to analyzing and controlling a power system [11], [1], [13]. While conventional designs are based on functions, FPGA is based on the reuse of IP or the function assembly. When a large system is constructed from a number of macro-modules, IP cores can be used to represent those modules. everal particular functional IP cores such as CODIC and FF cores could be developed. VHDL was also employed to model a digital control system at many levels [14]. VHDL can be considered as a combination of sequential, concurrent, netlist, st timing specification, and waveform generation languages. he same algorithm can be synthesized into any other FPGA. his investigation develops an FPGA-based control IC for computing the voltage flicker. he voltage waveforms of three phases are sampled at a specified sampling frequency and stored in a OM. he instantaneous voltage vector module is adopted to determine the real and imaginary magnitudes of the instantaneous voltage vectors. A 104-point FF core is applied to obtain the real and imaginary magnitudes of the voltage flicker components. Finally, the flicker magnitudes are calculated using the quantification module. he study results show that the proposed method gives a precise three-voltage calculation scheme. Fig. 1. Flicker sensitivity coefficient curve. IBN: IN:

2 7th WEA Int. Conf. on INUMENAION, MEAUEMEN,CICUI and YEM (IMCA '08), Hangzhou, China, April 6-8, 008 Voltage Flicker Let V denote the degree of difference between the maximum and minimum amplitude at the modulation frequency f for a voltage waveform with the M value V rms n. Consequently, the flicker component is 1 v f ( t) V cos( f nt) Vrms cos( f syst) (1) he total voltage waveform with several flicker components can be expressed as 1 ( t) Vrms 1 V cos( f nt) cos( f syst) () n he voltage fluctuation is defined as 30 ( V ) (3) 0.5 V Moreover, the 10-Hz equivalent voltage flicker value is defined as, Where a (4) V 10 ( a V ) denotes the flicker sensitivity coefficient corresponding to the modulation frequency f n component. Fig. 1 plots the distribution curve of the sensitivity coefficients, which snows the sensitivity of the human eye-brain system to illumination flicker. he frequency to which it is most sensitive is 10 Hz, at which the visual sensitivity coefficient is one. In the PC, the limit of V 10 is set as 0.45%. 3 Instantaneous Voltage Vector Method For a three-phase circuit, the magnitude of the instantaneous voltage vector is defined as In order to explain the method to obtain voltage flicker components from the instantaneous voltage vectors, let phase- have a single voltage flicker component and the other two phases be purely sinusoidal. 1 ( t) Vrms 1 V cos( f nt) cos( f syst) (8) ( t) Vrms cos( f syst ) (9) 3 ( t) Vrms cos( f syst ) (10) 3 hen, the magnitude of instantaneous voltage vector is given by j( f syst ) j ( f syst ) 3 3 j( f syst ) j ( f syst ) 3 3 jf syst j f syst 1 e e 1 V cos( f nt) ( ) Vrms e e -1 3 vi ( t) [ ]( +j ) 3 It can be obtained that e e -1 3 [ ]( -j ) (11) 1 V 1 V vi ( t) V rms[1 cos( f nt) cos( f nt)cos( f syst)] 3 3 (1) he second contains the useful information to obtain the corresponding flicker component i ( t) [ ( t) ( t)( j ) ( t)( j )] 3 (5) Where v, v and v are instantaneous voltages of the corresponding phases. he real and imaginary magnitudes of the instantaneous voltage vector are respectively given by 1 1 e( i ( t)) [ ( t) ( t) ( t)] (6) 3 1 Im( i ( t)) [ ( t) ( t)] (7) 6 Fig.. Functional module diagram of the designed IC. IBN: IN:

3 7th WEA Int. Conf. on INUMENAION, MEAUEMEN,CICUI and YEM (IMCA '08), Hangzhou, China, April 6-8, 008 Fig. 3. CODIC core structure. Fig. 4. tructure diagram of radix-4 FF core. 4 Design of FPGA-Based Calculation IC A floating-point arithmetic method has the advantage of a wide dynamic range, but its hardware realization is very complicated. A fixed-point arithmetic scheme is a more practical solution to most industrial applications with simple circuit realization. In this study, numerical variables and parameters must be transformed into approximate integers with finite word lengths. Fig. illustrates the functional module diagram of the designed three-phase voltage flicker calculation IC. he three-phase voltage waveforms are sampled with a specified sampling frequency and transformed to digital data, which act as the data source of the instantaneous voltage vector module. A. Management module his module is a task scheduler to generate an internal clock and to coordinate works of each module, such as giving corresponding data to each block in a definite order, and recording the sequential operation events. B. Instantaneous voltage vector module Fig. 3 illustrates the CODIC structure. From (6) and (7), the real and imaginary part of the instantaneous voltage vector are determined. he powers of 1 are implemented using the shifter. he 3 and 1 6 are implemented using the generalized coordinated rotational digital computer (CODIC) algorithm [15], [16]. C. FF module he Fast Fourier ransform (FF) is a computationally efficient algorithm for deriving the Discrete Fourier ransform (DF). he FF core developed by Xilinx can compute an N-point forward DF or inverse DF (IDF) where N= m, m 4 ~ 14. he FF core applies the Cooley-ukey decimation-in-time (DI) algorithm to determine the DF. Fig. 4 illustrates the structure of a radix-4 FF. When using radix-4, the FF consists of log 4 ( N ) stages, with each stage including N 4 radix-4 butterflies. his core can simultaneously perform transform computations on the current data frame, load the input data for the next data frame, and unload the results of the previous frame of data. All memory is on-chip using either block AM or distributed AM. he radix point DIF method was adopted to process -channel data. From the results of FF, the nd to 30 th flicker components can be obtained. D. Quantification module he FF module outputs 16-bit frequency domain data samples where both the real and imaginary components are fed into this module that picks out the complex pair corresponding to a target frequency. he square root operation is also implemented using the simplified CODIC algorithm. he flicker components are then computed. IBN: IN:

4 7th WEA Int. Conf. on INUMENAION, MEAUEMEN,CICUI and YEM (IMCA '08), Hangzhou, China, April 6-8, 008 able 1. Calculation esults o 1 Given Cases CAE 1 CAE CAE 3 CAE 4 CAE 5 CAE 6 CAE 7 CAE 8 CAE 9 CAE 10 CAE 11 CAE 1 Given flicker components (pu/hz) V,0.1/10 v : 0.15/5,0.1/10 v : 0.1/15 v : 0./10 v : 0./15 Calculated flicker components (pu/hz) Matlab V FPGA / / / / / / / / / / / / /10 0.1/ / / / / / / / / / / /15 5 Given Waveform est he synthesis tool, IE 6., was adopted to map these designed codes directly onto FPGA. A design implementation software application, Modelsim, was utilized to obtain results. he logic and timing simulation softwares are (especially O particularly) important for the design of complicated digital circuits to resolve problems during the early design stage. he Xilinx s XC31500 was applied to implement this design. able 1 lists 1 given cases in which the equivalent three-phase voltage flicker values are calculated using Matlab and FPGA methods. he flicker components obtained from FPGA are approximately equal to those obtained from Matlab. It can be observed from able 1 that if only one phase has a flicker component, the equivalent three-phase flicker will be 1/3 of the given value. And if two phases have the same flicker component, the equivalent flicker will be /3 of the given value. Only when all three phases have the same flicker component, the equivalent flicker will be the same value. able displays the chip resource usage. 6 Experimental est esults he three-phase measurement data from the 161-kV feeder of an 8-MVA DC arc furnace was adopted to confirm the design of the above methods to practical cases he sampling rate is 3 samples per power cycle. able 3 presents the equivalent three-phase voltage flicker calculation results of the measurement data. he major flicker components of this arc furnace locate at lower frequencies. he calculation results of flicker components using FPGA are approximately equal to these using Matlab. able. Device Utilization of XC31500 Used Availa Usage ble ratio 33% ilices Flip Flops % 4 Input LUs % Iuput/Output Blocks % (IOB) BAMs % MUL18x18s % GCLKs 1 8 1% able 3. hree-phase Voltage Flicker Calculation esult of DC Furnace Measurement Data Calculation Method Matlab FPGA V (p V (pu) IBN: IN:

5 7th WEA Int. Conf. on INUMENAION, MEAUEMEN,CICUI and YEM (IMCA '08), Hangzhou, China, April 6-8, Conclusion An FPGA-based calculation IC has been used for obtaining the equivalent three-phase voltage flicker values using the instantaneous voltage vectors. he design scheme has advantages of concurrent operation, small hardware requirement, and easy and fast circuit modification. Adopting VHDL provides sufficient flexibility and speed to construct the design circuits by some IP cores. All modules were designed and integrated to others. he major benefit of the proposed approach is that it executes all logics continuously and simultaneously. he simulated and experimental results confirm that the instantaneous voltage vectors are effective to obtain the three-phase voltage flicker values. he designed FPGA-based system can calculate precise flicker components. he developed scheme in this paper is a favorable choice for power quality calculation. eferences: [1].C. Dugan, M.F. McGranaghan, and H. W. Beaty, Electrical Power ystems Quality, McGraw-Hill, International Editions, New York, UA, 000. [] P. Ashmole and P. Amante, ystem Flicker Disturbances from Industrial Loads and heir Compensation, IEEE on Power Engineering, Vol. 11, No. 5, 1997, pp [3] C. M. Fallon and B. A. McDermott, Development and esting of a real-time Voltage Flicker meter, Proceeding of the IEEE ransmission and Distribution Conference, Vol. 10, 1996, pp [4] C. J. Wu and. H. Fu, Effective voltage flicker calculation algorithm using indirect demodulation method, IEE Proceedings-Generation, ransmission and Distribution, Vol. 150, No. 4, 003, pp [5] A. Nabae and. anaka, A New Definition of instantaneous Active-eactive Current and Power Based on Instantaneous pace Vectors on Polar Coordinates in hree-phase Circuits, IEEE rans. on Power Delivery, Vol. 11, No. 3, 1996, pp [6] C. J. Wu, and Yu-Jen Chen, A Novel Algorithm for Precise Voltage Flicker Calculation by Using Instantaneous Voltage Vector, IEEE ransactions Power Delivery, Vol.1, No. 3, 006, pp [7] G. C. Montanari, M. Loggini, A. Cavallini, L. Pitti, and D. Zaninelli, Arc-Furnace Model for he tudy of Flicker Compensation in Electrical Network, IEEE ransactions on Power Delivery, Vol. 9, No. 4, 1994, pp [8]. Varadan, E. B. Makram, and A. A. Girgis, A New ime Domain Voltage ource Model for An Arc Furnace Using EMP, IEEE ransactions on Power Delivery, Vol. 11, No. 3, 1996, pp [9] J. C. Gu, C. J. Wu, and J. C. Chiang, Effects of High Voltage ide Voltage Flicker ources on Low Voltage ide Customers, Power esearch Institute, aiwan Power Company, aiwan,.o.c., [10] J. Wu and L. H. Lee, Electric Power Quality Evaluation of 161 kv Large ize teel Plants, Power esearch Institute, aiwan Power Company, aiwan,.o.c., [11] J. H. Anderson and F. N. Najm, Active Leakage Power Optimization for FPGAs, IEEE ransactions on Computer-Aided Design of Integrated Circuits and ystems, Vol. 5, No. 3, 006, pp [1] Li, Y. Lin, L. He, D. Chen, and J. Cong, Power Modeling and Characteristics of Field Programmable Gate Arrays, IEEE ransaction on Computer-Aided Design of Integrated Circuits and ystems, Vol. 4, No. 11, 005, pp [13]. L. Jung, M. Y. Chang, J. Y. Jyang, L. C. Yeh, and Y. Y. zou, Design and Implementation of an FPGA-Based Control IC for AC-Voltage egulation, IEEE ransactions on Power Electronics, Vol. 14, No. 3, 1999, pp [14]. Hauck, he oles of FPGAs in eprogrammable ystems, IEEE Proceeding, Vol. 86, No. 4, 1998, pp [15] J. Volder, he CODIC rigonometric Computing echnique, IE transactions Electronic computing, Vol. EC-8, 1959, pp [16] J.. Walther, A unified Algorithm for Elementary Functions, Proceeding of the pring Joint Computer Conference, 1971, pp IBN: IN: