TLE Overview. LIN Transceiver with integrated Voltage Regulator

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1 LIN Transceiver wih inegraed Volage Regulaor 1 Overview Feaures Single-wire LIN ransceiver for ransmission raes up o 20 kbi/s Complian o ISO , LIN specificaion 2.2A and SAE J V or 3.3 V Low Drop-Ou Linear Volage Regulaor wih 70 ma curren capabiliy Sable wih ceramic oupu capacior of 1 µf Ulra low curren consumpion in Sleep Mode of max. 16µA Ulra low curren consumpion in Sandby Mode: ypical 20 µa Very low leakage curren on he BUS pin undervolage deecion wih RESET oupu TxD proeced wih dominan ime-ou funcion and sae check afer mode change o Normal Operaion Mode Iniializaion wachdog wih auomaic ransiion o Sleep Mode BUS shor o V BAT proecion and BUS shor o GND handling Over-emperaure proecion and supply undervolage deecion Very high ESD robusness; ±8kV according o IEC Opimized for high Elecromagneic Compaibiliy (EMC); Very low emission and high immuniy o inerference Available in sandard PG-DSO-8 and leadless PG-TSON-8 packages PG-TSON-8 package suppors Auomaed Opical Inspecion (AOI) Green Produc (RoHS complian) AEC Qualified Applicaions LIN slave saellie modules Window lifers Rain/ligh sensors Sun roof conrol modules Wiper modules Ambien lighing Daa Shee 1 Rev

2 LIN Transceiver wih inegraed Volage Regulaor Overview Descripion The TLE8457 is a monolihic inegraed LIN ransceiver and Low Drop-Ou volage regulaor. The device is designed o supply a microconroller and peripherals wih up o 70mA, provide proecion hrough undervolage rese, while also offering bi-direcional bus communicaion complian o LIN Specificaion 2.2A and SAE J2602. Wih he ulra low quiescen curren consumpion of ypical 20 µa in Sandby Mode he TLE8457 is especially suied for applicaions ha are permanenly supplied by he baery. Based on he Infineon BiCMOS echnology he TLE8457 provides excellen ESD robusness ogeher wih a very high level of elecromagneic compaibiliy (EMC). The TLE8457 is AEC qualified and ailored o wihsand he harsh condiions of he auomoive environmen. Type LDO Oupu Volage Package Marking TLE8457ASJ 5 V PG-DSO A TLE8457ALE 5 V PG-TSON A TLE8457BSJ 3.3 V PG-DSO B TLE8457BLE 3.3 V PG-TSON B Daa Shee 2 Rev. 1.0

3 LIN Transceiver wih inegraed Volage Regulaor Table of Conens 1 Overview Table of Conens Block Diagram Pin Configuraion Pin Assignmen Pin Definiions and Funcions Funcional Descripion Operaing Modes Normal Operaion Mode Sandby Mode Ini Mode Sleep Mode Bus Wake-up even Mode Transiion via EN pin Power Supplies Power-Up / Power-Down V S Undervolage Deecion Volage Regulaor VCC Undervolage Deecion Rese Oupu Iniializaion Wachdog LIN Transceiver TxD Time-ou Shor Circui Over-emperaure Proecion General Produc Characerisics Absolue Maximum Raings Funcional Range Thermal Characerisics Elecrical Characerisics Funcional Device Characerisics Diagrams Applicaion Informaion Applicaion Example ESD Robusness according o IEC Transien Robusness according o ISO LIN Physical Layer Compaibiliy Package Oulines Revision Hisory Daa Shee 3 Rev. 1.0

4 LIN Transceiver wih inegraed Volage Regulaor Block Diagram 2 Block Diagram Linear Regulaor 8 Bandgap Reference Driver Curren Limiaion Conrol Undervolage Deecion V S 1 R NRST 7 NRST Supply Monior R slave Wake Receiver Conrol 2 EN Over-Temperaure and Over-Curren Proecion R EN BUS 4 Transmier Driver Time-Ou R TxD 6 TxD GND 3 Receiver BUS V S / 2 RF- Filer 5 RxD TLE8457_BLOCK_DIAGRAM Figure 1 Block diagram Daa Shee 4 Rev. 1.0

5 LIN Transceiver wih inegraed Volage Regulaor Pin Configuraion 3 Pin Configuraion 3.1 Pin Assignmen V S 1 8 V S 1 8 EN GND NRST TxD EN GND BUS 2 7 (PAD) NRST TxD RxD BUS 4 5 RxD PG-TSON-8 PG-DSO-8 (Top side X-Ray view) TLE8457_PINNING Figure 2 Pin configuraion 3.2 Pin Definiions and Funcions Pin Symbol Funcion 1 V S Baery Supply Volage; Decoupling capacior required 2 EN Enable Inpu; Inegraed pull-down resisor Logical high o selec Normal Operaion Mode 3 GND Ground 4 BUS BUS Inpu / Oupu; Inegraed LIN Slave Terminaion 5 RxD Receive Daa Oupu; Moniors he LIN bus signal in Normal Operaion Mode Indicaes a wake-up even in Ini Mode 6 TxD Transmi Daa Inpu; Inegraed pull-up resisor Logical low o drive a dominan signal on he LIN bus 7 NRST Undervolage Rese Oupu; Inegraed pull-up resisor Logical low during Rese 8 Volage Regulaor Oupu; Oupu capacior requiremens specified in Funcional Device Characerisics PAD Connec o PCB hea sink area. Do no connec o oher poenial han GND Daa Shee 5 Rev. 1.0

6 LIN Transceiver wih inegraed Volage Regulaor Funcional Descripion 4 Funcional Descripion 4.1 Operaing Modes The operaion mode of he TLE8457 is conrolled wih he EN and TxD inpu pins (see Figure 3 and Table 2). The TLE8457 has 3 major operaion modes: Normal Operaion Mode Sandby Mode Sleep Mode Addiionally he TLE8457 has an Ini Mode ha is auomaically enered when powering up, deecing wakeup evens or in case of malfuncions. EN WHILE TxD = high Sandby Mode LIN ransceiver: Off LDO regulaor: On EN: Low NRST: High 9 10 EN Normal Operaion Mode LIN ransceiver: On LDO regulaor: On EN: High NRST: High EN BUS Wake-up undervolage undervolage Ini Mode LIN ransceiver: Off LDO regulaor: On EN: Low RxD: Wake-up source 1) NRST: High 2) EN AND TxD Power-up 1 7 BUS Wake-up EN BUS Wake-up Recovery from overemperaure even on volage regulaor Iniializaion Wachdog 6 Sleep Mode LIN ransceiver: Off LDO regulaor: Off EN: Low NRST: Low 1) Wake-up Source: RxD: logical high afer Power-up or Rese RxD: logical low afer BUS Wake-up deecion 2) Rese: NRST will say low during LDO failures and for he Rese ime RST TLE8457_MODE_DIAGRAM Figure 3 Operaion mode sae diagram Daa Shee 6 Rev. 1.0

7 LIN Transceiver wih inegraed Volage Regulaor Funcional Descripion Table 1 Operaion mode ransiions No. Reason for ransiion Commen 1 Power-on deecion The V S supply volage rise above he V S,PON power-on rese level 2 Mode change wih EN inpu Triggered by logical high level 3 undervolage deecion oupu volage fall below he rese hreshold level 4 Mode change wih EN and TxD inpus Triggered by logical low level on EN and TxD 5 Mode change wih EN inpu Triggered by logical high level 6 Bus wake-up deecion RxD se low for signalling he bus wake-up even o he microconroller 7 Bus wake-up deecion RxD se low for signalling he bus wake-up even o he microconroller 8 Iniializaion wachdog imer elapsed Forced ransiion o Sleep Mode because of no response from microconroller afer power-on, wake-up, rese or if local errors are prevening o power up 9 Mode change wih EN and TxD inpus Triggered by logical low level on EN while TxD is held high 10 Mode change wih EN inpu Triggered by logical high level 11 Bus wake-up deecion RxD se low for signalling he bus wake-up even o he microconroller 12 undervolage deecion Deecion of failure due o undervolage or recovery from an over-emperaure even 13 Recovery from LDO overemperaure even When over-emperaure on he LDO is deeced he TLE8457 is disabled. Afer recover he device is acivaed in Ini Mode Table 2 Operaing Mode Conrol Mode Conrol Funcionaliy Commens EN TxD NRST RxD Sleep Low Low Off Low Floaing Ini Low High 1) On High 2) Low High RxD low afer a bus wake-up RxD high afer power-up or rese Sandby Low High 1) On High High Normal Operaion High Low High On High Low High RxD reflecs he signal on he bus TxD driven by he microconroller 1) The TxD inpu has a pull-up srucure o and is defaul se o logical high if lef open. 2) NRST is logical low during undervolage and while issuing a rese pulse o he microconroller. Daa Shee 7 Rev. 1.0

8 LIN Transceiver wih inegraed Volage Regulaor Funcional Descripion Normal Operaion Mode In Normal Operaion Mode boh he volage regulaor and he LIN ransceiver are acive. The TLE8457 suppors daa ransmission raes up o 20 kbi/s: Daa from he microconroller is ransmied o he LIN bus via he TxD inpu, while he receiver deecs he daa sream on he LIN bus and forwards i o he RxD oupu. Afer enering Normal Operaion Mode he TLE8457 requires a logical high signal for he ime o,rec on he TxD inpu before releasing he daa communicaion; The ransmier remains deacivaed as long as he signal on he TxD inpu pin remains logical low, prevening possible bus communicaion disurbance (see Figure 4). From Normal Operaion Mode he TLE8457 can be se o Sandby Mode or Sleep Mode. EN MODE,HIGH MODE,LOW NRST RxD Daa ransmission o,rec TxD Daa ransmission Sandby mode Normal Operaion mode Sleep mode TLE8457_NORMAL_MODE Figure 4 Enering Normal Operaion Mode, ransiion o Sleep Mode Sandby Mode Sandby Mode is a low power mode wih ulra low quiescen curren consumpion while he volage regulaor remains acive, supplying for example a microconroller in Sop mode. No LIN bus communicaion is possible, he ransmier and he receiver are disabled. The low power receiver is sill acive and he device can wakeup by a message on he LIN bus. For changing he operaion mode change from Sandby Mode o Sleep Mode, he device has firs o be se in Normal Operaion Mode, hen in Sleep Mode (see Figure 4). Daa Shee 8 Rev. 1.0

9 LIN Transceiver wih inegraed Volage Regulaor Funcional Descripion Ini Mode Afer a power-up even he TLE8457 eners Ini Mode by defaul. In his mode he LIN ransceiver is disabled, bu he volage regulaor is swiched on. Following he linear volage regulaor has reached is nominal oupu volage and he NRST oupu se high, he exernal microconroller can change he mode o Normal Operaion Mode. If he Iniializaion Wachdog imer elapses before a high signal is deeced on he EN inpu, he TLE8457 will auonomously ransiion o Sleep Mode (see Iniializaion Wachdog on Page 15). The Iniializaion Wachdog proecion in Ini Mode is always acivaed afer saring up he volage regulaor and afer a rese pulse, riggered by he NRST oupu going high. In Ini Mode he TLE8457 indicaes wake-up informaion on he RxD oupu. Afer a power-up and rese even, he RxD oupu will be high. If he TLE8457 is in Ini Mode afer BUS wake-up deecion, he RxD oupu will be low. Transiions o Ini Mode can be conrolled wih he EN inpu when in Sleep Mode, or auomaic forced afer: Bus wake-up even on he BUS pin. Power-up even on he supply V S. Power-on rese caused by he supply V S. Volage regulaor failure even due o V S undervolage. Recovery of an over-emperaure even on he volage regulaor. V S V S,PON LIN WK,bus NRST RxD RxD signals Power-up RxD signals Bus Wake-up EN The device remains in Ini mode while he signal on he EN pin is low Un-powered Ini mode Normal Operaion mode Figure 5 Enering Ini Mode afer power-up TLE8457_INIT_MODE Daa Shee 9 Rev. 1.0

10 LIN Transceiver wih inegraed Volage Regulaor Funcional Descripion Sleep Mode Sleep Mode is a low power mode wih quiescen curren consumpion reduced o a minimum while he device can sill wake-up by a message on he LIN bus. Boh he ransceiver and he volage regulaor are swiched off Bus Wake-up even A bus wake-up even, also called remoe wake-up, causes a ransiion from a low power mode o Ini Mode. A falling edge on he LIN bus, followed by a dominan bus signal for he ime WK,bus resuls in a bus wake-up even. The mode change o Ini Mode becomes acive wih he following rising edge on he LIN bus, when bus volage exceeds V BUS,wk. The TLE8457 remains in low power mode unil i deecs a sae change on he LIN bus from dominan o recessive (see Figure 6). In Ini Mode a logical low signal on he RxD oupu indicaes a bus wake-up even. In case he TLE8457 deecs a bus wake-up even while already being in Ini, he wake-up even will be signalled wih a logical low level on RxD and override he previous wake source (see Figure 5). V BUS V BUS,dom V BUS,wk WK,bus Sleep mode Ini mode,uv,on NRST RST EN TxD TxD is high because of inernal pull-up srucure RxD RxD low indicaes a Bus Wake-up even TLE8457_BUS_WAKE Figure 6 Bus wake-up behavior Daa Shee 10 Rev. 1.0

11 LIN Transceiver wih inegraed Volage Regulaor Funcional Descripion Mode Transiion via EN pin The EN inpu is used for operaion mode conrol of he TLE8457. By seing he EN inpu logical high for he ime MODE,HIGH while being in Ini Mode or Sandby Mode, a ransiion o Normal Operaion Mode will be riggered. If he volage level a he EN inpu is se logical high while he TLE8457 is in Sleep Mode, a ransiion o Ini Mode is iniiaed. If he EN inpu is coninuously held high hough powering up he volage regulaor and he following rese pulse, Normal Operaion Mode will be enered. From Normal Operaion Mode he TLE8457 can be se o eiher Sleep Mode or Sandby Mode. If he EN inpu is se low for he ime MODE,LOW while he TxD inpu is held logical high, he mode will change o Sandby Mode. For a ransiion o Sleep Mode, he TxD mus be se logical low before he ime MODE,LOW elapses afer EN goes low (see Figure 7). I is recommended o program a shor delay ime from EN is se low unil TxD is se low, for prevening driving he bus dominan hough mode ransiion o Sleep Mode. The EN inpu has an inegraed pull-down resisor o ensure he device remains in a low power mode if he EN inpu is lef open. The EN inpu has an inegraed hyseresis (see Figure 7). The TLE8457 changes he operaion modes regardless of he signal on he BUS pin. In he case of a shor circui failure beween he LIN bus and GND, resuling in a permanen dominan signal, he TLE8457 can be se o Sleep Mode. EN V EN,OFF V EN,ON MODE,LOW MODE,HIGH MODE,LOW MODE,HIGH EN hyseresis TxD RST NRST Normal Operaion mode Sandby mode Normal Operaion mode Sleep mode Ini mode Normal Operaion mode TLE8457_MODE_CONTROL Figure 7 Operaion mode conrol The EN inpu is blocked while he TLE8457 is in Ini Mode and NRST is low, no mode ransiions o Normal Operaion Mode is possible while a rese pulse is issued. Afer he NRST oupu goes high, mode conrol wih he EN inpu is released. A he same ime he Iniializaion Wachdog imer sars (see Iniializaion Wachdog on Page 15). Noe: If he TLE8457 is being forced o Sleep Mode by he Iniializaion Wachdog while he EN inpu is exernally being held a a logical high level, he device will reiniiae Ini Mode afer he VCC volage has been discharged below ~1 V. In such applicaions addiional supervision means are recommended. Daa Shee 11 Rev. 1.0

12 LIN Transceiver wih inegraed Volage Regulaor Funcional Descripion 4.2 Power Supplies The TLE8457 is designed for being supplied by he baery line hrough an exernal reverse polariy proecion diode a he V S pin (see Figure 18). An inpu capacior is needed for damping inpu line ransiens Power-Up / Power-Down During power-up he TLE8457 will ener Ini Mode when he V S supply reaches he power-on rese level V S,PON. The volage regulaor oupu will rack he V S supply volage unil reaches is nominal volage level. As reaches he under-volage level,uvc, a rese pulse is issued, he NRST oupu will say logical low for he rese ime RST and hen be se logical high. As NRST goes high, he EN inpu will become acive and he TLE8457 can change operaing mode accordingly (see Table 2). V S V S,UV,ON V S,UV,OFF V S,UV,UV V S,PON V S,PON NRST RST EN un-powered Ini mode Normal Operaion mode Ini mode un-powered Transmission blocked TLE8457_VS_POWER-UP_DOWN Figure 8 Power-up and power-down behavior While powering down he TLE8457 will block he LIN ransmier if being in Normal Operaion Mode as he V S supply volage falls below V S,UV,OFF. The volage regulaor will sar racking he V S supply volage when falling below + V DR. As falls below he undervolage level,uv he NRST oupu will be se logical low and he TLE8457 will ener Ini Mode. When he V S supply volage falls below he power-on-rese level V S,PON he volage regulaor will be disabled and he TLE8457 considered un-powered. Daa Shee 12 Rev. 1.0

13 LIN Transceiver wih inegraed Volage Regulaor Funcional Descripion V S Undervolage Deecion V S Undervolage blocking level V S,UV,OFF Undervolage hyseresis V S,UV,hys Undervolage release level V S,UV,ON Power-on rese level V S,PON Blanking ime blank,uv Normal Operaion mode No communicaion possible Normal Operaion mode Figure 9 V S early undervolage deecion TLE8457_VS_EARLY_UNDERVOLTAGE_A The TLE8457 has an undervolage deecion on he supply pin V S wih wo differen hresholds: In Normal Operaion Mode he TLE8457 blocks he communicaion beween he LIN bus and he microconroller when deecing an early undervolage even. The RxD oupu will be se high. However, no mode change will occur. Afer V S rises above he undervolage release level V S,UV,REL, he bus communicaion inerface will be released when he signal on he TxD inpu goes high. See Figure 9. In case he power supply V S drops below he power-on rese level V S,PON he TLE8457 no only blocks he ransceiver communicaion, i also changes he operaion mode o Ini mode afer recovery of V S, see Figure 10. In Ini Mode he TLE8457 indicaes a power-up even on he RxD pin. The power-on rese deecion is acive in all operaion modes. Undervolage release level V S,UV,ON V S Undervolage blocking level V S,UV,OFF Undervolage hyseresis V S,UV,hys Power-on rese level V S,PON Blanking ime blank,uv Normal Operaion mode Power-down Ini mode (EN = low ) Normal Operaion mode (EN = high ) No communicaion possible TLE8457_VS_UNDERVOLTAGE_A Figure 10 V S undervolage deecion Daa Shee 13 Rev. 1.0

14 LIN Transceiver wih inegraed Volage Regulaor Funcional Descripion 4.3 Volage Regulaor The TLE8457 has an inegraed volage regulaor dedicaed for supplying microconrollers and/or on-board sensors under harsh auomoive environmen condiions. I can supply a load curren up o 70 ma wih an oupu volage olerance wihin ± 2%. Because of he ulra low curren consumpion, he TLE8457 is perfecly suied for applicaions permanenly conneced o he baery supply. Addiionally, in Sleep Mode, he volage regulaor is swiched off and an even lower quiescen curren can be achieved. The volage regulaor oupu is proeced agains undervolage, overcurren, over-emperaure and power-up failures. In case he load curren rises above he funcional range, for example during shor circuis, he oupu curren is limied o I CC,lim. Therefore he oupu volage will drop and a rese pulse will be issued if falling below he undervolage rese hreshold. The supply oupu provides a sable supply volage wih oupu capaciors down o 1 µf, including low ESR muli-layer ceramic capaciors VCC Undervolage Deecion The TLE8457 has undervolage deecion on he volage regulaor oupu. If he volage falls below he undervolage hreshold,uv for longer han deecion ime de,rst he NRST oupu will be se logical low and he TLE8457 will auomaically ener Ini Mode and sar he Iniializaion Wachdog (see Chaper and Chaper 4.4). de,rst,uv Normal Operaion mode (EN = high ) Sandby mode (EN = low ) Ini mode Normal Operaion mode (EN = high ) Ini mode (EN = low ) NRST RST NRST goes and says low as long as is in undervolage NRST says low for addiional Rese ime RST TLE8457_VCC_UNDERVOLTAGE Figure 11 undervolage deecion Rese Oupu The NRST oupu is used for issuing rese pulses o for example an exernal microconroller. In case of volage regulaor undervolage or over-emperaure evens he NRST oupu will go low and a mode ransiion o Ini Mode will be riggered. The NRST oupu will say low unil a complee recovery from he failure and addiionally for he rese ime RST, hen go high (see Figure 11). While he TLE8457 is in Ini Mode and NRST is low mode ransiion o Normal Operaion Mode is blocked. The NRST pin is inernally pulled up o. If needed in he applicaion, an addiional exernal pull-up resisor can be implemened. Daa Shee 14 Rev. 1.0

15 LIN Transceiver wih inegraed Volage Regulaor Funcional Descripion 4.4 Iniializaion Wachdog The TLE8457 feaures an enhanced Iniializaion Wachdog imer for deecion of local failures and error handling for minimizing sysem curren consumpion. The benefi of his safey funcion is o preven a malfuncioning ECU being suck in Ini Mode wih high curren consumpion and draining he car baery. The Iniializaion Wachdog is only acive in Ini Mode, wih he wo use cases: supply iniializaion and Normal Operaion Mode acivaion. V S 1 V S,PON 2,UV NRST 3 RST o,rec Wachdog Supply Iniializaion Normal Operaion mode Acivaion Timeou 1 Timeou 2 5 EN 4 Un-powered Ini mode Normal Operaion mode If Timeou forced ransiion o Sleep mode If Timeou forced ransiion o Sleep mode 1 V S exceeds he Power-on rese hreshold Supply Iniializaion Wachdog is sared Figure exceeds he -Undervolage hreshold Rese imer is sared Rese imer elapses Normal Operaion mode Acivaion Wachdog is sared Mode change wih he EN inpu Mode ransiion o normal mode TxD mus be high for a leas o,rec afer enering Normal mode for releasing he ransmier Iniializaion Wachdog TLE8457_WATCHDOG VCC Supply Iniializaion The supply Iniializaion wachdog is deecing if local errors on he ECU is prevening he supply o power up correcly because of shor circuis o ground or if componens on he board are drawing oo high currens. The imer is sared when he linear regulaor is swiched on afer power-up evens or afer mode ransiions o Ini mode riggered by eiher bus wake-up or he EN inpu being se high in Sleep Mode. Addiionally, he imer will sar when deecing undervolage and afer recovery from an overemperaure even. Daa Shee 15 Rev. 1.0

16 LIN Transceiver wih inegraed Volage Regulaor Funcional Descripion In case he volage rise above he,uv undervolage hreshold before he imer elapses, is considered successfully iniialized and he imer is disabled. If he imer elapses before powers up correcly, he TLE8457 will auonomously ransiion o Sleep Mode. Normal Operaion Mode Acivaion Afer he TLE8457 has generaed a rese pulse he Iniializaion Wachdog is sared for monioring he acivaion of Normal Operaion Mode. The microconroller mus se he EN inpu high before he imer elapses afer Ini_WD, else he TLE8457 will auonomously ransiion o Sleep Mode. EN Ini_WD RST NRST Sandby mode / Sleep mode / unpowered Ini mode Sleep mode TLE8457_INITIALIZATION_TIMEOUT Figure 13 Enable acivaion ime-ou Daa Shee 16 Rev. 1.0

17 LIN Transceiver wih inegraed Volage Regulaor Funcional Descripion 4.5 LIN Transceiver The LIN inerface is a single wire, bi-direcional bus, used for in-vehicle neworks. The inegraed LIN ransceiver of he TLE8457 is he inerface beween he microconroller and he physical LIN bus (see Figure 18). Daa from he microconroller is driven o he LIN bus via he TxD inpu. The ransmi daa sream on he TxD inpu is convered o a LIN bus signal wih opimized slew raes in order o minimize he elecromagneic emission of he LIN nework. The RxD oupu reads back he informaion from he LIN bus o he microconroller. The receiver has an inegraed filer nework for noise suppression from he LIN bus and o increase he elecromagneic immuniy level of he ransceiver. The LIN specificaion defines wo valid bus levels (see Figure 14): Dominan sae wih he LIN bus volage level near GND, acively driven by a ransceiver. Recessive sae wih he LIN bus volage pulled up o he supply volage V S hrough he bus erminaion. By seing he TxD inpu of he TLE8457 o a logical low signal, he ransceiver generaes a dominan level on he BUS inerface pin. The receiver reads back he signal on he LIN bus and indicaes he dominan LIN bus signal wih a logical low on he RxD oupu o he microconroller. By seing he TxD inpu high, he ransceiver ses he LIN inerface pin o he recessive level. A he same ime he recessive level on he LIN bus is indicaed by a logical high signal on he RxD oupu. Every LIN nework consiss of a maser node and one or more slave nodes. To configure he TLE8457 for maser node applicaions, a erminaion resisor of 1 kω and a diode mus be conneced beween he LIN bus and he power supply V S (see Figure 18). TxD V S Recessive Dominan Recessive V h_rec BUS V h_dom RxD Figure 14 LIN bus signals TLE8457_LIN_COMMUNICATION_A Daa Shee 17 Rev. 1.0

18 LIN Transceiver wih inegraed Volage Regulaor Funcional Descripion TxD Time-ou The TxD ime-ou feaure proecs he LIN bus agains permanen blocking in case he logical signal on he TxD inpu is coninuously low, caused by for example a malfuncioning microconroller or a shor circui on he prined circui board. In Normal Operaion Mode, a logical low signal on he TxD inpu for ime > TxD disables he ransmier s oupu driver sage (see Figure 15). The receiver will remain acive and he daa on he bus are sill moniored on he RxD oupu. The TLE8457 will release he oupu sage afer a TxD ime-ou even firs when deecing a logical high signal on he respecive TxD inpu for he ime o,rec. TxD ime-ou due o e.g. microconroller error Recovery of he microconroller error Release afer TxD ime-ou Normal communicaion TxD o,rec Normal communicaion TxD V BUS Figure 15 TxD ime-ou TLE8457_TXD_TIMEOUT_A Shor Circui The BUS pin of TLE8457 can wihsand shor circuis o eiher GND or o he power supply V S. The inegraed over-emperaure proecion may disable he ransmier if a permanen shor circui on he BUS pin causes he TLE8457 o overhea. 4.6 Over-emperaure Proecion The TLE8457 has wo independen over-emperaure deecors for proecing he device agains hermal oversress; on he volage regulaor pass elemen and on he LIN bus ransmier. In case he juncion emperaure a he LIN ransmier increase above he hermal shu down level T JSD, i will be disabled unil he ransmier s juncion emperaure cools down below T J < T JSD - T. No oher effec nor mode change will occur. Afer a LIN ransmier over-emperaure recovery he TxD inpu requires a logical high signal before resaring daa ransmission. If an over-emperaure even is deeced on he volage regulaor, i will be disabled and he NRST oupu will be se low. During he over-emperaure condiion no funcionaliy of he TLE8457 is available. Afer he juncion emperaure cools down below T J < T JSD - T, he TLE8457 will auomaically ener Ini Mode and be reacivaed. Noe: Depending on he over-emperaure circumsance, eiher only he LIN ransmier will deec overemperaure, for example due o bus shor circui or severe EMC injecion, only he volage regulaor deecor or boh (simulaneously or sequenially). Daa Shee 18 Rev. 1.0

19 LIN Transceiver wih inegraed Volage Regulaor General Produc Characerisics 5 General Produc Characerisics 5.1 Absolue Maximum Raings Table 3 Absolue Maximum Raings Volages, Currens and Temperaures 1) All volages wih respec o ground; posiive curren flowing ino pin; unless oherwise specified Parameer Symbol Values Uni Noe or Number Min. Typ. Max. Tes Condiion Volage Supply inpu volage V S V LIN Spec 2.2A (Par. 11) P_5.1.1 Bus inpu volage V BUS V P_5.1.2 Logic volages a EN and TxD V logic,in V P_5.1.3 Logic volages a RxD and NRST V logic,ou V P_ Volage regulaor oupu V P_5.1.5 Currens Oupu curren a RxD I RxD ma P_5.1.6 Oupu curren a NRST I NRST 10 ma P_5.1.7 Temperaure Juncion emperaure T j C P_5.1.8 Sorage emperaure T s C P_5.1.9 ESD Suscepibiliy Elecrosaic discharge volage a V S and BUS vs. GND Elecrosaic discharge volage all oher pins Elecrosaic discharge volage corner pins Elecrosaic discharge volage a all oher pins V ESD -8 8 kv Human Body Model (100pF via 1.5 kω) 2) V ESD -2 2 kv Human Body Model (100pF via 1.5 kω) 2) V ESD V Charged Device Model 3) V ESD V Charged Device Model 3) 1) No subjec o producion es, specified by design 2) ESD suscepibiliy, HBM according o ANSI/ESDA/JEDEC JS-001 (1.5 kω, 100pF) 3) ESD suscepibiliy, Charged Device Model CDM EIA / JESD 22-C101 or ESDA STM5.3.1 P_ P_ P_ P_ Noes 1. Sresses above he ones lised here may cause permanen damage o he device. Exposure o absolue maximum raing condiions for exended periods may affec device reliabiliy. 2. Inegraed proecion funcions are designed o preven IC desrucion under faul condiions described in he daa shee. Faul condiions are considered as ouside normal operaing range. Proecion funcions are no designed for coninuous repeiive operaion. Daa Shee 19 Rev. 1.0

20 LIN Transceiver wih inegraed Volage Regulaor General Produc Characerisics 5.2 Funcional Range Table 4 Operaing Range Parameer Symbol Values Uni Noe or Min. Typ. Max. Tes Condiion Supply Volage Supply Volage range for Normal Operaion Exended Supply Volage Range for Operaion Sabiliy Requiremen on VCC V S(nor) V LIN Spec 2.2A Param. 10 V S(ex) V Parameer deviaions possible Number P_ P_ Oupu capacior range C VCC 1.0 µf 1), 3) P_5.2.3 Oupu capacior ESR ESR(C VCC ) 5.0 Ω 2), 3) P_5.2.4 Thermal parameer Juncion emperaure T j C 3) P_ ) The minimum oupu capaciance requiremen is applicable for a wors case capaciance olerance of 30%. 2) Relevan ESR value a f = 10 khz. 3) No subjec o producion es, specified by design. Noe: Wihin he funcional range he IC operaes as described in he circui descripion. The elecrical characerisics are specified wihin he condiions given in he relaed elecrical characerisics able. Daa Shee 20 Rev. 1.0

21 LIN Transceiver wih inegraed Volage Regulaor General Produc Characerisics 5.3 Thermal Characerisics Noe: This hermal daa was generaed in accordance wih JEDEC JESD51 sandards. For more informaion, please visi Table 5 Thermal Resisance 1) Parameer Symbol Values Uni Noe or Number Min. Typ. Max. Tes Condiion Thermal Resisance, PG-DSO-8 Package Version Juncion ambien R hja 130 K/W 2) P_5.3.1 Thermal Resisance, PG-TSON-8 Package Version Juncion ambien R hja 60 K/W 2) P_5.3.2 Juncion ambien 190 K/W Fooprin only 3) P_5.3.5 Juncion ambien 70 K/W 300mm2 heasink on P_5.3.6 PCB 3) Thermal Shudown Juncion Temperaure Thermal shudown emperaure T JSD C T JSD increasing P_5.3.3 Thermal shudown hyseresis ΔT 10 K T JSD decreasing P_ ) No subjec o producion es, specified by design. 2) Specified R hja value is according o Jedec JESD51-2,-5,-7 a naural convecion on FR4 2s2p board; The produc (Chip+Package) was simulaed on a 76.2 x x 1.5 mm board wih 2 inner copper layers (2 x 70 μm Cu, 2 x 35 μm Cu). Where applicable a hermal via array under he exposed pad conaced o he firs inner copper layer. 3) Specified RhJA value is according o Jedec JESD51-3 a naural convecion on FR4 1s0p board; The produc (Chip+Package) was simulaed on a 76.2 x x 1.5 mm board wih 1 inner copper layer (1 x 70 μm Cu). Daa Shee 21 Rev. 1.0

22 LIN Transceiver wih inegraed Volage Regulaor Elecrical Characerisics 6 Elecrical Characerisics 6.1 Funcional Device Characerisics Table 6 Elecrical Characerisics 5.5 V < V S <28V; R LIN = 500 Ω; -40 C < T j < 150 C; all volages wih respec o ground; posiive curren flowing ino pin 1) ; unless oherwise specified. Parameer Symbol Values Uni Noe or Tes Condiion Number Min. Typ. Max. Curren Consumpion Curren consumpion a V S, ransmier in Recessive sae Curren consumpion a V S, ransmier in Dominae sae Curren consumpion a V S, Dominae Sae Curren consumpion a V S in Sandby Mode I S,sandby = I S - I CC Curren consumpion a V S in Sleep Mode Curren consumpion a V S in Sleep Mode. Bus shored o GND I S,rec ma I CC = 50 µa; Wihou R LIN ; TxD = high ; V BUS = V S I S,dom ma I CC = 50 µa; Wihou R LIN ; TxD = low ; V BUS =0V I S,dom_max ma I CC = 70 ma; Wihou R LIN ; TxD = low ; V BUS =0V I S,sandby µa Sandby Mode; I CC =50µA; V S = V BUS = 13.5 V; I S,Sleep 7 16 µa Sleep Mode; V S = 13.5 V; V BUS =V S ; =0V I S,SC_GND µa Sleep Mode; V S = 13.5 V; V BUS =0V; =0V P_6.1.1 P_6.1.2 P_6.1.3 P_6.1.4 P_6.1.5 P_6.1.6 Power-up / Power-down Power-on rese level on V S V S,PON 3.0 V P_6.1.7 Undervolage hreshold, V S on V S,UV,ON V Rising edge P_6.1.8 Undervolage hreshold, V S off V S,UV,OFF V Falling edge P_6.1.9 Undervolage hyseresis on V S V S,UV,hys mv 2) P_ V S,UV,hys = V S,UV,ON - V S,UV,OFF Undervolage blanking ime BLANK,UV 10 µs 2) P_ Enable Inpu: EN HIGH level inpu volage V EN,ON 2 V P_ LOW level inpu volage V EN,OFF 0.8 V P_ Inpu hyseresis V EN,hys mv P_ Pull-down resisance R EN kω P_ Delay ime for mode change, MODE,LOW µs P_ EN low Delay ime for mode change, MODE,HIGH 5 µs 2) P_ EN high Iniializaion Wachdog ime Ini_WD ms P_ Daa Shee 22 Rev. 1.0

23 LIN Transceiver wih inegraed Volage Regulaor Elecrical Characerisics Table 6 Elecrical Characerisics (con d) 5.5 V < V S <28V; R LIN = 500 Ω; -40 C < T j < 150 C; all volages wih respec o ground; posiive curren flowing ino pin 1) ; unless oherwise specified. Parameer Symbol Values Uni Noe or Tes Condiion Number Min. Typ. Max. Inpu capaciance Ci EN 5 pf Rese Oupu: NRST 2) P_ HIGH level leakage curren I NRST,H 5 µa 2) P_ LOW level oupu volage V NRST 0.4 V I NRST = 1.5 ma; >1V; P_ Rese ime RST ms P_ Inernal pull-up resisance R NRST kω P_ Volage Regulaor Oupu, 5 V versions (TLE8457ASJ and TLE8457ALE): VCC Oupu volage V 0.05 ma < I CC <70mA; 5.8 V < VS < 28 V P_ Oupu volage drop V DR mv I CC <70mA P_ V DR =V S -V 3) CC Oupu volage drop, 50mA V DR =V S - Oupu volage drop, 20mA V DR =V S - V DR, mv I CC <50mA P_ V DR, mv I CC <20mA P_ Oupu curren limiaion I CC,lim ma 0 V < <4.8V P_ Load regulaion,lo mv 0.05mA< I CC <70mA; VS = 13.5 V Line regulaion,li mv I CC =1mA; 5.8 V < V S <28V Power supply ripple rejecion PSRR db 2) ; I CC = 50 ma; f = 100 Hz; V r =0.5V pp ; V S = 13.5 V P_ P_ P_ Undervolage rese hreshold,uv V decreasing P_ Undervolage rese hyseresis,uv,hy mv P_ Undervolage deecion ime de,rst 1 20 µs 2) ; =3.5V C NRST =20pF P_ Volage Regulaor Oupu, 3.3 V versions (TLE8457BSJ and TLE8457BLE): VCC Oupu volage V 0.05 ma < I CC <70mA; V < VS < 28 V P_ Oupu volage drop V DR =V S - Oupu volage drop, 50mA V DR =V S - Oupu volage drop, 20mA V DR =V S - V DR mv I CC <70mA P_ V DR, mv I CC <50mA P_ V DR, mv I CC <20mA P_ Oupu curren limiaion I CC,lim ma 0 V < <3.1V P_ Daa Shee 23 Rev. 1.0

24 LIN Transceiver wih inegraed Volage Regulaor Elecrical Characerisics Table 6 Elecrical Characerisics (con d) 5.5 V < V S <28V; R LIN = 500 Ω; -40 C < T j < 150 C; all volages wih respec o ground; posiive curren flowing ino pin 1) ; unless oherwise specified. Parameer Symbol Values Uni Noe or Tes Condiion Number Min. Typ. Max. Load regulaion,lo mv 0.05mA< I CC <70mA; P_ V S = 13.5 V Line regulaion,li mv I CC =1mA; P_ V < V S <28V Power supply ripple rejecion PSRR db 2) ; I CC = 50 ma; f = 100 Hz; P_ V r =0.5V pp ; V S = 13.5 V Undervolage rese hreshold,uv V decreasing P_ V Recessive sae P_ V Dominan sae P_ Undervolage rese hyseresis,uv,hy mv P_ Undervolage deecion ime de,rst 1 20 µs 2) ; =2.31V P_ C NRST =20pF Receiver Oupu: RxD HIGH level oupu volage V RxD,H 0.8 V I RxD =-2mA; V BUS = V S P_ LOW level oupu volage V RxD,L 0.2 V I RxD =2mA; V BUS =0V P_ Transmission Inpu: TxD HIGH level inpu volage range V TxD,H 0.7 LOW level inpu volage range V TxD,L 0.3 Inpu hyseresis V TxD,hys 200 mv P_ Pull-up resisance R TxD kω P_ TxD ime-ou TxD ms P_ TxD recessive release ime o,rec 10 µs 2) P_ Inpu capaciance Ci 5 pf 2) P_ Bus Receiver: BUS Receiver hreshold volage, recessive o dominan edge V h_dom 0.4 V S 0.44 V S V V S < 18V; P_ Receiver dominan sae V BUSdom V S V LIN Spec 2.2A (Par. 17) 4) P_ Receiver hreshold volage, dominan o recessive edge V h_rec 0.56 V S 0.6 V S V V S < 18V; P_ Receiver recessive sae V BUSrec V LIN Spec 2.2A (Par. 18) 5) P_ V S Receiver cener volage V BUS_CNT V LIN Spec 2.2A (Par. 19) 6) P_ V S V S V S V S < 18V; Daa Shee 24 Rev. 1.0

25 LIN Transceiver wih inegraed Volage Regulaor Elecrical Characerisics Table 6 Elecrical Characerisics (con d) 5.5 V < V S <28V; R LIN = 500 Ω; -40 C < T j < 150 C; all volages wih respec o ground; posiive curren flowing ino pin 1) ; unless oherwise specified. Parameer Symbol Values Uni Noe or Tes Condiion Number Min. Typ. Max V LIN Spec 2.2A (Par. 20) 7) V P_ V S V TxD = high ; Open load P_ Receiver hyseresis V HYS 0.07 P_ V S V S V S V S < 18V; Wake-Up hreshold volage V BUS,wk 0.4 V S V S V S Bus Transmier: BUS Bus recessive oupu volage V BUS,ro 0.8 V S Bus shor circui curren I BUS_LIM ma V BUS =18V; P_ LIN Spec 2.2A (Par. 12); Leakage curren I BUS_NO_GND ma V S =0V; V BUS =-12V; P_ LIN Spec 2.2A (Par. 15) Leakage curren I BUS_NO_BAT 1 5 µa V S =0V; V BUS =18V; P_ LIN Spec 2.2A (Par. 16) Leakage curren I BUS_PAS_dom ma V S =18V; V BUS =0V; P_ LIN Spec 2.2A (Par. 13) Leakage curren I BUS_PAS_rec 1 5 µa V S =8V; V BUS =18V; Driver sage off ; TxD = high ; LIN Spec 2.2A (Par. 14) P_ Forward volage serial diode V SerDiode V I SerDiode =-75µA P_ LIN Spec 2.2A (Par.21) Bus pull-up resisance R slave kω LIN Spec 2.2A (Par. 26) P_ Bus dominan oupu volage maximum load Bus dominan oupu volage maximum load V BUS,do 1.4 V V TxD =0V; R LIN = 500 Ω; V S =5.5 V; P_ V BUS,do V TxD =0V; R LIN = 500 Ω; P_ V V S = 18 V; 2) Inpu capaciance Ci BUS 30 pf P_ Dynamic Transceiver Characerisics: BUS Dominan ime for Bus Wakeup Propagaion delay: LIN bus Dominan o RxD Low LIN bus Recessive o RxD High WK,bus µs P_ rx_pdf 1 rx_pdr µs µs LIN Spec 2.2A (Par. 31) C RxD =20pF Receiver delay symmery rx_sym -2 2 µs LIN Spec 2.2A (Par. 32) rx_sym = rx_pdf - rx_pdr ; C RxD =20pF P_ P_ Daa Shee 25 Rev. 1.0

26 LIN Transceiver wih inegraed Volage Regulaor Elecrical Characerisics Table 6 Elecrical Characerisics (con d) 5.5 V < V S <28V; R LIN = 500 Ω; -40 C < T j < 150 C; all volages wih respec o ground; posiive curren flowing ino pin 1) ; unless oherwise specified. Parameer Symbol Values Uni Noe or Tes Condiion Number Min. Typ. Max. Duy cycle D1 (for wors case a 20 kbi/s) D1 = bus_rec(min) /2 bi Duy cycle D1 V S supply 5.5 V o 7.0 V (for wors case a 20 kbi/s) D1 = bus_rec(min) /2 bi Duy cycle D2 (for wors case a 20 kbi/s) D2 = bus_rec(max) /2 bi Duy cycle D2 V S supply 6.1 V o 7.6 V (for wors case a 20 kbi/s) D2 = bus_rec(max) /2 bi Duy cycle D3 V S supply 7.0 V o 18.0 V (for wors case a 10.4 kbi/s) D3 = bus_rec(min) /2 bi Duy cycle D3 V S supply 5.5 V o 7.0 V (for wors case a 10.4 kbi/s) D3 = bus_rec(min) /2 bi D Duy cycle 1 8) TH Rec (max) = V S ; TH Dom (max) =0.581 V S ; V S = V; bi =50µs; LIN Spec 2.2A (Par. 27) P_ D Duy cycle 1 8) P_ TH Rec (max) = V S ; TH Dom (max) = V S ; 5.5 V < V S <7.0V; bi =50µs D Duy cycle 2 8) P_ TH Rec (min)= V S ; TH Dom (min)= V S ; V S = V; bi =50µs; LIN Spec 2.2A (Par. 28) D Duy cycle 2 8) P_ TH Rec (min)= 0.41 V S ; TH Dom (min)= V S ; 6.1 V < V S <7.6V; bi =50µs; D Duy cycle 3 8) P_ TH Rec (max) = V S ; TH Dom (max) =0.616 V S ; V S = V; bi =96µs; LIN Spec 2.2A (Par. 29) D Duy cycle 3 8) P_ TH Rec (max) = V S ; TH Dom (max) = V S ; 5.5 V < V S <7.0V; bi =96µs; Daa Shee 26 Rev. 1.0

27 LIN Transceiver wih inegraed Volage Regulaor Elecrical Characerisics Table 6 Elecrical Characerisics (con d) 5.5 V < V S <28V; R LIN = 500 Ω; -40 C < T j < 150 C; all volages wih respec o ground; posiive curren flowing ino pin 1) ; unless oherwise specified. Parameer Symbol Values Uni Noe or Tes Condiion Number Min. Typ. Max. Duy cycle D4 V S supply 7.6 V o 18.0 V (for wors case a 10.4 kbi/s) D4 = bus_rec(max) /2 bi D Duy cycle 4 8) TH Rec (min) = V S ; TH Dom (min) = V S ; V S = V; bi =96µs; LIN Spec 2.2A (Par. 30) P_ Duy cycle D4 V S supply 6.1 V o 7.6 V (for wors case a 10.4 kbi/s) D Duy cycle 4 8) TH Rec (min) = V S ; TH Dom (min)= V S ; 6.1 V < V S <7.6V; bi =96µs; D4 = bus_rec(max) / 2 bi 1) Load curren on VCC specified posiive direcion ou of pin. 2) No subjec o producion es, specified by design. 3) Measured when he oupu volage VCC has dropped 100 mv from he nominal value obained a VS = 13.5V 4) Minimum limi specified by design. 5) Maximum limi specified by design. 6) V BUS_CNT =(V h_dom +V h rec )/2;. 7) V HYS =V h_rec -V h_dom. 8) Bus load according o LIN Spec 2.2A: Load 1 = 1 nf / 1 kω = C BUS / R LIN Load 2 = 6.8 nf / 660 Ω = C BUS / R LIN Load 3 = 10 nf / 500 Ω = C BUS / R LIN P_ Daa Shee 27 Rev. 1.0

28 LIN Transceiver wih inegraed Volage Regulaor Elecrical Characerisics 6.2 Diagrams V S 100 nf C VCC NRST EN C NRST R LIN TxD C Bus BUS GND RxD C RxD TLE8457_TEST_CIRCUIT_A Figure 16 Simplified es circui for dynamic ransceiver characerisics Bi Bi Bi TxD (inpu o ransmiing node) Bus_dom(max) Bus_rec(min) V SUP (Transceiver supply of ransmiing node) TH Rec(max) TH Dom(max) TH Rec(min) TH Dom(min) Thresholds of receiving node 1 Thresholds of receiving node 2 Bus_dom(min) Bus_rec(max) RxD (oupu of receiving node 1) rx_pdf(1) rx_pdr(1) RxD (oupu of receiving node 2) rx_pdr(2) rx_pdf(2) Duy Cycle D1, D3 = BUS_rec(min) / (2 x BIT) Duy Cycle D2, D4 = BUS_rec(max) / (2 x BIT) TLE8457_LIN_TIMING_DIAGRAM_A Figure 17 Timing diagram for dynamic ransceiver characerisics Daa Shee 28 Rev. 1.0

29 LIN Transceiver wih inegraed Volage Regulaor Applicaion Informaion 7 Applicaion Informaion Noe: The following informaion is given as a hin for he implemenaion of he device only and shall no be regarded as a descripion or warrany of a cerain funcionaliy, condiion or qualiy of he device. 7.1 Applicaion Example V Ba 5 V or 3.3V 22μF 100nF V I TLE42xx V Q 1μF 100nF LIN BUS GND INH Maser Node 100nF 7 8 V S INH TLE7258 RxD 1 2.4kΩ Pull-Up o MCU Supply Micro Conroller e.g XC22xx 1kΩ TxD 4 1nF 6 BUS GND EN 2 GND 5 ECU_1 22μF 100nF 1 V S TLE μF 100nF Slave Node 220pF 4 BUS GND RxD NRST TxD EN Micro Conroller e.g XC22xx GND 3 ECU_X Figure 18 Simplified applicaion circui Daa Shee 29 Rev. 1.0

30 LIN Transceiver wih inegraed Volage Regulaor Applicaion Informaion 7.2 ESD Robusness according o IEC Tes for ESD robusness according o IEC (150 pf, 330 Ω) have been performed. The resuls and es condiions are available in a separae es repor. Table 7 ESD Robusness according o IEC Performed Tes Resuls Uni Remarks Elecrosaic discharge volage a pin V S, BUS versus GND +8 kv 1) Posiive pulse Elecrosaic discharge volage a pin V S, BUS versus GND -8 kv 1) Negaive pulse 1) ESD suscepibiliy according LIN EMC 1.3 Tes Specificaion, Secion 4.3. (IEC ) - Tesed by exernal es house. 7.3 Transien Robusness according o ISO Tes for ransien robusness according o ISO have been performed. The resuls and es condiions are available in a separae es repor. Table 8 Auomoive Transien Robusness according o ISO Performed Tes Resuls Uni Pulse V Pulse V Pulse 3a -150 V Pulse 3b +100 V 7.4 LIN Physical Layer Compaibiliy As he LIN physical layer is independen from higher LIN layers (for example LIN proocol layer), all nodes wih a LIN physical layer according o his revision can be mixed wih LIN physical layer nodes, which are according o older revisions (LIN 1.0, LIN 1.1, LIN 1.2, LIN 1.3, LIN 2.0, LIN 2.1 and LIN 2.2), wihou any resricions. Daa Shee 30 Rev. 1.0

31 LIN Transceiver wih inegraed Volage Regulaor Package Oulines 8 Package Oulines ) ±0.07 (1.45) 1.75 MAX M A B 8x B 0.35 x 45 1) C 6 ± ± MAX. 0.2 M C 8x ) A Index Marking Figure 19 1) Does no include plasic or meal prorusion of 0.15 max. per side 2) Lead widh can be 0.61 max. in dambar area GPS01181 PG-DSO-8 (Plasic Dual Small Ouline PG-DSO-8) 3 ± ±0.1 3 ±0.1 Pin 1 Marking 1± ± ± ±0.1 ±0.1 Z ± ± ± ± ± ± ± ±0.1 Pin 1 Marking Z (4:1) PG-TSON-8-1-PO V01 Figure MIN. PG-TSON-8 (Plasic Thin Small Ouline Nonleaded PG-TSON-8) Green Produc (RoHS complian) To mee he world-wide cusomer requiremens for environmenally friendly producs and o be complian wih governmen regulaions he device is available as a green produc. Green producs are RoHS-Complian (i.e Pb-free finish on leads and suiable for Pb-free soldering according o IPC/JEDEC J-STD-020). For furher informaion on alernaive packages, please visi our websie: hp:// Dimensions in mm Daa Shee 31 Rev. 1.0

32 LIN Transceiver wih inegraed Volage Regulaor Revision Hisory 9 Revision Hisory Table 9 Revision Hisory Revision Daa Changes 1.0 Daa Shee creaed Daa Shee 32 Rev. 1.0

33 Please read he Imporan Noice and Warnings a he end of his documen Trademarks of Infineon Technologies AG µhvic, µipm, µpfc, AU-ConverIR, AURIX, C166, CanPAK, CIPOS, CIPURSE, CoolDP, CoolGaN, COOLiR, CoolMOS, CoolSET, CoolSiC, DAVE, DI-POL, DirecFET, DrBlade, EasyPIM, EconoBRIDGE, EconoDUAL, EconoPACK, EconoPIM, EiceDRIVER, eupec, FCOS, GaNpowIR, HEXFET, HITFET, HybridPACK, imotion, IRAM, ISOFACE, IsoPACK, LEDrivIR, LITIX, MIPAQ, ModSTACK, my-d, NovalihIC, OPTIGA, OpiMOS, ORIGA, PowIRaudio, PowIRSage, PrimePACK, PrimeSTACK, PROFET, PRO-SIL, RASIC, REAL3, SmarLEWIS, SOLID FLASH, SPOC, SrongIRFET, SupIRBuck, TEMPFET, TRENCHSTOP, TriCore, UHVIC, XHP, XMC. Trademarks updaed November 2015 Oher Trademarks All referenced produc or service names and rademarks are he propery of heir respecive owners. Ediion Published by Infineon Technologies AG Munich, Germany 2016 Infineon Technologies AG. All Righs Reserved. Do you have a quesion abou any aspec of his documen? IMPORTANT NOTICE The informaion given in his documen shall in no even be regarded as a guaranee of condiions or characerisics ("Beschaffenheisgaranie"). Wih respec o any examples, hins or any ypical values saed herein and/or any informaion regarding he applicaion of he produc, Infineon Technologies hereby disclaims any and all warranies and liabiliies of any kind, including wihou limiaion warranies of non-infringemen of inellecual propery righs of any hird pary. In addiion, any informaion given in his documen is subjec o cusomer's compliance wih is obligaions saed in his documen and any applicable legal requiremens, norms and sandards concerning cusomer's producs and any use of he produc of Infineon Technologies in cusomer's applicaions. The daa conained in his documen is exclusively inended for echnically rained saff. I is he responsibiliy of cusomer's echnical deparmens o evaluae he suiabiliy of he produc for he inended applicaion and he compleeness of he produc informaion given in his documen wih respec o such applicaion. For furher informaion on echnology, delivery erms and condiions and prices, please conac he neares Infineon Technologies Office ( WARNINGS Due o echnical requiremens producs may conain dangerous subsances. For informaion on he ypes in quesion please conac your neares Infineon Technologies office. Excep as oherwise explicily approved by Infineon Technologies in a wrien documen signed by auhorized represenaives of Infineon Technologies, Infineon Technologies producs may no be used in any applicaions where a failure of he produc or any consequences of he use hereof can reasonably be expeced o resul in personal injury.

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