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1 ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING BJT IC Design Dr. Lynn Fuller Webpage: 82 Lomb Memorial Drive Rochester, NY Tel (585) MicroE webpage: BJT_IC_Design.ppt Page 1

2 OUTLINE Differential Amplifier Biasing, Current Sources, Mirrors Output Stages Operational Amplifiers References Homework Questions Page 2

3 DIFFERENTIAL AMPLIFIER vo1 vi1 Vcc Rc VE Ie Vee Rc vi2 Re vo2 DC Analysis assume: Identical transistors, Re=infinite, vin1=vin2=0 Then Ic1=Ic2=Ie/2 Vo1=Vo2=VccRc Ie/2 Example: If Ie = 6mA Vcc = 10, Vee = 10 and Rc = 2K Assume Vin1 = Vin2 = 0 Vo1 = Vo2 = 4.0 volts VE = 0.7 VCE = 4.7 Page 3

4 SMALL SIGNAL ANALYSIS vi1 ib1 rp Rc vo1 Ve gm vbe or b ib Re Rc vo2 ib2 rp vi2 Lets define: Differential input voltage vid=vi1vi2 Common input voltage vic=(vi1vi2)/2 Differential Output Voltage Vod=Vo1Vo2 Common output voltage Voc=(Vo1Vo2)/2 Single sided output voltage Voss=Vo1 or Vo2 Page 4

5 VOLTAGE GAINS: Avd, Avc, CMRR Differential mode voltage gain, Avd = Vod / vid 0 0 Let vin1 = vid/2 vic and vin2 = vid/2 vic Ib1 = (vin1 Ve) / rp Ib2 = (vin2 Ve) / rp Ib1 = (vid/2 Ve) / rp Ib2 = (vid/2 Ve) / rp Vo1 = b ib1 Rc Vo2 = b ib2 Rc Vod = Vo1 Vo2 = b ib1 Rc b ib2 Rc Vod = (b Rc / rp) (vid/2 vid/2) Avd = b Rc rp = gm Rc Page 5

6 VOLTAGE GAINS: Avd, Avc, CMRR Common Mode Voltage Gain Avc = Voc/Vic = Let Vid = 0 thus vin1 = vin2 = Vic Ve = 2 Re (b 1) ib ib = (Vic Ve) / rp ib = Vic 2 Re (b1)ib rp Voc = b ib1 Rc b ib2 Rc and ib1 = ib2 2 Thus Voc = b Rc ib b Rc Vic = 2Re (b1) rp Avc = Voc Vic = Rearranging; ib = b Rc 2Re (b1) rp (Vo1 Vo2)/2 (vin1 vin2)/2 Vic 2 Re (b1) rp Page 6

7 OTHER RESULTS Single Sided Output Differential Voltage Gain: Voss Vid = b Rc 1/2 rp Single Sided Output Common Mode Voltage Gain: Voss b Rc Vic = 2Re (b1) rp note: half note: same Common Mode Rejection Ratio: CMRR is a figure of merit used to compare differential amplifiers CMRR = Avd Avc Differential Mode Input Resistance: Rid = 2 rp Common Mode Input Resistance: Ric = rp (b1) 2 Re Page 7

8 VARIATIONS Variations: 1. Resistor between emitter and Vee rather than current source 2. Series base resistors 3. Emitter resistors 4. Various types of current sources 5. Darlington configuration 6. FET s 7. Single sided outputs 8. Active loads 9. unbalanced or non symmetrical circuits Page 8

9 EXAMPLE DIFFERENTIAL AMPLIFIER Analyze the following differential amplifier, b= K vo2 vi1 1K T1 T2 2K 1K vi2 10 Page 9

10 DC Analysis: SOLUTION TO EXAMPLE ON PREVIOUS PAGE Small Signal Analysis: Hand Calculation: Avd = ½ gm Rc rpi/(1krpi)=62 or Avd = ½ Beta Rc/(rpi 1K) = 62 Page 10

11 SUMMARY 1. The differential amplifier should amplify the difference between the two input voltages. 2. The differential amplifier should suppress signals that are common to both inputs. 3. The differential amplifier with a constant current source is superior to the differential amplifier with just a resistor. 4. The common mode rejection ratio is used as a figure of merit for comparison. 5. The differential amplifier is a dc amplifier as well as an ac amplifier. Page 11

12 709 OPERATIONAL AMPLIFIER Page 12

13 741 OPERATIONAL AMPLIFIER Page 13

14 SIMPLIFIED 741 OP AMP SCHEMATIC Page 14

15 SIMPLE CURRENT SOURCE V R Load Ie V R Load Ie Ie = (V0.7)/R Ie Ree = ro In the next few pages we will investigate current sources, level shifting and output stages of op amps Page 15

16 CURRENT SOURCE (HW Problem 1) There are many types of current sources. Consider the following: 5K ib itest b ib vbe rp 5K T1 5K ro vtest Ie 4.3K Ree 5K 4.3K rp = b(0.026/1ma) = 100 (26)= 2.6K 10 What is Ie? (Ans: 1mA) Ree = infinity if ro = infinite (not there) Ree is calculated by students in pro.1. Ree in this example is 4.68 Meg if b = 100 and ro = 100K Page 16

17 CURRENT SOURCES R1 Load Ie Vbe1 = Vbe2 I2Re KT/q ln I1/Is = KT/q ln I2/Is I2Re KT/q ln(i1/i2)= I2Re I1 Re V I2 note: I2 is always smaller than I1 Ie can be small without R1being small Ree is ~Meg ohms Page 17

18 EXAMPLES FOR CURRENT SOURCE Example 1: suppose I1 = 1 ma and I2 is 10 ua find Re KT/q ln(i1/i2)= I2Re ln (1mA/10uA) = 10uA Re = 10uA Re Re = 11.97K Example 2: suppose I1 = 1 ma and Re = 20K find I2 KT/q ln(i1/i2) = I2Re 0.026ln(1mA/I2)=20K I2 Try I2 = Left Side = 1uA 179K 5uA 27.6K 6uA 22.2K 7uA 18.4K Etc. Page 18

19 MORE CURRENT SOURCES Io = Iref / (12/b) Io = Iref / (12/b 2 ) Io = Iref / (12/b 2 ) Ree = ro Ree = ro Ree = MEG ohms Figure 1. (a) Basic, (b) Currentbuffered, and (c) Wilson current sources. I o I s e ( q V B E / k T ) 1 V C E V A Page 19

20 LEVEL SHIFTING It would be nice to have zero volts out when we have zero volts in. We can achieve this by adding a level shifting stage. Vo1 vo1 Rc vi1 Vcc =10 Ie Rc Vo2 vi2 vo2 Re Vee = for vi1 = vi2 = 0 I1 If Ie = 6mA And Rc = 2K Vo2 = 4 volts DC Voltage Thus we need a Level Vshift 4 volt shift to make Shifting Vout = 0 volts Vout Note: in the ac equivalent circuit current sources are open circuits and voltage sources are short 10 circuit. (We could use a battery) Page 20

21 VOLTAGE SOURCES / REFERENCES Voltage sources should have constant voltage and zero source resistance. I1 VL = nvbe ro = n(kt/q)/i1 Vz n I1 VL = Vz Vbe ro = rz (KT/q)/I1 dvl/dt = dvz/dt dvbe/dt Page 21

22 VOLTAGE SOURCES I1 V Assume Ib is small compared to I1 VL = VB 0.7 R1 VB VB 0.7 = (V0.7) R2/(R1R2) Therefore: VL = (V0.7) R2/(R1R2) D1 R2 Load VL ro = rp R1//R2 (b1) Note: small What is the purpose of D1? (answer: reduces the change in VL with temperature) Page 22

23 VOLTAGE MIRROR V V Vz multiple emitter transistor Vz Load Load Load Load Page 23

24 LEVEL SHIFTING V I2 = Vbe/R2 I1 VL = Vbe (1 R1/R2) I2 R1 Vbe R2 VL Page 24

25 LEVEL SHIFTING It would be nice to have zero volts out when we have zero volts in. We can achieve this by adding a level shifting stage. Vo1 vo1 vi1 Vcc =10 Rc Ie Rc Vo2 vi2 vo2 Re Vee = I1 Level Shifting1 Vshift Vout for vi1 = vi2 = 0 If Ie = 6mA And Rc = 2K Vo2 = 4 volts Thus we need a 4 volt shift to make Vout = 0 volts 10 Page 25

26 LEVEL SHIFTING Vo1 10 R1 I1 Vo2 10 Simple resistor level shifter Vo1 10 R1 R2 I1 10 Vbe Multiplier level shifter VL Level shifting should have high input resistance so it will not load the previous stage. Common collector input for high input resistance. VL = Vbe (1 R1/R2) Vo2 Page 26

27 OUTPUT STAGES An output stage is needed to provide the capability of sourcing or sinking large currents to the load V2 Complementary Symmetry emitter follower output stage T1 T2 V RL V I L For V2 > 0.7 T1 is on and current flows from V thru T1 and RL to Gnd. T2 is off. Crossover Distortion VL VL For V2 < 0.7 T2 is on and current flows from Gnd thru RL and T2 to V. T1 is off. t With no signal in the transistors T1 and T2 are biased in an off state. This is called a class B amplifier. Page 27

28 OUTPUT STAGES To eliminate the crossover distortion we can bias the transistors T1 and T2 so that they are just ready to conduct (ie Vbe ~ 0.65) Vin I1 R R T1 T2 V I2 RL V I L VL Note: D1 and D2 are probably transistors identical to T1 and T2 with Base and Collector shorted. Thus I1 = I2 and is called the idle current. I1 = (2 V 1.4)/2R Page 28

29 OUTPUT STAGES Level shifting and output stage biasing Vo1 R T1 V Output stage and load I L I1 T2 RL V VL Page 29

30 OUTPUT STAGE WITH CURRENT LIMITING V When T1 is on IL flows from V thru T1, Re and Rl to Gnd. If RL accidently went to zero IL would only go to 0.7/Re because at that value of IL T3 would turn on which would remove the base drive from T1 thus IL would be limited to 0.7/Re. Similar for T2. T3 T4 T1 Re Re T2 I L RL V Page 30

31 SIMPLE OPERATIONAL AMPLIFIER 5.6K 5.6K T5 10 vi1 1K 1K T1 T2 T3 1K vo1 vi2 1K Re 100 T4 T8 T9 T T7 I L VoL RL 1K 1.8K 1K RB Design involves selecting values for RB and Re 10 Page 31

32 ACTIVE LOADS vi1 I/2 V T1T2 I V I/2 Vo1 vi2 Replacing some of the resistors with current sources requires less space and enables higher differential voltage gain and lower common mode gain because ro replaces RC in the collector. ro = VA/IC and can be even higher Practically: I/2 sources can not be made exactly correct. (see next page) Page 32

33 ACTIVE LOADS CURRENT MIRROR I1=IE/2 vi1 Vo1 T3 T1 V V T2 T4 IE I2=IE/2 Vo2 vi2 DC Analysis: 1. IE is constant current. 2. I1 = I2 = IE/2 3. Vo1 = V 0.7 actually Vo1 = V KT/q ln I1/IS 4. Vo2 = V VEB1VBC2 Vo2 = V KT/q ln I1/Is VBC2 When Vin1=Vin2=zero and I1=I2=IE/2 we have everything balanced and VBC2=VBC1=0 thus Vo2=V When Vin1 > Vin2 then I1 > I2 and Vo2 rises toward V Note: pp signal swing is about 1 volt Page 33

34 SMALL SIGNAL ANALYSIS OF DIFF AMP WITH ACTIVE LOAD Vo1 vi1 T3 IEE T1 V V T2 T4 REE Let V1,V2 and V3 be node voltages at node 1,2 and 3, summing currents KCL at node1 (b1)(vin1 V1)/rp1 (V2V1)/ro1 (V3V1)/ro2 (b1)(vin2v1)/rp2 V1/REE = 0 at node2 V2/rdV2/rp4 (V2V1)/ro1 b(vin1v1)/rp1 = 0 Vo2 vi2 Vin1 ib1 rd 2 rp1 bib1 ro1 ro2 1 vbe ib4 rp4 bib2 bib4 3 rp2 ro4 ib Vin2 at node3 bv2/rp4v3/ro4 (V3V1)/ro2 b(vin2v1)/rp2 = 0 Page 34

35 SMALL SIGNAL ANALYSIS OF DIFF AMP WITH ACTIVE LOAD Rearranging: at 1 at 2 [1/REE(b1)/rp11/ro11/ro2(b1)/rp2]V1[1/ro1]V2 [1/ro2]V3 = RHS a1 RHS = Vin2(b1)/rp2 Vin1(b1)/rp1 [1/ro1b/rp1]V1[1/rd1/rp41/ro1]V2 0 V3= bvin1/rp1 a2 a3 at 3 [b/rp21/ro2]v1b/rp4v2 [1/ro41/ro2]V3 = bvin2/rp2 a4 a5 Page 35

36 SMALL SIGNAL ANALYSIS OF DIFF AMP WITH ACTIVE LOAD Using Cramer s rule and determinants V3 = a1 a2 a4 1/ro1 a3 b/rp4 a1 a2 a4 [Vin2(b1)/rp2 Vin1(b1)/rp1] bvin1/rp1 bvin2/rp2 1/ro1 a3 b/rp4 1/ro3 0 a5 Page 36

37 SMALL SIGNAL ANALYSIS OF DIFF AMP WITH ACTIVE LOAD Example: let ro1= ro2 = ro4 = 50K rp1 = rp2 = rp4 = 2K b =100, rd =20, REE = infinite a) If Vin1=1/2 volt and Vin2= 1/2 volt Find V3 = 1246 Therefore Avd = 1246 b) If Vin1=1 volt and Vin2= 1 volt Find V3 = Therefore Avc = c) CMMR = 1246/ = 2.44e7 Simple Hand Calculation: Avd = ½ Beta Rc/rp = 1250 or Avd = ½ gm Rc = 1250 Page 37

38 LTSPICE SIMULATION Note: SPICE model VA=100 for both Page 38

39 EXAMPLE FROM LAB V CC = 12 V 10 F R E2 R C1 R C2 R E1 v id 10 k ~ 10 F 100 Q 1 Q Q 3 Q2N3906 Q 4 Q2N3904 Q2N3904 Q ma Q2N v o R L See lab notes Q 5 R C3 Q 7 Q2N3906 V EE = 12 V Page 39

40 REFERENCES 1. Sedra and Smith, 2. Device Electronics for Integrated Circuits, 2nd Edition, Kamins and Muller, John Wiley and Sons, The Bipolar Junction Transistor, 2nd Edition, Gerald Neudeck, AddisonWesley, Analog Integrated Circuits, Gray and Meyers Page 40

41 HOMEWORK BIPOLAR IC DESIGN 1. Derive the exact value of Ree for the current source on page Design a 100 µa current source. 3. For the simple op amp shown on page 31 a. let vin1 = vin2 = zero. Select values for Rc and Rb such that Vout = zero. b. What is the maximum load current before current limiting? c. Calculate the small signal differential voltage gain. 4. Do a SPICE analysis of the simple op amp on page 31. Show DC Vout vs Vin and Voltage Gain. Answer: Gain ~ Do a SPICE analysis of the differential amplifier using active loads shown on page 33. Let V=10volts. Show DC Vout vs Vin and Gain. Answer: Answer: Gain ~2000 Page 41

42 CURRENT SOURCE (HW Problem 1) There are many types of current sources. Consider the following: 5K ib itest b ib vbe rp 5K T1 5K ro vtest Ie 4.3K Ree 5K 4.3K rp = b(0.026/1ma) = 100 (26)= 2.6K 10 What is Ie? (Ans: 1mA) Ree = infinity if ro = infinite (not there) Ree is calculated by students in pro.1. Ree in this example is 4.68 Meg if b = 100 and ro = 100K Page 42

43 SOLUTION TO EXAMPLE ON PAGE 9 Analyze the following differential amplifier, b= K vo2 vi1 1K T1 T2 2K 1K vi2 10 Page 43

44 SOLUTION TO EXAMPLE ON PAGE 9 DC analysis: if Vin1 = Vin2 = zero, IC1 = IC2 and IB1=IB2 KVL: IB 1K 0.7 2(b1)IB 2K 10 = 0 IB = 9.3 / (1K2(2001) 2K = 11.6uA IC = 200 IB = 2.32 ma VCE1 =10 IB 1K 0.7 = 10.7 VCE2 = 10 IC 2K 0.7 = 6.06 rp = bvt / IC = 200 (0.026V)/2.32 ma = 2.24K Page 44

45 AC analysis: Avdss = 1/2 SOLUTION TO EXAMPLE ON PAGE 9 Avdss = ½ gm Rc rp/(1krp) = ½ K 2.24K/3.24K = 61.7 or b Rc (rp 1K) = ½ (200) 2K / (1K2.24K) = 61.7 Voss b Rc Vic = 2Re (b1) (rp 1K) = 400K / (4K(201)3.24K) = CMMR = 61.7 /.496 = 125 Page 45

46 Class Examples Do the DC analysis of this circuit. 9 Find the small signal voltage gain Vout/Vin, Input resistance and output resistance. Beta = 100 VA = infinite Vin 20uA 2.2K Vout

47 Class Examples Beta=100, VA = very large. 1.1 Do the DC analysis of this circuit with Vs=zero. What is Vout (offset voltage)? 1.2. Calculate the voltage gain, Avmid. 1.3 What could be done to reduce the offset voltage and increase the gain at the same time? VCC =10 1.2K 1K Q1 1.2K 2K Q2 Q5 Vs Vin 1K Vout 1K Q3 VEE =10 Q4 4K

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