FDMA1032CZ 20V Complementary PowerTrench MOSFET

Transcription

1 FDMACZ V Complementary PowerTrench MOSFET General Description This device is designed specifically as a single package solution for a DC/DC 'Switching' MOSFET in cellular handset and other ultra-portable applications. It features an independent N-Channel & P-Channel MOSFET with low on-state resistance for minimum conduction losses. The gate charge of each MOSFET is also minimized to allow high frequency switching directly from the controlling device. The MicroFET x package offers exceptional thermal performance for its physical size and is well suited to switching applications. PIN S G D MicroFET x Absolute Maximum Ratings D D G S D Features T A=5 o C unless otherwise noted Q: N-Channel.7 A, V. R DS(ON) = 8 V GS =.5V : P-Channel R DS(ON) = 8 V GS =.5V. A, V. R DS(ON) = 95 V GS =.5V R DS(ON) = V GS =.5V Low profile.8 mm maximum in the new package MicroFET x mm RoHS Compliant Symbol Parameter Q Units V DS Drain-Source Voltage V V GS Gate-Source Voltage ± V Drain Current Continuous (Note a).7. A I D Pulsed S G D July HBM ESD protection level > kv (Note ) Free from halogenated compounds and antimony oxides 5 D G S FDMACZ V Complementary PowerTrench MOSFET P D Power Dissipation for Single Operation (Note a). (Note b).7 T J, T STG Operating and Storage Junction Temperature Range 55 to +5 C Thermal Characteristics R JA Thermal Resistance, Junction-to-Ambient (Note a) 8 (Single Operation) R JA Thermal Resistance, Junction-to-Ambient (Note b) 7 (Single Operation) R JA Thermal Resistance, Junction-to-Ambient (Note c) 9 (Dual Operation) R JA Thermal Resistance, Junction-to-Ambient (Note d) 5 (Dual Operation) Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDMACZ 7 8mm units W C/W Fairchild Semiconductor Corporation FDMACZ Rev B5 (W)

2 Electrical Characteristics T A = 5 C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Off Characteristics BV DSS Drain-Source Breakdown V GS = V, I D = 5 A Q V Voltage V GS = V, I D = 5 A BVDSS T J Breakdown Voltage Temperature Coefficient I D = 5 A, Referenced to 5 C I D = 5 μa, Referenced to 5 C Q 5 mv/ C I DSS Zero Gate Voltage Drain V DS = V, V GS = V Q A Current V DS = V, V GS = V I GSS Gate-Body Leakage V GS = ± V, V DS = V All ± A On Characteristics (Note ) V GS(th) Gate Threshold Voltage V DS = V GS, I D = 5 A V DS = V GS, I D = 5 μa VGS(th) Gate Threshold Voltage I D = 5 A, Referenced to 5 C T J Temperature Coefficient I D = 5 μa, Referenced to 5 C R DS(on) Static Drain-Source V GS =.5 V, I D =.7 A On-Resistance V GS =.5 V, I D =. A V GS =.5 V, I D =.7 A, T J = 5 C V GS =.5V, I D =. A V GS =.5 V, I D =.5 A V GS =.5 V, I D =. A,T J = 5 C g FS Forward Transconductance V DS = V, I D =.7 A V DS = V, I D =. A Dynamic Characteristics C iss Input Capacitance Q V DS = V, V GS = V, f =. MHz Q C oss Output Capacitance Q C rss Reverse Transfer V DS = V, V GS = V, f =. MHz Q Capacitance Switching Characteristics (Note ) t d(on) Turn-On Delay Time Q V DD = V, I D = A, Q t r Turn-On Rise Time V GS =.5 V, R GEN = Q t d(off) Turn-Off Delay Time Q V DD = V, I D = A, t f Turn-Off Fall Time V GS =.5 V, R GEN = Q Q g Total Gate Charge Q Q V DS = V, I D =.7 A, V GS =.5 V Q gs Gate-Source Charge Q Q gd Gate-Drain Charge V DS = V,I D =. A, Q V GS =.5 V Q.... Q Q Q V mv/ C m m S pf pf pf ns ns ns ns nc nc nc FDMACZ V Complementary PowerTrench MOSFET FDMACZ Rev B5 (W)

3 Electrical Characteristics T A = 5 C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Drain Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Source-Drain Diode Forward Current Q V SD Source-Drain Diode Forward V GS = V, I S =. A (Note ) Q Voltage V GS = V, I S =. A (Note ) t rr Q rr Notes: Diode Reverse Recovery Time Diode Reverse Recovery Charge Q I F =.7 A, di F/dt = A/μs I F =. A, di F/dt = A/μs Q Q R JA is determined with the device mounted on a in oz. copper pad on a.5 x.5 in. board of FR- material. R JC is guaranteed by design while R JA is determined by the user's board design. (a) R JA = 8 C/W when mounted on a in pad of oz copper,.5 " x.5 " x. " thick PCB. For single operation. (b) R JA = 7 C/W when mounted on a minimum pad of oz copper. For single operation. (c) R JA = 9 o C/W when mounted on a in pad of oz copper,.5 x.5 x. thick PCB. For dual operation. (d) R JA = 5 o C/W when mounted on a minimum pad of oz copper. For dual operation. a)8 o C/W when mounted on a in pad of oz copper.. Pulse Test : Pulse Width < us, Duty Cycle <.% b)7 o C/W when mounted on a minimum pad of oz copper. c)9 o C/W when mounted on a in pad of oz copper.. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. A V ns nc d)5 o C/W when mounted on a minimum pad of oz copper. FDMACZ V Complementary PowerTrench MOSFET FDMACZ Rev B5 (W)

4 Typical Characteristics Q (N-Channel) I D, DRAIN CURRENT (A) 5 R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE V GS =.5V.5V.V.5V.V.5V V DS, DRAIN-SOURCE VOLTAGE (V) Figure. On-Region Characteristics. I D =.7A V GS =.5V T J, JUNCTION TEMPERATURE ( o C) Figure. On-Resistance Variation with Temperature. R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE R DS(ON), ON-RESISTANCE (OHM) V GS =.V.5V.V.5V.V.5V 5 I D, DRAIN CURRENT (A) Figure. On-Resistance Variation with Drain Current and Gate Voltage. T A = 5 o C T A = 5 o C I D =.85A 8 V GS, GATE TO SOURCE VOLTAGE (V) Figure. On-Resistance Variation with Gate-to-Source Voltage. FDMACZ V Complementary PowerTrench MOSFET I D, DRAIN CURRENT (A) 5 V DS = 5V T A = 5 o C 5 o C -55 o C V GS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. I S, REVERSE DRAIN CURRENT (A).... V GS = V T A = 5 o C 5 o C -55 o C V SD, BODY DIODE FORWARD VOLTAGE (V) Figure. Body Diode Forward Voltage Variation with Source Current and Temperature. FDMACZ Rev B5 (W)

5 Typical Characteristics Q (N-Channel) ID, DRAIN CURRENT (A) V GS, GATE-SOURCE VOLTAGE (V).. 8 I D =.7A V DS = 5V V 5V 8 Q g, GATE CHARGE (nc) Figure 7. Gate Charge Characteristics. RDS(ON) LIMIT VGS =.5V R JA = 7 C/W TA = 5 C s s DC ms ms ms us. VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. CAPACITANCE (pf) P(pk), PEAK TRANSIENT POWER (W) 5 5 C rss C oss 5 5 V DS, DRAIN TO SOURCE VOLTAGE (V) C iss f = MHz V GS = V Figure 8. Capacitance Characteristics. R JA = 7 C/W TA = 5 C.... t, TIME (sec) Figure. Single Pulse Maximum Power Dissipation. FDMACZ V Complementary PowerTrench MOSFET r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE. D = t, TIME (sec) R JA (t) = r(t) * R JA R JA =7 C/W P(pk) t t T J - T A = P * R JA (t) Duty Cycle, D = t / t Figure. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note b. Transient thermal response will change depending on the circuit board design. FDMACZ Rev B5 (W)

6 Typical Characteristics: (P-Channel) -I D, DRAIN CURRENT (A) 5 R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE V GS = 5V.5V.V.5V.V.5V V DS, DRAIN-SOURCE VOLTAGE (V) Figure. On-Region Characteristics. I D = -.A V GS = -.5V T J, JUNCTION TEMPERATURE ( o C) Figure. On-Resistance Variation with Temperature. R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE R DS(ON), ON-RESISTANCE (OHM) V GS = -.V -.5V -.V -.5V -.V -.5V 5 -I D, DRAIN CURRENT (A) Figure. On-Resistance Variation with Drain Current and Gate Voltage T A = 5 o C T A = 5 o C I D = -.55A 8 -V GS, GATE TO SOURCE VOLTAGE (V) Figure 5. On-Resistance Variation with Gate-to-Source Voltage. FDMACZ V Complementary PowerTrench MOSFET -I D, DRAIN CURRENT (A) 5 V DS = -5V T A = 5 o C 5 o C -55 o C V GS, GATE TO SOURCE VOLTAGE (V) -I S, REVERSE DRAIN CURRENT (A).... V GS = V T A = 5 o C 5 o C -55 o C V SD, BODY DIODE FORWARD VOLTAGE (V) Figure. Transfer Characteristics. Figure 7. Body Diode Forward Voltage Variation with Source Current and Temperature. FDMACZ Rev B5 (W)

7 Typical Characteristics: (P-Channel) -V GS, GATE-SOURCE VOLTAGE (V) -I D, DRAIN CURRENT (A) 8.. I D = -.A V DS = -5V -V -5V 8 Q g, GATE CHARGE (nc) Figure 8. Gate Charge Characteristics. R DS(ON) LIMIT V GS = -.5V R JA = 7 o C/W T A = 5 o C ms ms ms s s DC us. -V DS, DRAIN-SOURCE VOLTAGE (V) Figure. Maximum Safe Operating Area. CAPACITANCE (pf) P(pk), PEAK TRANSIENT POWER (W) 8 5 C rss C oss C iss f = MHz V GS = V 8 -V DS, DRAIN TO SOURCE VOLTAGE (V) Figure 9. Capacitance Characteristics. R JA = 7 C/W T A = 5 C.... t, TIME (sec) Figure. Single Pulse Maximum Power Dissipation. FDMACZ V Complementary PowerTrench MOSFET r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE. D = t, TIME (sec) R JA (t) = r(t) * R JA R JA =7 C/W P(pk) t t T J - T A = P * R JA (t) Duty Cycle, D = t / t Figure. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note c. Transient thermal response will change depending on the circuit board design. FDMACZ Rev B5 (W)

8 Dimensional Outline and Pad Layout FDMACZ V Complementary PowerTrench MOSFET Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: FDMACZ Rev B5 (W)

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Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I8 FDMACZ Rev B5 (W)

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