DE N21A RF Power MOSFET

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1 DE375-51N21A N-Channel Enhancement Mode Low Q g and R g High dv/dt Nanosecond Switching 5MHz Maximum Frequency Symbol Test Conditions Maximum Ratings V DSS T J = 25 C to C 5 V V DGR T J = 25 C to C; R GS = 1 MΩ 5 V V GS Continuous ±2 V V GSM Transient ±3 V I D25 T c = 25 C 25 A I DM T c = 25 C, pulse width limited by T JM A I AR T c = 25 C 21 A E AR T c = 25 C 3 mj dv/dt I S I DM, di/dt 1A/µs, V DD V DSS, T j C, R G =.2Ω 5 V/ns I S = >2 V/ns P DC 94 W P DHS T c = 25 C Derate 3.7W/ C above 25 C 425 W P DAMB T c = 25 C 4.5 W R thjc.16 C/W R thjhs.36 C/W Symbol Test Conditions Characteristic Values T J = 25 C unless otherwise specified min. typ. max. V DSS V GS = V, I D = 3 ma 5 V V GS(th) V DS = V GS, I D = 25 µa V I GSS V GS = ±2 V DC, V DS = ±1 na I DSS V DS =.8 V DSS T J = 25 C V GS = T J = 125 C R DS(on) V GS = V, I D =.5I D25 Pulse test, t 3µS, duty cycle d 2% 5 1 µa ma.35 Ω g fs V DS = 1 V, I D =.5I D25, pulse test S T J C T JM 175 C T stg C T L 1.6mm (.63 in) from case for 1 s 3 C Weight 3 g GATE SG1 Features V DSS = 5 V I D25 = 25 A R DS(on) =.35 Ω P DC = 94 W SG2 Isolated Substrate high isolation voltage (>25V) excellent thermal transfer Increased temperature and power cycling capability IXYS advanced low Q g process Low gate charge and capacitances easier to drive faster switching Low R DS(on) Very low insertion inductance (<2nH) No beryllium oxide (BeO) or other hazardous materials Advantages SD1 SD2 DRAIN Optimized for RF and high speed switching at frequencies to 5MHz Easy to mount no insulators needed High power density

2 Symbol Test Conditions Characteristic Values (T J = 25 C unless otherwise specified) DE375-51N21A min. typ. max. R G.3 Ω C iss 25 pf C oss V GS = V, V DS =.8 V DSS(max), f = 1 MHz 17 pf C rss 46 pf C stray Back Metal to any Pin 33 pf T d(on) 5 ns T on V GS = V, V DS =.8 V DSS 3 ns I D =.5 I DM T d(off) R G =.2 Ω (External) 5 ns T off 8 ns Q g(on) 7 nc Q gs V GS = 1 V, V DS =.5 V DSS I D =.5 I D25 18 nc Q gd 4 nc -Drain Diode Characteristic Values (T J = 25 C unless otherwise specified) Symbol Test Conditions min. typ. max. I S V GS = V 21 A I SM Repetitive; pulse width limited by T JM A V SD I F = I S, V GS = V, 1.5 V Pulse test, t 3 µs, duty cycle 2% T rr 2 ns Q RM I F = I S, -di/dt = 1A/µs, V R = 1V.6 µc I RM A CAUTION: Operation at or above the Maximum Ratings values may impact device reliability or cause permanent damage to the device. Information in this document is believed to be accurate and reliable. IXYSRF reserves the right to make changes to information published in this document at any time and without notice. For detailed device mounting and installation instructions, see the Device Installation & Mounting Instructions technical note on the IXYSRF web site at; IXYS RF reserves the right to change limits, test conditions and dimensions. IXYS RF MOSFETS are covered by one or more of the following U.S. patents: 4,835,592 4,86,72 4,881,16 4,891,686 4,931,844 5,17,58 5,34,796 5,49,961 5,63,37 5,187,117 5,237,481 5,486,7 5,381,25 5,64,

3 Fig. 1 Typical Transfer Characteristics V DS = 1V, PW = 4uS Fig. 2 DE375-51N21A Typical Output Characteristics ID, Drain Current (A) ID, Drain Currnet (A) 3 Top Bottom 1V 9V 8.5V 8V 7.5V 7V 6.5V 6V Fig. 3 Gate-to- Voltage (V) V GS, Gate-to Voltage (V) Gate Charge vs. Gate-to- Voltage V DS = 25V, I D = 12.5A Gate Charge (nc) Fig. 4 ID, Drain Currnet (A) Top Bottom V DS, Drain-to- Voltage Extended Typical Output Characteristics 1V 9V 8.5V 8V 7.5V 7V 6.5V 6V V DS, Drain-to- Voltage (V) Fig. 5 1 VDS vs. Capacitance Ciss Capacitance (pf) Coss Crss VDS Voltage

4 DE375-51N21A Fig. 6 Package Drawing Gate Drain

5 51N21A DE-SERIES SPICE Model The DE-SERIES SPICE Model is illustrated in Figure 7. The model is an expansion of the SPICE level 3 MOSFET model. It includes the stray inductive terms L G, L S and L D. Rd is the R DS(ON) of the device, Rds is the resistive leakage term. The output capacitance, C OSS, and reverse transfer capacitance, C RSS are modeled with reversed biased diodes. This provides a varactor type response necessary for a high power device model. The turn on delay and the turn off delay are adjusted via Ron and Roff. DE375-51N21A Figure 7 DE-SERIES SPICE Model This SPICE model may be downloaded as a text file from the IXYSRF web site at Net List:.SUBCKT 51N21A * TERMINALS: D G S * 5 Volt 21 Amp.35 ohm N-Channel Power MOSFET * REV.A M DMOS L=1U W=1U RON DON 6 2 D1 ROF DOF 2 7 D1 D1CRS 2 8 D2 D2CRS 1 8 D2 CGS N RD DCOS 3 1 D3 RDS MEG LS 3 3.5N LD 1 4 1N LG 2 5 1N.MODEL DMOS NMOS (LEVEL=3 VTO=3. KP=3.8).MODEL D1 D (IS=.5F CJO=1P BV=1 M=.5 VJ=.6 TT=1N).MODEL D2 D (IS=.5F CJO=4P BV=5 M=.4 VJ=.6 TT=4N RS=1M).MODEL D3 D (IS=.5F CJO=9P BV=5 M=.3 VJ=.4 TT=4N RS=1M).ENDS Doc #92-25 Rev 6 29 IXYS RF An IXYS Company 241 Research Blvd., Suite 18 Fort Collins, CO USA Fax: sales@ixyscolorado.com Web:

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