Figure 1. Active Resonant Commutated Pole Converter (ARCP) Figure 2. Equivalent ARCP Circuit

Transcription

1 Achieving ZVS in a Two Quadran Converer Using a Simplified Auxiliary Circui wih Novel Conrol Doudousakis, T. and Sirio, C. Lee P.E. TDK-Lambda, Low Power Division Absrac- This paper proposes a new sof-swiching scheme as well as a novel conrol approach for a wo quadran converer. The auxiliary engine uilizes a simple archiecure consising of pair of swiches, an inducor and several diodes o provide he necessary characerisic. We propose a simple wo-quadran curren feedback scheme ha adjuss he auxiliary swich on-imes appropriaely o minimize conducion losses, hus achieving ZVS in boh quadrans from maximum negaive o maximum posiive load. Dead-ime is fixed bu conducion ime of he auxiliary swiches occurring wihin he dead-ime is variable wih load. A brief survey of various convenional echniques is also presened. PSIM simulaions for he proposed model as well as a unique MahCAD analysis of he various saes along wih empirical daa are provided. I. INTRODUCTION Generally, for applicaions involving a 2-quadran drive, zero volage swiching (ZVS) is achieved by he use of an Acive Resonan Commuaed Pole Converer [1] or any of is varians [2-7]. The basic concep of his converer is shown in Figs 1 and 2. Essenially, auxiliary swiches SX1 and SX2 provide a resonan charge and discharge of he wo main swiches hrough Lx in order o achieve he desired ZVS characerisic. This is necessary in order o overcome any freewheeling curren ha is normally direced o he ani-parallel body diodes associaed wih he main swich MOSFETS. Figure 1. Acive Resonan Commuaed Pole Converer (ARCP) Such a circui is no only advanageous from an efficiency sandpoin, bu is also excellen from a noise perspecive. This is due o he fac ha his resonan circui pracically eliminaes he reverse recovery issue ha is associaed wih he main swich body diodes. In order o explore how his issue arises in a hard swiched converer, le s ake he case when he load curren is posiive, or in he direcion shown in he arrow in Fig. 1, saring wih he high side swich in he on-sae. Once his high swich urns off, assuming he curren is high enough, he MOSFET oupu capaciances discharge o zero and he low side swich s ani-parallel body diode resumes full load conducion during he subsequen deadime. Ineresingly depending on he load, he lower MOSFET may urn on under a ZVS condiion. Afer he dead-ime ends, he lower MOSFET urns on and shuns he load curren flowing hrough is body diode. Evenually he lower MOSFET urns off and he load curren resumes back ino is body diode once again. So far here is no issue of course unil his paricular deadime inerval ends and he upper MOSFET urns on. Here he upper MOSFET urns on hard and forces he body diode of he lower MOSFET o urn off sharply. Depending on he size of he load, and he ype of MOSFET used, here may be a significan body diode recovery loss. Also, if he MOSFETS are large, he oupu capaciances will be significan and here will be high peak charging currens as well. Apar from risk of damage of he lower MOSFET s body diode, he resuling curren spike and exra hea dissipaion could prove faal in a low noise, high efficiency requiremen. To sum up, if he inducor curren is posiive (buck or mooring phase ), he boom MOSFET body diode freewheels during he dead-ime and exhibis recovery loss once he op MOSFET urns on. Conversely if he curren is away from he load, or negaive (boos or regeneraive phase ), he op MOSFET body diode freewheels wih recovery loss upon urn on of he boom MOSFET. The purpose of he auxiliary circui is o sofly redirec his freewheeling or load curren away from he body diodes and owards he auxiliary swiches during he dead-imes o such an exen ha he volage seen across hese main swiches is zero righ before urn on. Here we relieve he curren flowing hrough eiher MOSFET body diode as well as o sufficienly charge or discharge he respecive MOSFET oupu capaciances prior o urn on. A spli volage in he convenional ARCP is necessary o sufficienly rese he snubber inducor during he main swich conducion inerval. I is imporan o ensure rese of his snubber inducor o minimize he losses incurred in he auxiliary FETS which is a requiremen for hese devices o achieve ZCS (zero curren swiching). Ideally, snubber losses are mainly incurred during he commuaion inerval. This echnique, as eviden in Fig. 1, consiss of wo series capaciors, a resonan inducor as well as a 4-quadran swich. Here, complexiy is an issue when aking ino accoun he required conrol and drive circuiry as well. Figure 2. Equivalen ARCP Circui

2 Main swich S1 is hen commanded o urn on under a zero volage condiion. A shor period of ime laer, Sx1 urns off and he coupled inducor,, freewheels hrough Dx1 agains a rese volage provided by he coupled winding. Figure 3. ARCP Timing Waveform II. COUPLED INDUCTOR A popular variaion of he ARCP, called he coupled inducor approach is shown in Fig. 4 [8]. Though he snubber choke is more complicaed, overall complexiy is somewha reduced relaive o he convenional ARCP scheme. This approach uses a simpler and more convenional auxiliary FET drive scheme. The fourquadran swich and spli capaciors are replaced wih a wo-quadran swich, a slighly more complicaed choke and a pair of diodes. Thus he drive complexiy for his opology is significanly reduced. Resonan inducor rese is provided wih he help of he coupled winding hrough diodes DX1 and DX2. The drawback here is ha for a urns raio of 1:1, he effecive source volage for he resonan circui is ½ of. Thus i is required here o boos he resonan choke curren o a level equal o he load curren prior o urn off of he main swich. I also generally requires variable iming conrol in order o minimize he losses a ligh load. To remedy his, here is a echnique ha uses fixed iming conrol however wih a non-uniy urns raio [9]. Here, Sx1 and Sx2 are respecively commuaed during alernae dead imes. When Sx1 is acivaed in he mooring or buck phase, he snubber choke curren, I (lsnub), is charged o he exen ha he D2 curren, or load curren is supplied hrough he Sx1--T1-D2 pah. This evenually urns D2 off and subsequenly charges C1 and C2 resonanly o he poin where D1 conducs. Figure 4. Coupled Inducor Approach Assuming we re sill in he buck phase, during he nex deadime inerval, Sx2 urns on and resonanly discharges C1 and C2 o he exen ha node B in Fig. 4 clamps o zero via D2 before main swich S2 is commanded on. I is imporan o noe here ha he load curren has he endency o freewheel ino he boom MOSFET body diode and hus helps in discharging node B as well. This is one reason for he asymmery associaed wih he resonan inducor curren waveform. In essence, Sx2 provides help o he load in order o achieve ZVS of he boom swich in buck mode. Thus, he auxiliary swich SX2 does more work a no load raher han full load. I is imporan o noe ha he discharge pah here is C1/C2-T1--Sx2. The regeneraive mode is an enirely differen case. Here he load curren is negaive and flows ino he swiches as shown by he arrow in Fig. 4. The supply in his mode behaves as a boos converer where he S2 acs as a swich and S1 a boos diode. In a programmable supply, he load curren may be negaive during quick oupu volage down-programming due o he discharge of he oupu capaciance. In fac, his is ypical for a medical ulrasound produc. Here, his oupu capaciance can be on he order of 65uF wih a required oupu slew of 2V o wihin 1mS. However his is considered a ransien condiion and ZVS may no be necessary in his mode. This would preclude he use of auxiliary swich, SX2 alogeher. However, in DC moor applicaions ha require regeneraive braking, he moor behaves as an elecric generaor. In his case kineic energy is convered ino elecrical energy and ransferred back ino he supply bus. Thus he curren hrough he oupu inducor is clearly negaive or owards he main swiches in he seady-sae. I is ineresing o noe ha in his case he load curren isn helping he auxiliary swich Sx2 o achieve ZVS of he boom swich as was rue in he former case. Auxiliary swich Sx2 mus do significanly more work in his mode. Therefore he iming conrol logic for regeneraive mode mus ake his ino accoun. III. SINGLE INDUCTOR APPROACH An even simpler approach shown in Fig. 5 which has been proposed in moor drive applicaions [1] uilizes a single inducor and wo auxiliary swiches. This approach overcomes he complex choke used in he previous approach. The auxiliary swiches work in he same fashion as before however rese of he resonan inducor, n, is achieved hrough he body diodes of he auxiliary MOSFETS. The only disadvanage for his approach is he derimenal effec associaed wih he auxiliary MOSFET oupu capaciances. Here, simulaions show ha his capaciance can cause significan residual curren in he auxiliary MOSFET body diodes due o insufficien rese of he resonan choke. The PSIM

3 simulaion shown below illusraes his effec wih a auxiliary MOSFET capaciance of only 4pF each. Depending on he applicaion, his may no be an issue however he ZCS naure of he auxiliary circui is los resuling in higher noise and loss. For moor drive applicaions his is likely no an issue however. Fig. 6 shows a PSIM simulaion of Fig. 5. The op plo in Fig. 6 shows he snubber choke curren. Here we see a residual curren of roughly 5 Amps ino each auxiliary swich due o insufficien rese. Here his curren can flow hroughou he enire conducion ime of he main swiches since here is no longer a volage drop across he snubber choke o allow any addiional rese. The middle plo shows he source volage of he main swich S1 (wih ZVS) and he boom plo shows he conrol signals for all four MOSFETS. Vhigh and Vlow are he main swich logic signals and Vsnhigh and Vsnlow are he auxiliary swich conrol signals. Figure 5. Single Inducor Approach IV. PROPOSED APPROACH A simple echnique, and he one proposed in his paper, overcomes he ill effecs of he single inducor approach discussed previously. This circui shown in Fig. 7 appears Figure 7. Proposed Approach For he example cied in his paper, his converer s inpu is fixed a 34V wih an oupu volage programmable volage range of 3V o 21V. No shown in he above figure is he converer s oupu filer. o be a good compromise beween he coupled inducor approach and single inducor approach. Here we sill use he single inducor, as in he former case, bu also use diodes D1- D4 as well. The advanage is near perfec rese of he resonan inducor while mainaining simpliciy of design. The circui behaves similarly o he previous approach however he rese mechanism for is direcly hrough D1 and D2. Here we do no have he benefi of a rese volage as before wih T1 in he coupled inducor approach during he main swich on imes. I is ineresing o noe ha righ afer urn off of eiher of he auxiliary swiches, he resonan choke curren, In, rapidly ramps down owards zero hrough naural inducive kickback. Here, he full rail volage,, is impressed across he resonan choke during his inerval. To ge an idea of he benefi of his circui, we will explore he operaion during resonan charge of he main swiches as well as resonan discharge as shown in Fig. 8. The op race in he figure is he source volage of he op main swich, S1 (wih perfec ZVS). The second race represens main and auxiliary swich iming signals wih Figure 6. PSIM of Single Inducor Approach Noe: The waveforms in he figure show perfec ZVS (Vca). However i also shows he ill effec of insufficien rese in he auxiliary choke IL(snub). This curren flows hrough he auxiliary FET body diodes and in his paricular case is as high as 5A. The condiions of his simulaion are as follows: Vou=25V; Iload=5A, =34V, C1 and C2=4pF; =6uH, d=74%.

4 Figure 8. PSIM of Proposed Design Noe: The circled regions show he rise or fall of he of he snubber choke volage righ afer he snubber curren crosses Zero. A capaciance presen a Vsnchoke will slow his rise and fall o he exen ha a non-zero curren exiss in he choke hroughou he enire aux swich conducion inerval. Vhigh and Vlow represening he main swiches and Vsnhigh and Vsnlow he auxiliary swiches as before. The hird race represens he snubber choke curren IL(snubb) and he fourh race shows he source volage of he op aux FET and he drain volage of he boom aux FET. Finally, he las race shows he snubber choke drive poin or he cahode of D3. We sar wih he boom swich, S2, in he on sae in buck mode. Once S2 urns off, is body diode akes over and conducs he full load curren. The op aux FET hen urns on and akes over by supplying he full load curren hrough n. Body diode of S2 now urns off allowing he main swiches o resonanly charge owards he inpu rail. Evenually he body diode of S1 conducs wih he main swich S1 urning on shorly hereafer wih ZVS. The op aux FET now urns off and reses. Is oupu capaciance is discharged hrough D3 during rese and is clamped by D2. The resonan choke curren hus reses rapidly owards ground. Once he curren goes o zero here is no energy lef in he choke so i naurally wans o rise owards insanly (noe he circled regions in Fig. 8 correlaed wih he aux FET volages in he preceding race). This is no exacly possible due o he parasiic capaciances of D1, D2, D3 and D4. The capaciances are relaively small and i is ineresing o noe ha he large op and boom aux FET oupu capaciances have now been successfully decoupled from he circui. The effec is near perfec rese of he resonan choke. On he oher hand, a large capaciance presen across D1 and D2 would resul in a significan residual curren in he aux FETS. This of course would be equivalen o he circui in Fig. 5, and would resul in unnecessary conducion loss. This is why i s necessary o isolae he auxiliary MOSFET oupu capaciances. Here he MOSFET oupu capaciors are effecively blocked by D3 and D4 during he poins of ineres. Noneheless, i should be noed ha even wih very low effecive capaciance of D1 and D2, we sill do no have perfec rese due o he parasiic capaciance of he diodes. Our simulaion model assumes ha his capaciance is 1pF per diode. Condiions for he simulaion are as follows: Vou=25V; Iload=5A, =34V, C1 and C2=4pF (Cres=8Kpf); =6uH, d=74%. Juncion capaciance of D1 and D2=1pF. Aux1 and Aux 2 MOSFET oupu capaciance=4pf. Noe he command logic for he following swiches: Vlow=S2; Vhigh=S1; Vsnhigh=Aux_h; Vsnlow=Aux_low. V. RELEVANT EQUATIONS In order o deermine he various expressions ha govern he proposed circui, we mus undersand he various saes of operaion. Here we assume buck mode and deermine ha here are a oal of six saes. Before we proceed wih analyzing hese saes, he following equaions (1-3) apply. L_snubber = n. In=/Zo (1) (2) wr := Zo := 1 L_snubber C_res L_snubber C_res (3)

5 For he firs inerval, we sar ou wih high side swich, S1, urning off and wih body diode D2 subsequenly conducing full load curren a he commencemen of he dead-ime inerval. Low side swich, S2, hen urns on. Afer he S2 conducion ime expires, he body diode of S2 again conducs he load. A his momen auxiliary swich, aux_h, urns on. This inerval ends when he D2 curren goes o zero hereby allowing he drive o charge. The duraion of his ime is shown in (4). Here we assume ha he recovery curren is negligible. < < 1 1 := Iload L_snubber The nex inerval begins a ime 1. This is where he capaciors, C1 and C2 resonanly charge owards he inpu rail,. A he end of his inerval, he body diode of he op MOSFET should clamp wih a peak curren of Ipk ino as given in (1). The ime duraion of his inerval is given in (5) wih (6) represening he volage on he main swiches and (7) represening he curren hrough he resonan choke. (4) full load curren in addiion o he resonan curren needed o charge he main swiches. This curren decreases linearly wih ime unil i reaches zero. The nex inerval begins a he end of he op main swich conducion cycle, or a d*tsw. A his momen we resonanly discharge he main swich oupu capaciances hrough he boom auxiliary swich. Expression (9) quanifies he minimum on-ime necessary for he boom auxiliary swich o achieve perfec ZVS. The expression wihin he parenhesis in (9) is he main swich volage, Vc(). As expeced, his on-ime is inversely relaed o load curren. The more load we have he lower he onime requiremen for his swich. Also noe ha (9) uses a MahCAD roo funcion (wih an iniial guess value of.1 us we le MahCAD solve). The resonan choke curren in his inerval goes negaive and is expressed in (1). Noe ha i does no conain load curren as i had in (7) which explains he asymmery. Noe ha (9) is a simplificaion (see end of secion VII). dtsw < < dtsw 23 1 < < := 1 wr asin In C_res L_snubber (5) 23 := roo cos( wr d) Iload C_res d, d (9) L_sn In cos[ wr ( 1) ] C_res (6) In sin[ wr ( dtsw) ] (1) In sin[ wr ( 1) ] Iload The nex inerval begins a This is he ideal momen o urn on high-side main swich in order o obain ZVS. This is also good ime o urn off he highside auxiliary swich in order o allow for he rese of he resonan choke. I should be noed ha he value of 1 12 is dependan on several parameers such as load curren, resonan capaciance, inpu volage and resonan inducance. However, he load curren is he only parameer ha is expeced o vary. All oher parameers can be reaed as consans in deermining he precise momen of when o urn on he op main swich. The main swich volage a 1 12 is all he way up o d*tsw (full high-side conducion inerval). Vc () is defined as he main swich drive poin, d as he duy cycle and Tsw he swiching period. Addiionally, he resonan choke curren is expressed in (8) below. As can be observed in (8), he resonan choke mus supply he 1 12 < < dtsw In sin[ wr ( 12) ] Iload ( 1 12) L_sn (7) (8) The final inerval begins when he boom main swich urns on. The opimal ime for his o happen is d*tsw 23 and should las unil Tsw. Here Vc() = and he resonan choke curren, IL() ramps down o zero via he inpu rail,. VI. MATHCAD SIMULATION A convenien way of capuring all of he equaions is o consruc a MahCAD condiional if array for boh he main swich drive poin (11) and he resonan choke curren (12). From hese expressions, single cycle plos can easily be obained (Ild=Iload, Cr=Cres). The plos are shown in Figs 9 and 1 wih =34V, L_s=6uH, Cr=8pF, Vo=25V (d=74%), Iload=5A (same condiions used in PSIM simulaion in Fig. 8). Noe ha (11) and (12) conain MahCAD saemens ha accoun for he diode clamping effec of he resonan choke curren as well as he resonan volage clamping above and below ground. Noe he very good correlaion beween he MahCAD plos and he PSIM simulaion. This mehod proves o be an exremely fas and ineracive way of seeing how load curren, or any oher relevan parameer, can affec he resul. Noe he excellen correlaion of Figs 9 and 1 wih he PSIM resul shown in Fig. 8.

6 Vc := () if < < 1 In cos[ wr ( 1) ] Cr if 1 < < 1 12 if In sin[ wr ( 1) ] > if Cr 1 < < 1 12 if In sin[ wr ( 1) ] < Cr if ( 1 12) < < dt ILd cos[ wr ( dt) ] ( dt) Cr if dt < < dt 23 if > dt 23 (11) Vc( ) Figure 11. Non perfec case: This signal represens (11) wih Ta_H (25nS) < 112 and Ta_L (15nS) < 23. Thus he main swiches urn on premaurely. Tsw Vo 23 Vc( ) Figure 9. MahCad of Main Swih Volage Noe he resonan charge of he main swich volage. The discharge is aided by he load curren when in buck mode. We have perfec ZVS. IL() := 5 if < < 1 In sin[ wr ( 1) ] ILd if 1 < < 1 12 In sin[ wr ( 12) ] ILd ( 1 12) if 1 12 < < dt if ( 1 12) > In sin[ wr ( 12) ] ILd if 1 12 < < dt In sin[ wr ( dt) ] if dt < < dt 23 ( dt 23) In sin[ wr ( 23) ] if dt 23 < < T 1 12 if ( dt 23) > In sin[ wr ( 23) ] Tsw Vo 23 (12) VII. PROPOSED CONTROL LOGIC There has been a significan amoun of research done on ZVS conrol. For example here is fixed dead-ime conrol [11] and variable conrol [12] among ohers [13]. The mehod proposed here uilizes a fixed dead-ime however wih variable auxiliary swich on-ime ha is keyed o load curren as shown in Fig. 12. The echnique presened here works in boh quadrans. To sar wih our conrol logic, we wrie he expressions, (13) and (14), o deermine he auxiliary swich on-imes and plo hose agains load curren for boh negaive and posiive load as shown in Fig. 12. Once again we use condiional if saemens o deermine he aux on-imes. Quadran II on-imes (negaive load case) are simply mirror images of he quadran I expressions (4), (5) and (9). These curves will be useful in deermining he conrol logic iming for he auxiliary swiches. Thus we will need circuiry ha is keyed o he oupu load curren via he relaionship shown in he Fig. 12. We mus ensure ha he on-imes of he respecive auxiliary swiches sar a he same poin a zero load and move in he direcion shown in he figure. We also need o ensure ha, a maximum load, here s enough ZVS pulse-widh o accommodae he maximum aux swich on-ime requiremens shown in Fig. 12. A summary of he conrol logic diagram and waveforms are shown in Fig. s 13 and 14. IL( ) Tsw Vo Iload amp Figure 1. Resonan choke curren-ideal case (perfec ZVS). TauxL( Iload) := 1( Iload) 12 if Iload < Iload roo cos( wr d) C_res d, d TauxH( Iload) := 1( Iload) 12 if Iload Iload roo cos( wr d) C_res d, d if (13) if Iload Iload < (14)

7 Boom Main Q Gae η Top Main Q Gae TauxH 6. 1 ( Iload ) 7 Fixed dead-ime TauxL ( Iload ) Fixed dead-ime Iload 1 η Ramp 1 Load Curren Max () Load Zero Load Max (- )Load Figure 12. Opimum Auxiliary Swich On-imes Ramp 2 In Fig. 12 we show he required on-imes for each auxiliary swich for boh posiive and negaive load currens in order o achieve ZVS. As expeced, a zero load, boh swiches have he same on-ime requiremen. This is due o he fac ha here is no load curren o skew he symmery. Wih negaive load, he op main swich is clamped o he rail by he load curren hus requiring more work for he boom aux swich. A posiive load, he boom main swich is clamped o zero requiring he op aux swich o do more work. A conrol block diagram is shown in Fig. 13. The curren amplifier shown is inended o deec posiive or negaive load curren. The oupu swing should be limied o /-5V for full scale load variaion. The purpose of he offse, whose level should equal o he maximum negaive value of he curren amplifier oupu, is o shif his signal appropriaely such ha he comparaors always see posiive volage. Again, he circui mus ensure ha he requisie ZVS pulse widh is achieved a maximum load. Load Curren 15V GAIN -15V CONTROL BLOCK DIAGRAM OFFSET Figure 13. Proposed Conrol Block Aux High Gae The iming waveforms necessary for ZVS are shown in Fig. 14 below. The load curren signal shown here incorporaes he offse shown in Fig. 12. Thus a zero load his signal should be cenered beween ramps 1 and 2. The size of hese ramps should depend on he resuls obained in (13) and (14). Noe ha he auxiliary swiches urn off righ before eiher he op or boom main swich acivaes o preven he main swich drive poin from resonanly riding away from he ZVS condiion. The proposed analog conrol logic represened in Figs 13 and 14 will reasonably approximae he curves generaed Ramp 1 Ramp Aux Low Gae Aux High gae Aux Low Gae Figure 14. ZVS Timing Waveforms in Fig. 12. The zero load on-imes of he respecive aux swiches is = (Ton Max- Ton Min)/2 or 45nS. This is slighly skewed from he ideal value of 38nS given in he figure. I should be noed ha he on ime curves appear o asympoically approach a finie value a he low end. This is because he roo calculaion in (9) assumes he load curren and he aux swich discharges he main swiches righ a he sar of he dead-ime. Therefore his value represens how long i will ake for he main swich volage o reach zero wih he load curren and aux swich working simulaneously. This is somewha differen han wha he acual case will be. Here, he load curren discharges he main swiches prior o acivaion of he aux swich (see iming in fig. 14). A small ime laer he aux swich will urn on and help o load in providing ZVS. Thus conrary o he curves shown in fig. 12, i s conceivable ha wih high enough load curren he eiher aux swich on ime requiremen reaches zero. VIII. EXPERIMENTAL RESULTS We will compare a MahCad simulaion run wih an oupu seing of 3V wih a 7A load agains acual values. This is he low end of he operaional range of our wo quadran converer (3V -21V/ 21W max). This se-poin also illusraes he maximum benefi ha is obained wih his ZVS concep since he respecive MOSFET currens will be a heir highes levels in his design. Condiions for he MahCad simulaion are as follows: Vou=3V; Iload=7A, =3V, Cres=15pF; =6uH, d=8.8%. IL( ) Figure 15. Resonan Inducor Curren 1 amp 5 amp

8 1 12 Vc( ) Figure 16. Main Swich Drive Poin Noe: MahCad resuls: 112=237nS; 23=73nS. The following represens a scope waveform of boh (11) and (12) under he same condiions as lised in he previous MahCad simulaion. I should be noed ha he MOSFETS used in all cases is he Fairchild FQA24N5F. Noe he excellen correlaion beween calculaed and empirical daa. Figure 19-Relevan ZVS Waveforms Vou=3V; Iload=6A, =3V, Cres=15pF; =6uH, d=8.8%. Channel 1 (whie race) represens he main swich drive poin. Channel 4 (blue race) is he resonan drive poin. Channel 3 (red race) is he op main swich curren a 1A/Vol and Channel 2 (green race) represens he ZVS choke curren a 1A/Vol. Noe he wider gap beween he ZVS and main swich drive poins due o he higher load. The nex plo is an efficiency curve which compares ZVS agains non-zvs operaion. A he higher curren he efficiency difference becomes very significan. The oal difference a maximum load approaches 14% which in his design would represen a difference of 75 Was. Here our inpu is again 34V; Cres=15pF and =6uH. I should be noed ha he efficiency is generally low since we are operaing a 3V wih 34V supply. Efficiency of 3V, 21W Supply wih and wihou ZVS 8% 7% 6% 5% Figure 17-Acual Resul Top race = Resonan Inducor Curren 1A/Vol; Boom race = Main Swich Drive Poin. Noe also ha 12 in he above phoo appears o be roughly 25nS which is wihin 6% of he calculaion of 237nS. The op race curren appears o peak ou a 1A in he posiive direcion and 3A in he negaive direcion. This converges exremely well o he simulaions of figs 15 and 16. Efficiency 4% 3% 2% 1% % Oupu Curren (amps) Eff w/ ZVS Eff w/o ZVS Dela In addiion, he nex wo phoos shown in Figs 19 and 2 illusrae he operaion of he circui wih variaion in load. Figure 2-Efficiency vs. Load IX. CONCLUSION Figure 18-Relevan ZVS Waveforms Vou=3V; Iload=3A, =3V, Cres=15pF; =6uH, d=8.8%. Channel 1 (whie race) represens he main swich drive poin. Channel 4 (blue race) is he resonan drive poin. Channel 3 (red race) is he op main swich curren a 1A/Vol and Channel 2 (green race) represens he ZVS choke curren a 1A/Vol. A simple archiecure which provides ZVS in a 2- quadran drive was proposed. The new scheme provides simpliciy of design over he more convenional approach in order o achieve ZVS. Near perfec rese of he resonan choke is also accomplished wih he simple addiion of several diodes. Simulaions were done using PSIM and MahCad sofware which generaed very similar resuls. Empirical daa was also obained which confirmed wih very good accuracy a previous MahCad simulaion. Addiional phoographs were included o illusrae he ZVS mechanism along wih relevan currens a differen load levels. Finally, efficiency was benchmarked agains a non ZVS supply and he resuls appear very promising.

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