2.4GHZ CMOS WLAN / BT DUAL-MODE RFEIC WITH PA, LNA & SP3T

Transcription

1 2.4GHZ CMOS WLAN / BT DUAL-MODE RFEIC WITH PA, LNA & SP3T ANT DESCRIPTION DET VMODE RFX8425 is a pure CMOS-based, single-chip/single-die RFeIC (RF Front-end Integrated Circuit) that incorporates all key RF functionality needed for implementing high-performance RF front-end for WLAN IEEE b/g/n and OFDM/256QAM operation in the 2.4GHz band. The RFX8425 architecture integrates a high-efficiency high-linearity power amplifier (PA) with harmonic filter, a directional coupler based power detector, a low noise amplifier (LNA), an SP3T switch for Bluetooth antenna sharing, and an additional SPDT switch for selection between LNA and Bypass in Receive mode. All the impedance matching components and DC-block capacitors are also integrated to minimize the PCB footprint for system implementation. 4 5 TX PA_EN RX 9 LNA_EN RFX8425 is assembled in an ultra-compact, low-profile 2.3x2.3x0.45mm 16L QFN package. It has simple and low-voltage CMOS control logic, and requires minimal external components. Designed to work in the V voltage range, the RFX8425 is ideal RF front-end solution for implementing 2.4GHz WLAN/BT in PC clients, tablets, and many other mobile platforms including smartphones that have a PMIC available to provide the required supply voltage for the RF front-end. FEATURES APPLICATIONS Combines b/g/n/ac and Bluetooth applications High linearity PA for b/g/n/ac WLAN Low Noise Figure WLAN Receive LNA with Bypass for Near Range Operation Built in directional coupler based output power detector ESD Protection Circuitry on All Ports DC decoupled RF Ports and / RF Isolation 2.3x2.3x0.45mm Small Outline 16L QFN Package with Exposed Ground Pad Smartphones, Feature Phones and MIDs with WLAN/Bluetooth WLAN/Bluetooth Platforms Requiring Shared Antenna Laptop / Netbook / Smartbook with Embedded WiFi & Bluetooth Portable Platforms with Integrated b/g/n and Bluetooth RoHS and REACH Compliant 1

2 PACKAGE PIN OUT AND PIN DESCRIPTION ANT DET 1 12 VMODE LNA_EN TX PA_EN RX (Top See-Through View) Pin Number Pin Name Description 1 DET PA Power Detector Output Voltage 2 VMODE CMOS Logic Control Used for PA Mode Control in Rome Platform; Unused for Rhino Platform. 4, 10 DC Voltage Supply 5 TX WLAN TX Signal Port from the Transceiver; DC Shorted to 6 PA_EN CMOS Logic Control to Enable WLAN Transmit 8 RX WLAN RX Signal Port to the Transceiver/BT Port; DC Shorted to 9 LNA_EN CMOS Logic Control to Enable LNA 3, 11, 13, 15 Not Connected Internally. Can be Grounded or Left Open 7, 12, 14, 17 Ground Must be Connected to Ground in the Application Circuit 16 ANT RF Signal Port to/from the Antenna: DC Shorted to 2

3 ABSOLUTE MAXIMUM RATINGS Parameters Unit Min. Max. Conditions DC Voltage Supply V All Pins DC Control Pin Voltage V All Control Pins DC current consumption ma 350 PA_EN = High TX RF Input Power dbm +10 ANT RF Input Power dbm +20 Bypass Mode Junction Temperature o C 150 Operating Ambient Temperature o C Storage Ambient Temperature o C Appropriate care required according to JEDEC Standards Note: Sustained operation at or above the Absolute Maximum Ratings for any single or combinations of the above parameters may result in permanent damage to the device and is not recommended. All Maximum RF Input Power Ratings assume 50-Ohm terminal impedance. NOMINAL OPERATING CONDITIONS Parameters Unit Min Typ Max Conditions Voltage Supply (Note 1) V All Pins RF Port Impedance 50 Single-Ended Control Voltage High (Note 2) V Control Voltage Low V Control Pin Current A 1 Shutdown Current A 6 PA_EN = Low, LNA_EN = Low PA Turn On/Off Time µs 0.4 LNA Turn On/Off Time µs 0.4 jc (Note 3) ja o C/W 29 o C/W 45 Note 1: For normal operation of the RFX8425, must be continuously applied to all supply pins. Note 2: If control voltage can exceed 2.0V, a 1KΩ 10KΩ series resistor is recommended for the application circuit on each control line. Note 3: Thermal measurements were performed on an RFaxis test EVB under typical use conditions. Please contact RFaxis for details regarding the test conditions and the configuration of the thermal vias on the EVB. Refer to PCB Land Pattern for recommended thermal vias. 3

4 TRANSMIT PATH CHARACTERISTICS (=3.3V, Ta=+25 o C) RFX8425 Parameters Unit Min Typ Max Conditions Operating Frequency GHz ac n g b Total Supply Current for ac dbm +18 dbm dbm 19 dbm 22 TX Small Signal Gain db 26 Dynamic EVM < -35dB for MCS9/VHT40 Dynamic EVM < -32dB for MCS7/HT20 Dynamic EVM < -32dB for 64QAM/54Mbps For b 1Mbps CCK Mask Compliance with 1.5dB Margin ma 140 For Pout = +18dBm, MCS9/VHT40 Second Harmonics dbm/mhz -8 POUT = +22dBm, 11b 1Mbps CCK Third Harmonics dbm/mhz -27 POUT = +22dBm, 11b 1Mbps CCK Power Detector Voltage mv Input Return Loss db -12 Output Return db -6 Measured with 10kΩ load, POUT = +5 to +20dBm RECEIVE PATH CHARACTERISTICS (=3.3V, Ta=+25 o C) Parameters Min Typ Max Unit Conditions Operating Frequency GHz Small-Signal Gain (High Gain Mode) 16 db Noise Figure 2.6 db LNA Quiescent Current 12 ma IIP dbm Insertion Loss (Bypass Mode) 1.5 db TRUTH TABLE PA_EN LNA_EN VMODE Mode of Operation 0 0 X Bypass / Sleep Mode High Linearity Transmit Mode 0 1 X Receive Mode with LNA ON Power Save Transmit Mode 1 1 X Power Save Transmit Mode Note: 1 denotes high state (> 1.2V), 0 denotes Low state (< 0.4V), X denotes either state (don t care) 1KΩ 10KΩ series resistor may be required for each control line 4

5 PACKAGE DIMENSIONS PCB LAND PATTERN (With Recommended Thermal Vias) PACKAGE MARKING 0.15mm 0.2mm 0.4mm Pin 1 Mark 1.4mm 0.4mm 8425 First Line: Part Number 1.4mm 0.2mm drill (x9) 2.6mm LLLL Second Line: Lot Number 0.475mm 2.3mm 5

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