IR MOSFET - StrongIRFET

Save this PDF as:
 WORD  PNG  TXT  JPG

Size: px
Start display at page:

Download "IR MOSFET - StrongIRFET"

Transcription

1 IR MOSFET - StrongIRFET Applications UPS and Inverter applications Half-bridge and full-bridge topologies Resonant mode power supplies DC/DC and AC/DC converters OR-ing and redundant power switches Brushed and BLDC Motor drive applications Battery powered circuits Benefits Improved Gate, Avalanche and Dynamic dv/dt Ruggedness Fully Characterized Capacitance and Avalanche SOA Enhanced body diode dv/dt and di/dt Capability Lead-Free; RoHS Compliant; Halogen-Free G D S V DSS R DS(on) typ. I D D max S G D TO-247AC 200V 5.3m 6.6m 182A G D S Gate Drain Source Standard Pack Base part number Package Type Orderable Part Number Form Quantity TO-247AC Tube 25 R DS(on), Drain-to -Source On Resistance (m ) I D = 82A T J = 125 C T J = 25 C Drain Current (A) I D, V GS, Gate -to -Source Voltage (V) T C, Case Temperature ( C) Figure 1 Typical On-Resistance vs. Gate Voltage Figure 2 Maximum Drain Current vs. Case Temperature Final Datasheet Please read the important Notice and Warnings at the end of this document V

2 Table of Contents Table of Contents Applications Benefits Ordering Table. 1 Table of Contents Parameters 3 2 Maximum ratings, Thermal, and Avalanche characteristics 4 3 Electrical characteristics 5 4 Electrical characteristic diagrams 6 Package Information 14 Qualification Information 15 Revision History.. 16 Final Datasheet 2 V

3 Parameters 1 Parameters Table1 Key performance parameters Parameter Values Units V DS 200 V R DS(on) max 6.6 m I D 182 A Final Datasheet 3 V

4 Maximum ratings and thermal characteristics 2 Maximum ratings and thermal characteristics Table 2 Maximum ratings (at T J=25 C, unless otherwise specified) Parameter Symbol Conditions Values Unit Continuous Drain Current I D T C = 25 C, V V 182 Continuous Drain Current I D T C = 0 C, V V 129 A Pulsed Drain Current I DM T C = 25 C 728 Maximum Power Dissipation P D T C = 25 C 556 W Linear Derating Factor T C = 25 C 3.7 W/ C Gate-to-Source Voltage V GS - ± 20 V Operating Junction and T J to Storage Temperature Range T STG Soldering Temperature, for seconds (1.6mm from case) C Mounting Torque, 6-32 or M3 Screw - - lbf in (1.1 N m) - Table 3 Thermal characteristics Parameter Symbol Conditions Min. Typ. Max. Unit Junction-to-Case R JC T J approximately 90 C Case-to-Sink, Flat Greased Surface R CS C/W Junction-to-Ambient R JA Table 4 Avalanche characteristics Parameter Symbol Values Unit Single Pulse Avalanche Energy E AS (Thermally limited) 8 mj Single Pulse Avalanche Energy E AS (Thermally limited) 70 Avalanche Current I AR A See Fig 16, 17, 23a, 23b Repetitive Avalanche Energy E AR mj Notes: Repetitive rating; pulse width limited by max. junction temperature. Limited by T Jmax, starting T J = 25 C, L = 0.24mH, R G = 50, I AS = 82A, V GS =V. I SD 82A, di/dt 2290A/µs, V DD V (BR)DSS, T J 175 C. Pulse width 400µs; duty cycle 2%. C oss eff. (TR) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. C oss eff. (ER) is a fixed capacitance that gives the same energy as C oss while V DS is rising from 0 to 80% V DSS. R is measured at T J approximately 90 C. Limited by T Jmax, starting T J = 25 C, L = 1mH, R G = 50, I AS = 46A, V GS =V. Final Datasheet 4 V

5 Electrical characteristics 3 Electrical characteristics Table 5 Static characteristics Parameter Symbol Conditions Values Min. Typ. Max. Unit Drain-to-Source Breakdown Voltage V (BR)DSS V GS = 0V, I D = 1mA V Breakdown Voltage Temp. Coefficient V (BR)DSS/ T J Reference to 25 C, I D = 2mA V/ C Static Drain-to-Source On-Resistance R DS(on) V GS = V, I D = 82A m Gate Threshold Voltage V GS(th) V DS = V GS, I D = 270µA V V DS = 160V, V GS = 0V Drain-to-Source Leakage Current I DSS V DS = 160V,V GS = 0V,T J =125 C µa Gate-to-Source Forward Leakage I GSS V GS = 20V na Gate Resistance R G Table 6 Dynamic characteristics Values Parameter Symbol Conditions Unit Min. Typ. Max. Forward Trans conductance gfs V DS = 50V, I D = 82A S Total Gate Charge Q g Gate-to-Source Charge Q gs I D = 82A V DS = 0V Gate-to-Drain Charge Q gd V GS = V Total Gate Charge Sync. (Qg Qgd) Q sync Turn-On Delay Time t d(on) V DD = 130V Rise Time t r I D = 82A Turn-Off Delay Time t d(off) R G = Fall Time t f V GS = V Input Capacitance C iss V GS = 0V Output Capacitance C oss V DS = 50V Reverse Transfer Capacitance C rss ƒ = 1.0MHz, See Fig Effective Output Capacitance (Energy Related) C oss eff.(er) V GS = 0V, V DS = 0V to 160V Output Capacitance (Time Related) C oss eff.(tr) V GS = 0V, V DS = 0V to 160V nc ns pf Table 7 Reverse Diode Values Parameter Symbol Conditions Unit Min. Typ. Max. Continuous Source Current MOSFET symbol D I S (Body Diode) showing the G A Pulsed Source Current integral reverse I SM S (Body Diode) p-n junction diode. Diode Forward Voltage V SD T J = 25 C, I S = 82A,V GS = 0V V Peak Diode Recovery dv/dt dv/dt T J = 175 C, I S = 82A,V DS = 200V V/ns Reverse Recovery Time t rr T J = 25 C T J = 125 C V DD = 170V I F = 82A, ns Reverse Recovery Charge Q rr T J = 25 C di/dt = 0A/µs T J = 125 C nc Reverse Recovery Current I RRM T J = 25 C A Final Datasheet 5 V

6 Electrical characteristic diagrams 4 Electrical characteristic diagrams I D, Drain-to-Source Current (A) 00 0 VGS TOP 15V V 7.0V 6.0V 5.5V 5.0V 4.5V BOTTOM 4.0V 4.0V I D, Drain-to-Source Current (A) 00 0 VGS TOP 15V V 7.0V 6.0V 5.5V 5.0V 4.5V BOTTOM 4.0V 4.0V 60µs PULSE WIDTH Tj = 25 C µs PULSE WIDTH Tj = 175 C V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) Figure 3 Typical Output Characteristics Figure 4 Typical Output Characteristics I D, Drain-to-Source Current (A) T J = 175 C T J = 25 C V DS = 50V 60µs PULSE WIDTH V GS, Gate-to-Source Voltage (V) R DS(on), Drain-to-Source On Resistance (Normalized) 3.0 I D = 82A 2.5 V GS = V T J, Junction Temperature ( C) Figure 5 Typical Transfer Characteristics Figure 6 Normalized On-Resistance vs. Temperature Final Datasheet 6 V

7 C, Capacitance (pf) Electrical characteristic diagrams 1E V GS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd C iss C oss C rss V GS, Gate-to-Source Voltage (V) I D = 82A V DS = 160V V DS = 0V VDS= 40V V DS, Drain-to-Source Voltage (V) Q G, Total Gate Charge (nc) Figure 7 Typical Capacitance vs. Drain-to-Source Voltage Figure 8 Typical Gate Charge vs. Gate-to-Source Voltage 00 I SD, Reverse Drain Current (A) 0 1 T J = 175 C T J = 25 C V GS = 0V V SD, Source-to-Drain Voltage (V) Figure 9 Typical Source-Drain Diode Forward Final Datasheet 7 V

8 V (BR)DSS, Drain-to-Source Breakdown Voltage (V) 00 I D, Drain-to-Source Current (A) 0 0µsec 1msec 1 OPERATION IN THIS AREA LIMITED BY R DS (on) msec 0.1 Tc = 25 C Tj = 175 C Single Pulse V DS, Drain-to-Source Voltage (V) DC Figure Maximum Safe Operating Area Id = 2.0mA Energy (µj) T J, Temperature ( C ) V DS, Drain-to-Source Voltage (V) Figure 11 Drain-to-Source Breakdown Voltage Figure 12 Typical Coss Stored Energy Final Datasheet 8 V

9 Electrical characteristic diagrams R DS (on), Drain-to -Source On Resistance (m ) VGS = 6.0V VGS = 7.0V VGS = 8.0V VGS = V Gate threshold Voltage (V) V GS(th), I D = 270µA ID = 1.0mA I D = 1.0A I D, Drain Current (A) T J, Temperature ( C ) Figure 13 Typical On-Resistance vs. Drain Current Figure 14 Threshold Voltage vs. Temperature 1 Thermal Response ( Z thjc ) C/W D = SINGLE PULSE Notes: ( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc E-006 1E t 1, Rectangular Pulse Duration (sec) Figure 15 Maximum Effective Transient Thermal Impedance, Junction-to-Case Final Datasheet 9 V

10 Avalanche Current (A) Electrical characteristic diagrams 00 0 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150 C and Tstart =25 C (Single Pulse) 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 25 C and Tstart = 150 C E E E E E E-01 tav (sec) Figure 16 Avalanche Current vs. Pulse Width E AR, Avalanche Energy (mj) TOP Single Pulse BOTTOM 1.0% Duty Cycle I D = 82A Notes on Repetitive Avalanche Curves, Figures 16, 17: (For further info, see AN-05 at 1.Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 23a, 23b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. DT = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 15, 16). t av = Average time in avalanche. D = Duty cycle in avalanche = tav f Z thjc(d, t av) = Transient thermal resistance, see Figures 14) PD (ave) = 1/2 ( 1.3 BV I av) = T/ Z thjc I av = 2 T/ [1.3 BV Z th] E AS (AR) = P D (ave) t av Starting T J, Junction Temperature ( C) Figure 17 Maximum Avalanche Energy vs. Temperature Final Datasheet

11 Electrical characteristic diagrams I F = 55A V R = 170V T J = 25 C T J = 125 C I F = 82A V R = 170V T J = 25 C T J = 125 C I RRM (A) 30 I RRM (A) di F /dt (A/µs) di F /dt (A/µs) Figure 18 Typical Recovery Current vs. dif/dt Figure 19 Typical Recovery Current vs. dif/dt Q RR (nc) I F = 55A V R = 170V T J = 25 C T J = 125 C Q RR (nc) I F = 82A V R = 170V T J = 25 C T J = 125 C di F /dt (A/µs) di F /dt (A/µs) Figure 20 Typical Stored Charge vs. dif/dt Figure 21 Typical Stored Charge vs. dif/dt Final Datasheet

12 Electrical characteristic diagrams Figure 22 Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs Figure 23a Unclamped Inductive Test Circuit Figure 23b Unclamped Inductive Waveforms Final Datasheet

13 Electrical characteristic diagrams Figure 24a Switching Time Test Circuit Figure 24b Switching Time Waveforms Figure 25a Gate Charge Test Circuit Figure 25b Gate Charge Waveform Final Datasheet

14 Package Information 5 Package Information TO-247AC Package Outline (Dimensions are shown in millimeters (inches)) TO-247AC Part Marking Information EXAMPLE: THIS IS AN IRFPE30 WITH ASSEMBLY LOT CODE 5657 ASSEMBLED ON WW 35, 2001 IN THE ASSEMBLY LINE "H" Note: "P" in assembly line position indicates "Lead-Free" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE IRFPE30 135H PART NUMBER DATE CODE YEAR 1 = 2001 WEEK 35 LINE H TO-247AC package is not recommended for Surface Mount Application. Final Datasheet

15 Qualification Information 6 Qualification Information Qualification Information Qualification Level Industrial (per JEDEC JESD47F) Moisture Sensitivity Level TO-247AC N/A RoHS Compliant Yes Applicable version of JEDEC standard at the time of product release. Final Datasheet

16 Revision History Revision History Major changes since the last revision Page or Reference Revision Date Description of changes All pages First release data sheet. Final Datasheet

17 Trademarks of Infineon Technologies AG µhvic, µipm, µpfc, AU-ConvertIR, AURIX, C166, CanPAK, CIPOS, CIPURSE, CoolDP, CoolGaN, COOLiR, CoolMOS, CoolSET, CoolSiC, DAVE, DI-POL, DirectFET, DrBlade, EasyPIM, EconoBRIDGE, EconoDUAL, EconoPACK, EconoPIM, EiceDRIVER, eupec, FCOS, GaNpowIR, HEXFET, HITFET, HybridPACK, imotion, IRAM, ISOFACE, IsoPACK, LEDrivIR, LITIX, MIPAQ, ModSTACK, my-d, NovalithIC, OPTIGA, OptiMOS, ORIGA, PowIRaudio, PowIRStage, PrimePACK, PrimeSTACK, PROFET, PRO-SIL, RASIC, REAL3, SmartLEWIS, SOLID FLASH, SPOC, StrongIRFET, SupIRBuck, TEMPFET, TRENCHSTOP, TriCore, UHVIC, XHP, XMC Trademarks updated November 2015 Other Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition Published by Infineon Technologies AG Munich, Germany 2016 Infineon Technologies AG. All Rights Reserved. Do you have a question about this document? Document reference IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ( Beschaffenheitsgarantie ). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer s products and any use of the product of Infineon Technologies in customer s applications. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office ( WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with Final Datasheet

18 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Infineon: