REGULATOR PD 1 MUTING AMP PD 2 AUTO BLEND AMP AMP RIPPLE FILTER DC AMP AGC AFC 1 VCC. Lch OUT RIPPLE FILTER AGC AFC 2

Transcription

1 FM Stereo/M Radio Description The is high performance one-chip bipolar ICs designed for FM stereo/m radios. These include an FM/M front end, FM/M IF amplifier, FM/M detection output and FM stereo demodulator output. CX538M CX538S pin SOP (Plastic) pin SDIP (Plastic) Features Low current consumption (In FM mode ID=.0 m, in M mode 8.5 m, VCC=6.0 V) uilt-in LED drive circuit for tuning uilt-in LED drive circuit for stereo indicator uilt-in muting circuit for the FM band Few external parts CX538N pin SSOP (Plastic) bsolute Maximum Ratings (Ta=25 C) Supply voltage VCC 4 V Operating temperature Topr 0 to +60 C Storage temperature Tstg 55 to +50 C Junction temperature Tjmax 25 C llowable power dissipation PD CX538M 500 mw CX538N 40 mw CX538S 050 mw Recommended Operating Conditions Supply voltage VCC 2 to 9 V Structure ipolar silicon monolithic IC lock Diagram GND PLL LPF 2 MPX VCO FM DISCRI MUTE M OSC FC FM OSC FM RF M RF FM RF FE GND FM/M FE OUT VCO MULTIPLEX ULTOR ULTOR FM FE M FE /2 COUNTER PD PD 2 MUTG UTO LEND DC MP U MP FM IF/ DISCRI DECODE MP U MP M IF/DET M/ST SW ST D RIPPLE FILTER DC MP DETUNE MUTG CONTROL TUNG D PLL LPF DET LPF2 DET LPF2 ST D VCO CHECK Rch OUT Lch OUT VCC RIPPLE FILTER GC FC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. pplication circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. GC FC 2 GND TUNE D FM IF PD : PHSE DETECTOR U : UFFER FE : FRONT END M IF ND SELECT DET : DETECTOR D : DICTOR E9333D8X

2 Pin Description and Equivalent Circuit Pin Voltage (V) No. Symbol VCC=3 V VCC=6 V Equivalent circuit Description FM M FM M PLL LPF k MPX 26k LPF for PLL 29 PLL LPF DET LPF DET LPF LPF s C (µf) for DET inserted between pins 2 and 3 MPX 4 ST D VCO CHECK k 4 Stereo indicator drive circuit and output for VCO check VCO 5 Rch OUT Stereo Rch output pin Lch OUT Stereo Lch output pin 7 VCC Supply pin 8 Ripple FILTER k 8 7k 40k Ripple filter 33k 9 GC/FC k 9 50k FC pin in J band, determines time constant of GC in M (depending on 3.25k external capacitor). FC pin in W band, determines time 0 GC/FC k 0 constant of GC in M (depending on external capacitor). 2

3 Pin Voltage (V) No. Symbol VCC=3 V VCC=6 V Equivalent circuit Description FM M FM M GND GND of FM/M IF and DET stage 25 MUTE Time constant for muting provided 2 TUNE D FM/M tuning indicator drive circuit 3 5 FM IF ND SELECT C 3k 3 FM IF input pin FM/M band switching pin : M at GND and FM at OPEN 4 M IF k k M IF input pin FM/M FE OUIT M lock 220 FM lock M/FM IF output pin to connect with IF filter FE GND FM RF FM RF k 3p GND of FM/M front end FM RF amplifier circuit for FM RF input FM RF amplifier circuit to connect to RF tank circuit FE 9 M RF M RF input to connect to bar antenna GND 3

4 Pin Voltage (V) No. Symbol VCC=3 V VCC=6 V Equivalent circuit Description FM M FM M 2 23 FC V Regulator output Variable capacitance for FC FM OSC FM local oscillation circuit M OSC M local oscillation circuit FM DISCRI k Phase shift circuit to connect to ceramic discriminator 27 VCO MPX VCO control pin for stereo demodulation 28 MPX Regulator for MPX GND GND of MPX block 4

5 Electrical Characteristics (Ta=25 C, VCC=6 V) Item Circuit current () Circuit current (2) Symbol ID ID2 Test Point ID ID Output waveform and Test method M no signal V to V5 input FM no signal short Separation when V3= SW condition OFF OFF Min. Typ. Max. Unit m m Separation SEP VD 50 dµv, 0.7 MHz, khz, / 40 d 22.5 khz dev input ttenuation of noise level ON FM MUTE VD When V3=no signal, / 23 d S8 ON/OFF OFF STEREO indicator output Is Is V3=60 dµv, 0.7 MHz CW Pilot ON OFF m FM front end voltage gain () GV V V=40 dµv, 00 MHz CW V=0.7 MHz CW d FM detection V3=90 dµv, 0.7 MHz (MONO/STEREO) VD VD khz 22.5 khz dev / mvrms output level L, R VD= khz sine wave FM-IF knee level VD2 V3 V3=90 dµv, 0.7 MHz Input level at 3 d of khz 22.5 khz dev output 25 3 dµv FM-IF distortion L, R (MONO) THD VD V3=90 dµv, 0.7 MHz khz 75 khz dev / % FM-IF distortion L, R (STEREO) VD= khz sine wave % FM-IF center frequency F VF V3=90 dµv, 0.7 MHz CW khz deviation FM meter current () I I V3=60 dµv, 0.7 MHz CW m M/ST switching level by IF input VI Is V3=0.7 MHz M ST 38 ST M dµv 4 46 dµv 35 uto blend VI2 V3 0 4 d M front end voltage gain (2) GV2 V V2=60 dµv, 60 khz CW V=455 khz CW d M-IF voltage gain (4) GV3 V4 V4 level at output of 5.5 mvrms dµv M detection output level (L, R) VD3 VD V4=85 dµv 455 khz ( khz % MOD) VD= khz sine wave / mvrms M meter current (2) I2 I V4=85 dµv, 455 khz CW m M detection V2=95 dµv, 60 khz output distortion THD2 VD ( khz % MOD) % (L, R) VD= khz sine wave 0 dµv= µv 5

6 Electrical Characteristics Test Circuit V 2 M 60kHz V FM 00MHz 0.0µ VF 29 GND PLL LPF VO 28 MPX 0µ 5k S VCO FM DISCRI CF 2k S p 3.3µ 0p 00k 24 MUTE M OSC 23 5p 0p 22 FC FM OSC 2 VH p 0p 20 FM RF 43p 0p 9 M RF 50µH 25 8p 2200p 0p 8 FM RF 7 FE GND FM/M FE OUT 0.0µF 2k 0.47µ 2.2k 4.7µ PLL LPF DET LPF DET LPF2 ST D VCO CHECK Rch OUT Lch OUT VCC RIPPLE FILTER GC/ FC GC/ FC 2 GND TUNE D FM IF M IF ND SELECT S2 S 00µ S4 33µ µ µ 0.0µ 7.5k 7.5k 0.0µ 4.7µ VM IS S0 ID I S3 k 7.5k 0.0µ VD 5kHz LPF 9kHz notch filter V 3 FM 0.7MHz V 4 M 455kHz 0.0µ S6 3 V p S5 2k VS 6

7 pplication Circuit C9 0µ CF3 C5 0.00µ L C6 0µ L2 C4 4PF PF R3 0k RV 22k C8 3.3µ R9 00 C 7p C7 3p C2 2.0p C3 8p L3 L4 R2 2.2k R4 2.2k 29 GND PLL LPF 28 MPX VCO FM DISCRI MUTE M OSC FC FM OSC 2 20 FM RF 9 M RF 8 FM RF 7 GND FM/M FE OUT IFT CF C 4.7µ C0 0.47µ R ch OUT PLL LPF DET LPF C2 µ C µ DET LPF2 ST D/ VCO CHECK Rch OUT R6 3.3k Lch OUT VCC RIPPLE FILTER GC/ FC GC/ FC 2 GND TUNE D FM IF M IF C8 C9 R5 4.7µ 0.0µ 2.2k C C7 R8 R0 33µ µ 2.2k 3 C20 0.0µ ND SELECT S R 00k L ch OUT Capacitor unit : F C µ R7 3.3k VCC=3V C5 00µ CF2 PF CF CF2 CF3 IFT : FM ND PSS FILTER : M 455kHz CF : FM 0.7MHz CF : FM DISCRIMTOR : M 455kHz IFT Note) This circuit is an application example and is not guaranteed for all applications. For C, R (C3, C4, R6, R7) marked, refer to 2. MPX circuit of Notes on Usage. pplication circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. 7

8 0 SIGNL (STEREO) FM I/O characteristics SIGNL (MONO) 0 Separation/response (d) L R R L SEPRTION 5 NOISE(MONO) NOISE(STEREO) (WITH LPF) DISTORTION(MONO) Input signal level (dµv) M I/O characteristics SIGNL VCC 3V FREO 98MHz MODE 400Hz DEV 22.5kHz Distortion THD (%) Response (d) NOISE DISTORTION VCC 3V FREO 000kHz MOD 400Hz, % Distortion THD2 (%) Input signal level (dm) 79 Separation (d) Vin3=90dµV 0.7MHz fmod = khz 22.5kHz dev Pilot ON VCO - free-running frequency (khz) Vin3=90dµV 0.7MHz CW VCO - free-running frequency (khz) Ta - mbient temperarure ( C) 8

9 Coil data M OSC FM RF S φ 5mm φ 6mm3.5t Core diameter ø 0.06 mm 2 UEW f (khz) L (µh) to Equivalent to L-5K7H5 R2-84X, Mitsumi Electric Co., Ltd. or 7TRS-844 TOKO Co., Ltd. QO Number of widings (t) to 3 to 3 4 to M IFT S FM OSC 5 6 φ 4mm φ 0.6mm3.5t Core diameter ø 0.07 mm UEW CO (pf) to 3 80 QO Number of widings (t) to 3 to 2 2 to 3 4 to Equivalent to 2K7H5 R2-8558, Mitsumi Electric Co., Ltd. or 7MC-7789N TOKO Co., Ltd. FM Discriminator Core diameter ø 0. mm 2 UEW CO (pf) to 3 82 QO to 3 to 3 95 Equivalent to 9SC-2200Z, TOKO Co., Ltd. Number of widings (t) M ar ntenna PRIMRY f (khz) 796 L (µh) 650 Primary 9 t Secondary 20 t SECONDRY PFWE8 PF (88 to 08 MHz) Soshin Electric Co., Ltd. CF SFU-455 Murata Mfg. Co., Ltd. or FCFL-455 TOKO Co., Ltd. CF2 SFE0.7M5 Murata Mfg. Co., Ltd. CF3 CD0.7MG Murata Mfg. Co., Ltd. VC PVC2LXTL Mitsumi Electric Co., Ltd. VC (Rear Mount) HU2224N700 TOKO Co., Ltd. PVC2LXT Mitsumi Electric Co., Ltd. 9

10 Notes on Usage. VCO free run frequency adjustment method s this IC has built-in oscillation capacitance, the oscillation frequency can be controlled with an external resistor k Capacitor for decoupling 22k ) VCO djustment Method Pin 4 is the stereo indicator and VCO check pin. Therefore, in stereo mode (when stereo indicator drive Tr Q2 is switched on), pin 4 voltage lowers down, Q is cut off and VCO oscillation waveform can not be seen. In M mode as well, the oscillation waveform can not be seen as VCO turns off. djust the free run frequency at 76 khz ±50 Hz. 4 33k VCC Q Q2 about 80mVp-p In this IC, tuner and MPX sections are directly connected. Therefore, free run frequency is not stable, being affected by noise except in reception mode. For free run adjustment, input signals from either RF or IF. (Input signal should be RF [Tuning frequency] or fo of the discriminator using IF (0.7 MHz) and input more than 60 dµ.) 2) How to Deal with pin 4 fter djustment. With the use of a stereo indicator. When VCC is 3 V or more, insert a bypass resistance R to prevent LED malfunction k VCC=3V 4 2.2k VCC>3V Without the use of a stereo indicator. R 4 OPEN 4 Turn pin 4 to open or connect to GND. 3) Control Resistor of VCO Oscillation Frequency For the VCO control resistor of this ic, a carbon film resistor suffices. For easier adjustment of temperature characteristics and VCO free run frequency, the following combination is recommended k 22k 0

11 2. MPX circuit ) MPX load resistance When power supply voltage is over 3 V, change the MPX load resistor R6, R7 from 3.3 kω to 6.8 kω. In this case, the output level is increased by about 6 d. 2) Time constant of de-emphasis Refer to the following table as the time constant is determined at C3, C4, R6 and R kω 6.8 kω R6, R7 50 µs 75 µs 0.05 µf µf µf 0.02 µf C3, C4 3. FC circuit ) This IC has a built-in variable capacitances. Change to the following circuit when designing J band, because the standard circuit is for W band. 3pF µ 50k µ 4.7µ 2) FC pull-in range is expanded by increasing the capacitance of standard circuit C7 3 pf. djust the value of capacitance according to the set specification. 4. uto blend circuit This IC has a built-in auto blend circuit and a MONO switch is not required as a rule. This circuit controls the separation in proportion to the signal level and reduces noise automatically for stereo reception below the mid electric field when the electric field strength reaches lower than about 40 dµ. When the electric field strength turns below 0 to 5 dµ, MONO operation is automatically activated. To switch MONO mode on externally, ground pin 3 with 33 kω k MONO SW

12 5. FM discriminator For FM detection, the quadrature detection system is adopted. s a phase shifter, a ceramic resonator (CF 3 discriminator) applies to achieve adjustment-free detection. Though the sensitivity and selectability will be slightly affected, the discriminator can be replaced by a coil as shown below. Combining CF2 (FMIF) and CF3 (PM discriminator) poses problems with the distortion factor when deviation with the IF band central frequency fo occurs. To this effect, use pairs of the same rank as indicated in the chart. Red lue fo of CF2 and CF MHz 0.67 MHz 26 22pF C D Orange lack 0.73 MHz 0.64 MHz DISCRI COIL E White 0.76 MHz 6. FM muting circuit This IC has a built-in soft muting circuit. s shown in the following I/O characteristics diagram, 23 d (Typ.) muting is applied and noise level reduced during weak electric field and out of tune instances. Conventional IC RESPONSE (d) 3 23 S+N IC with built-in soft MUTE N PUT LEVEL (dµ) 7. Notes on patterns ) Positions of FM NT and OSC coils Locate those at right angles to each others to avoid inductance M through coupling. Further, insert a pin 2 pattern between patterns of pins 22, 20 and coils. 2) Tuning circuit s the capacitances C to C4, L2 and L3 are the constants on the standard circuit board, check the constants when a new circuit board is used. 3) Grounding pins Pin 7 is a grounding pin for M, FM and FE ; pin for IF ; and pin for MPX. Use as thick as possible a pattern since the grounding between NT, PF and pin 7 significantly stability, NF and characteristics affects. PF NT 8 7 4) Ground bypass capacitors C5 (0.00 µf) and C6 (0 µf) connected to pin 2 as close as possible to pin 7. 2

13 CX538M CX538S 3

14 0.5 ± ± ± ± ± 0.2 (9.3) Package Outline Unit : mm CX538M P SOP(PLSTIC) ± M to 0 DETIL PCKGE STRUCTURE PCKGE MTERIL EPOXY RES SONY CODE SOP-P-L03 LED TRETMENT SOLDER PLTG EIJ CODE SOP0-P-0375 LED MTERIL COPPER LLOY JEDEC CODE PCKGE MSS 0.7g CX538N P SSOP (PLSTIC) ± M ± 0. 0 to 0 NOTE: Dimension does not include mold protrusion. DETIL PCKGE STRUCTURE PCKGE MTERIL EPOXY RES SONY CODE EIJ CODE SSOP-P-L0 SSOP0-P-0056 LED TRETMENT LED MTERIL SOLDER/PLLDIUM PLTG 42/COPPER LLOY JEDEC CODE PCKGE MSS 0.g NOTE : PLLDIUM PLTG This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame). 4

15 CX538S P SDIP (PLSTIC) to ± ± M 0.5 M Two kinds of package surface:.ll mat surface type. 2.ll mirror surface type. PCKGE STRUCTURE MOLDG COMPOUND EPOXY RES SONY CODE EIJ CODE SDIP-P-0 SDIP0-P-0400 LED TRETMENT LED MTERIL SOLDER/PLLDIUM PLTG COPPER LLOY JEDEC CODE PCKGE MSS.8g NOTE : PLLDIUM PLTG This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame). 5