IR2153/IR2153D SELF-OSCILLATING HALF-BRIDGE DRIVER. Features. Product Summary. Packages. Description. Typical Connections

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1 Features Integrated 600V halfbridge gate driver 15.6V zener clamp on Vcc True micropower start up Tighter initial deadtime control Low temperature coefficient deadtime Shutdown feature (1/6th Vcc) on C T pin Increased undervoltage lockout Hysteresis (1V) Lower power levelshifting circuit Constant, pulse widths at startup Lower di/dt gate driver for better noise immunity Low side output in phase with T Internal 50nsec (typ.) bootstrap diode (I2153D) Excellent latch immunity on all inputs and outputs ESD protection on all leads Description The are an improved version of the popular I2155 and I2151 gate driver ICs, and incorporates a high voltage halfbridge gate driver with a front end oscillator similar to the industry standard CMOS 555 timer. The I2153 provides more functionality and is easier to use than previous ICs. A shutdown feature has been designed into the CT pin, so that both gate driver outputs can be disabled using a low voltage control signal. In addition, the gate driver output pulse widths are the same once the rising undervoltage lockout threshold on VCC has been reached, resulting in a more stable profile of Preliminary Data Sheet No. PD60062J SELFOSCILLATING HALFBIDGE DIVE Typical Connections Product Summary V OFFSET 600V max. Duty Cycle 50% Tr/Tp 80/40ns V clamp 15.6V Deadtime (typ.) 1.2 µs Packages 8 Lead PDIP 8 Lead SOIC frequency vs time at startup. Noise immunity has been improved significantly, both by lowering the peak di/dt of the gate drivers, and by increasing the undervoltage lockout hysteresis to 1V. Finally, special attention has been payed to maximizing the latch immunity of the device, and providing comprehensive ESD protection on all pins. I V MAX I2153D 600V MAX VCC VB VCC VB T VS T VS CT CT Shutdown Shutdown

2 Absolute Maximum atings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to, all currents are defined positive into any lead. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units V B High side floating supply voltage V S High side floating supply offset voltage V B 25 V B 0.3 V High side floating output voltage V S 0.3 V B 0.3 V Low side output voltage 0.3 V CC 0.3 V T pin voltage 0.3 V CC 0.3 V CT C T pin voltage 0.3 V CC 0.3 I CC Supply current (note 1) 25 I T pin current 5 5 dv s /dt Allowable offset voltage slew rate V/ns P D th JA Maximum power T A 25 C Thermal resistance, junction to ambient (8 Lead DIP) (8 Lead DIP) (8 Lead SOIC) (8 Lead SOIC) W C/W T J Junction temperature T S Storage temperature C T L Lead temperature (soldering, 10 seconds) 300 V ma ecommended Operating Conditions For proper operation the device should be used within the recommended conditions. Symbol Definition Min. Max. Units V Bs High side floating supply voltage V CC 0.7 V CLAMP V S Steady state high side floating supply offset voltage 3.0 (note 2) 600 V V CC Supply voltage 10 V CLAMP I CC Supply current (note 3) 5 ma T J Junction temperature C Note 1: Note 2: Note 3: This IC contains a zener clamp structure between the chip V CC and which has a nominal breakdown voltage of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the V CLAMP specified in the Electrical Characteristics section. Care should be taken to avoid output switching conditions where the V S node flies inductively below ground by more than 5V. Enough current should be supplied to the V CC pin of the IC to keep the internal 15.6V zener diode clamping the voltage at this pin. 2

3 ecommended Component Values Symbol Component Min. Max. Units Timing resistor value 10 kω C T C T pin capacitor value 330 pf I2153 T vs Frequency Frequency (Hz) pf 470pF 1nF 2.2nF CT Values 4.7nF nF T (ohms) 3

4 Electrical Characteristics V BIAS (V CC, V BS ) = 12V, C L = 1000 pf, C T = 1 nf and T A = 25 C unless otherwise specified. The V IN, V TH and I IN parameters are referenced to. The V O and I O parameters are referenced to and are applicable to the respective output leads: or. Low Voltage Supply Characteristics Symbol Definition Min. Typ. Max. Units Test Conditions V CCUV ising V CC undervoltage lockout threshold V CCUV Falling V CC undervoltage lockout threshold V V CCUVH V CC undervoltage lockout Hysteresis I QCCUV Micropower startup V CC supply current I QCC Quiescent V CC supply current µa V CC V CCUV V CLAMP V CC zener clamp voltage V I CC = 5mA Floating Supply Characteristics Symbol Definition Min. Typ. Max. Units Test Conditions I QBSUV Micropower startup V BS supply current 0 10 I QBS Quiescent VBS supply current µa V CC V CCUV V BSMIN Minimum required V BS voltage for proper V V CC =V CCUV 0.1V functionality from to I LK Offset supply leakage current 50 µa V B = V S = 600V VF Bootstrap diode forward voltage (I2153D) V IF = 250mA Oscillator I/O Characteristics Symbol Definition Min. Typ. Max. Units Test Conditions fosc Oscillator frequency = 36.9kΩ khz T = 7.43kΩ d T pin duty cycle % fo < 100kHz I CT CT pin current ua I CTUV UVmode C T pin pulldown current ma VCC = 7V VCT Upper CT ramp voltage threshold 8.0 VCT Lower CT ramp voltage threshold 4.0 V VCTSD CT voltage shutdown threshold V T Highlevel T output voltage, VCC VT I T = 100µA I T = 1mA V T Lowlevel T output voltage IT = 100µA I T = 1mA mv VTUV UVmode T output voltage V CC V CCUV VTSD SDMode T output voltage, VCC VT I T = 100µA, V CT = 0V I T = 1mA, V CT = 0V 4

5 Electrical Characteristics (cont.) Gate Driver Output Characteristics Symbol Definition Min. Typ. Max. Units Test Conditions V OH High level output voltage, V BIAS V O I O = OA VOL Lowlevel output voltage, VO I O = OA mv VOL_UV UVmode output voltage, VO I O = OA V CC V CCUVtr Output rise time tf Output fall time nsec tsd Shutdown propogation delay 660 td Output deadtime ( or ) µsec Lead Definitions Symbol V CC C T V S V B Description Logic and internal gate drive supply voltage Oscillator timing resistor input Oscillator timing capacitor input IC power and signal ground Low side gate driver output High voltage floating supply return High side gate driver output High side gate driver floating supply Lead Assignments 8 Lead PDIP 8 Lead SOIC I2153S NOTE: The I2153D is offered in 8 lead PDIP only. 5

6 Functional Block Diagram for I2153 V B HV LEVEL SHIFT PULSE FILTE S Q C T /2 /2 Q S Q GIC DEAD TIME DEAD TIME PULSE GEN DELAY 15.6V V S V CC UV DETECT Functional Block Diagram for I2153D V B HV LEVEL SHIFT PULSE FILTE S Q C T /2 /2 Q S Q GIC DEAD TIME DEAD TIME PULSE GEN DELAY 15.6V D1 V S V CC UV DETECT NOTE: The D1 is a separate die. 6

7 8 Lead PDIP Lead SOIC

8 Vccuv V CLAMP Vcc 2/3,C T 1/3 C T td td Figure 1. Input/Output Timing Diagram () 50% 50% () 90% 90% 10% DT 10% Figure 2. Switching Time Waveform Definitions Figure 3. Deadtime Waveform Definitions WOLD HEADQUATES: 233 Kansas St., El Segundo, California Tel: (310) I GEAT BITAIN: Hurst Green, Oxted, Surrey H8 9BB, UK Tel: I CANADA: 15 Lincoln Court, Brampton, Ontario L6T 3Z2 Tel: (905) I GEMANY: Saalburgstrasse 157, Bad Homburg Tel: I ITALY: Via Liguria 49, Borgaro, Torino Tel: I FA EAST: K&H Bldg., 2F, 304 NishiIkebukuro 3Chome, ToshimaKu, Tokyo, Japan 171 Tel: I SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 1311, Singapore Tel: IAIWAN: 16 Fl. Suite D..207, Sec.2, Tun Haw South oad, Taipei, 10673, Taiwan Tel: Data and specifications subject to change without notice. 3/1/99 8